JPS5829023B2 - data communication equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a data communication device equipped with an echo canceller that removes the wraparound components of signals in a transmitter/receiver circuit of a data transmission system. The present invention relates to a data communication device equipped with an echo canceller that removes components that cross over to a receiving side.

(2) Background of the technology In data communication that transmits digital information, echo cancellation is performed using an echo canceller using a transversal filter that uses sample values of impulse responses as coefficients, but there is a need for an even more improved echo canceller. ing.

(3) Prior Art and Problems As a conventional echo canceller, for example, as shown in FIG. 1, there is an echo canceler using a transversal filter whose coefficients are sample values of an impulse response.

In Fig. 1, when the transfer function of the system is H((・→), the received signal Y(ω) for the transmitted signal X(ω) is Y(
Since the relationship is ω)=X(ω)H(ω), an impulse of X(ω)-1 is sent from the impulse transmitter 53 provided in the transmission circuit 3, and the switch 54, the transmission circuit 3, and the DA conversion Y(ω), that is, X(ω)-
1, so Y(ω)=H(ω) is stored.

In this state, the signal X(ω) sent from the data transmitter 52 connected to the digital data terminal 5 is stored in the shift register 75 via the transmitting circuit 3.

The stored signal and the signal stored in the impulse response memory 74 are extracted and sent to a multiplier 76 and an adder 77.
After being multiplied and added by , a subtracter 91 provided in the receiving circuit 4 subtracts the received signal.

The circuit portion consisting of the impulse response memory 74, shift register 75, multiplier 76, and adder 77 is referred to as a pseudo echo generating section (transversal filter).

This cancels out the wraparound components of the transmitted signal to the receiving side.

However, in the conventional type shown in FIG. 1, (1) perfect impulse transmission is impossible in the impulse transmitter 53, so the storage of the transfer function H(ω) in the impulse response memory 74 becomes inaccurate; , (2) In order to reduce the amount of calculation, sampling of the impulse response will be stopped midway, so the calculation error due to this will be significant. (3)
Due to the finite number of operation bits of the multiplier, the accumulation of calculation errors due to rounding up, rounding down, etc. becomes a problem, (4) The amount of hardware becomes a problem as many multipliers are required, and high-speed multipliers are required. So, JullW +1L17 (JullW
, uIIul+-1q 'J l-1/ ” --”
The signal stored in plJfi/"-/l' is taken out, multiplied and added by the multiplier 7 and the adder 77, and then added (which has problems such as high installation cost). .

(4) Purpose of the Invention In view of the problems with the conventional type described above, an object of the present invention is to store the wrap-around itself of the transmitted signal waveform and subtract this stored wrap-around from the received signal to perform echo cancellation. The idea is to perform echo cancellation accurately.

The basis of the idea in the present invention will be explained mathematically.

We will treat it in the S domain, and now we will write the Laplace transform of the impulse response of the system as H(S), that is, the transfer function of the system,
If the transmitted signal is X(S), then the response of the system, that is, the Laplace transform of the echo E(S) is expressed by the relational expression, E(
S) = H . +E
(S) Hail.

Here, E (S) is the wraparound signal. In the present invention, as in the conventional type, the system transfer function H(S)
Instead of measuring and memorizing, the relational expression, E
The response itself on the left side of (S)-H(S)·X (S) is stored and subtracted from the receiving side output R(S).

In this way, since the echo itself is used for cancellation, the error is zero in principle, and accurate echo cancellation can be expected.

In contrast, in the conventional method, the impulse response of the system, that is, the transfer function, is measured and stored, and the convolution of this and the transmitted signal is calculated, that is, H(S)・X(S) is calculated in the time domain. and asked for an echo.

In this case, the error A (S) is the calculated echo E
'(S) as the following formula, J (S) −Y (S) −(
R(S) -E'(S)) -E'(S) E(S)
, so the amount of echo cancellation is 2E (S
) -H(S)・X(S) It can be seen that this depends on the calculation accuracy of (S).

As described above, in the conventional type, it is difficult to obtain satisfactory echo cancellation results.

(5) Structure of the Invention In the present invention, there is provided a storage means for storing a wrap-around component to the receiving side of a transmission signal used for transmitting digital information sent out in advance, and a Means for reading out the wrap-around component of the transmitted signal to the receiving side corresponding to the digital information to be transmitted from among the stored wrap-around components of the transmitted signal to the receiving side, and the storage read out by the reading means. The echo canceller is equipped with a difference means for calculating the difference between the output of the means and the signal component on the receiving side, thereby calculating the difference between the pre-stored wrap-around component of the transmitted signal to the receiving side and the signal component on the receiving side. A data communication device is provided, characterized in that by determining the difference, components of a transmitted signal that cross over to a receiving side are removed.

(6) Examples of the invention Embodiments of the present invention will be described with reference to the drawings.

As an application target, a two-wire bidirectional data transmission circuit will be taken as an example.

FIG. 2 shows an embodiment in which a raised cosine wave or a Gaussian pulse is used as the transmission signal.

An echo memory 71 is connected to the changeover switch (S, ) 43 of the receiving circuit 4, and the echo memory is read out through the readout changeover switch (S2) 72 and applied to the subtracter 91.

Now, assuming binary transmission of rl and OJ, first, rtJ is transmitted in order to store the response of the system in the echo memory 71, and at the same time, the selector switch 43 is turned to the echo memory 71 side to store the response.

Next, turn the changeover switch 43 to the opposite side and wait for data transmission.

When data transmission from the transmission data terminal 5 connected to the transmitter 51 starts, the read changeover switch 72 selects either "0" (contact 720) or the output of the echo memory (contact 721) according to the transmission data. select.

That is, the echo memory is selectively read out by the reading means, the signal is applied to the subtracter 91, and the subtracter performs subtraction to achieve echo cancellation.

In this case, if there is no delay from signal transmission to response, one echo memory configuration as shown in Figure 2 is sufficient, but if there is a delay as shown in Figure 3, two or more echo memories are required. Sometimes it becomes.

That is, when there is a delay as shown in FIG. 3, if the operation of the switch S0 is performed simultaneously with the transmission of the signal from the transmitter 51, the echo memory 71 stores a wrap-around component with a time of "τ+T". That will happen.

In other words, a time longer than the signal transmission cycle T is required from the start of signal transmission until the wrap-around components are completely removed (reading of data from the echo memory 71 is completed).

At this time, even when moving on to transmitting the next signal, it is still necessary to read out the τ time in order to completely remove the wraparound component.

During the P1 wait, the echo memory 71 must start reading out the wraparound component of the next signal, and two echo memories are required to absorb this overlapping portion.

As described later, the case where two or more echo memories are not required means that if the operation of switch S1 is delayed by τ and the operation of switch S2 is also delayed by τ from the signal transmission time, the overlap as in the above case can be avoided. This means that only one echo memory is required.

However, if the configuration is such that the changeover switch 43.72 can absorb this delay, only one echo memory is required.

In order to absorb the delay using the changeover switch 43.72, for example, a plurality of latch circuits, a plurality of counter circuits,
By operating a subtracter, an AND gate, etc. in combination, a predetermined delay is applied to the switch 43, and a switching signal for the switch 72 is generated.

As a specific example of the device in the format shown in Figure 2, when using multi-level signals, a signal of one or more arbitrary levels used for digital information transmission is transmitted in advance to the receiving side. A multiplier for multiplying the wrap-around component by a value corresponding to each level of the signal used for digital information transmission is disposed on the input side of the storage means, Signals of multiple levels are transmitted in advance, the average value of the ratio between the transmitted signal and the wrap-around component is calculated, and the wrap-around components of the signals of all levels to the receiving side are combined or stored using the average value. It is possible to have a configuration like this.

That is, a signal at an arbitrary level among the levels used for digital information transmission, for example, A level, is transmitted to the receiving side.

If it is assumed that the signal distortion component b1 of the other level al is combined or stored using a multiplier according to the following equation.

Multiple levels a.

When -an is used, bi/ai is determined for the 1-discount level bi, and the average value calculated using the following formula is determined.

Using this average value, it is synthesized and stored using the following formula.

Any one or more of the above-mentioned single-level signals can be obtained as follows.

That is, converting the digital information to be transmitted into levels,
The corresponding level is read from the read-only memo 'J (ROM), multiplied by the reference transmission pulse using a multiplier circuit, a multi-level transmission signal is synthesized, and the synthesized output is sent to the hybrid circuit via the DA converter. Send to.

To obtain the wrap-around component to the receiving side in advance, appropriate digital information may be supplied to the read-only memory.

The device shown in FIG. 2 can also be used when a rectangular pulse with a duty of 50% is used instead of the squared cosine wave or Gaussian pulse described above, and when the response does not extend to adjacent signal sections, for example, as shown in FIG. It can be used in the following cases.

FIG. 4 and FIG. 5 are examples in which a rectangular pulse with a duty of 50% is used and the response extends to other signal sections.

In FIG. 4, it is necessary to store the response in echo memory 71 before starting data transmission.

First, turn the switch (51) 43 to the echo memory side, transmit an isolated pulse from the transmitter 51, and echo memo IJM (1
) to M(n).

It is necessary to prepare the number of echo memories corresponding to the expected length of the transient response of the system.

Next, data is transmitted, and the number of switches (S2) 72 at the output of the echo memories is the same as the number of echo memories, and each one is connected to a subtracter 91.

Initially, switch 72 is connected to O (contact 720).

When rlJ is transmitted here, one of the nl-specific switches is switched to one of the nf1M] echo memories.

Subsequently, when "1" is transmitted, one of the remaining "n-IJf" switches is switched to any one of the remaining "n-IJffAl" memories.

Similarly, when "l" is transmitted, the switch changes from O to echo memory.

Thereafter, the switches connected to the echo memory are switched to O one after another after the transient response time has elapsed, preparing for the transmission of a new rlJ.

In this case, it may be necessary to time-division multiplex these operations.

In this case, when new data arrives one after another in the echo memory, while maintaining the current readout,
Time division multiplexing is performed on the next data to be processed in the next time slot.

FIG. 5 shows an example in which the switch shown in FIG. 4 does not need to be changed.

In FIG. 5, responses to all combinations of transmitted data are stored, and the corresponding responses are read out using the transmitted data as an address.

In principle, there are infinite combinations, but if the transient response time is finite, there is no need to store infinite combinations.

That is, even if the transient response continues for n signal periods, In
Since it does not have any effect on the +LJf fixed signal,
The combinations to be stored need only be considered for n signal sections.

In FIG. 5, first, before starting data transmission, responses to all transmission data combinations of n signal sections are stored in memory.

Next, the switch (Sl) 43 is switched to prepare for data transmission.

Transmission data is input to an n-bit buffer 81 and transmitted simultaneously.

The buffer 81 stores the past n1 transmission data, and this serves as a memory address so that the response can be read from the memory.

Then, the buffers are updated one after another, and responses corresponding to the transmission data of the past n signal sections are read out from the memory, thereby performing echo cancellation.

That is, in FIG. 5, all combination patterns of digital information to be transmitted that occur within an arbitrary fixed time are transmitted in advance by the transmitter 51, and the wrap-around components to the receiving side for each of these combination patterns are calculated. A storage device 71 that stores the value at the time when the wrap-around component is to be removed, and a buffer memory 81 that holds the generated digital information for a certain period of time and updates the contents each time it is transmitted are provided. memory 8
According to the combination of digital information held in the storage device 71, the wrap-around component of the transmitted signal to the receiving side is read out from the storage device 71, and the subtracter 91 calculates the difference with the signal component on the receiving side. Remove wraparound components.

In the apparatus of FIG. 5, it is assumed that the transient response of the transmitted signal lasts n signal periods (al s a2t...an).

This means that the wrap-around component to the receiving side when the signal a1 is transmitted remains even when an is transmitted after nf[ffi.

Of course, wrap-around components of the signals a2 to an-1 also remain there.

In the storage device 71, the sum of the wrap-around components of a1 to an is stored as a pattern (al, a2...an) when an is transmitted.
is stored as a wrap-around component.

Therefore, if all combinations of nflffi transmission signals are stored in advance, wrap-around components for all patterns that occur when data transmission is actually started can be obtained.

If the system is stationary, the value of the wrap-around component stored in advance should match the value of the wrap-around component that occurs when data is actually transmitted. The echo can be completely removed by reading out the component and subtracting it.

Regarding the embodiments shown in FIGS. 4 and 5, when using them for multi-level transmission, use FIG. 4 and place a multiplier on the output of the memory to multiply the output by a value corresponding to the transmission level. It can be done easily.

It is also possible to use FIG. 5, but the memory capacity will be limited.

FIG. 7, FIG. 8, and FIG. 11 are examples in which a 100% duty rectangular pulse is used.

FIG. 7 shows an embodiment used when the time for the step response to reach its final value is shorter than the pulse width T (FIG. 9).

The echo memory 71 has two parts: one for storing the response shown in FIG. 9, and the other for storing the final value of the step response.

Here, the final value of the step response refers to the convergence value at which the step response wave shown in FIG. 9 rises, pulsates for a while, and then converges to a constant value drawn by a horizontal line.

First, before starting data transmission, an isolated pulse is sent out, this response is stored in echo memory IJM (1), and the final value is stored in echo memory M (0).

Next, data transmission is started, but initially the switch 72 is connected to 0 (contact 720).

When the transmission data becomes rLJ, the switch 72 switches to echo memo IJM(1).

Subsequently, when rlJ is input, the switch 72 is switched to the echo memory IJ M(0), and unless a new "O" is input to the buffer, the switch 72 is switched to the echo memory M(0).
) is held.

Then, when rOJ is input, it is switched to echo memo IJ M (1), and when rOJ is further input, it is 0 (contact 720).
Switch to .

In other words, to summarize, if the time for the step response to reach its final value is close to the width of two square waves (2T) (the first
Figure 0) will be explained.

The circuit used is similar to that of FIG. 7, except for the previous example and FIG.

From d to memory, the final value, Figure 10b, Figure 10d 3
It turns out that different types are necessary.

Echo memory M(0) contains the final value, echo memory M(1
) stores the response shown in FIG. 10S, and echo memory M(2) stores the response shown in FIG. 10D, respectively.

Furthermore, when the transmission pattern changes from [J to rOJ, the step response continues for 2T time, so from rlJ to "0
” and then to rLJ again, change from “1” to “0.”
Unless the step response to `` is terminated at time T, it is necessary to prepare one more response.

Furthermore, it is necessary to provide two sets of switches (S2).

Examples of transmission patterns and switch (S2) operations are shown in the following table.

In this table, the operations are listed sequentially from top to bottom as time t elapses.

To summarize the operation, (e) When the transmission data changes from rOJ to ILJ, the switch connected to 0 is switched to echo memory M(1).

(b) The switch is set to echo memory M(1) or M(2).
), if the next transmission data is ``0'', the switch will store the echo memory M(1) or M for 2T.
(2) and then switched to O.

(1) If rlJ is subsequently input while the switch is connected to echo memory M(1), the switch is switched to echo memory M(2).

(When the switch is connected to echo memory M(2), if "1" is input next, the switch is switched to echo memory M(0).

It is as follows.

In the above table, when the transmission pattern is "lOl", the switches 52-1. Both switches 52-2 are connected to the echo memory M(1), and the contents shown in FIG. 10 are read out.

That is, first, the readout of the waveform shown in FIG. 10 is started by the switch S2-■, and when it progresses halfway and reaches 1-LOIJ, the switch 52-2 is operated and the reading of the waveform shown in FIG. 10 is started from the beginning. is performed, but the switch 52-t
The above-mentioned readout by is still performed.

In addition, as shown in the example of FIG.
A pattern analyzer 82 is provided to analyze the pattern of the transmitted data.
can be proactive and simplify the operation of the switch.

The device shown in FIG. 8 differs from the device shown in FIG. 7 in that a buffer 54 is added, but the basic operation is the same as that shown in FIG.

In the device shown in Fig. 8, by knowing the transmission data one bit ahead, the switch is suddenly changed from 0 to echo memory M(2) without changing the switch from echo memory M(1) to M(2). You can also switch.

However, in this case, Echo Memo IJ M(2) is M(
As with (), it is necessary to prepare two oka.

According to this configuration, even if the pattern in the 3-bit buffer 81 is root, . Since it can be known in advance by the existence of the bit buffer 54, the switch can be suddenly changed from O to echo memory M(2).

FIG. 11 shows an embodiment used when n rectangular wave widths are required before the step response reaches its final value.

The operation itself is similar to that shown in FIGS. 7 and 8.

In FIG. 11, as in FIG. 8, another buffer is provided on the transmission data side and the operation of the echo memory selector switch S2 is sequentially changed to the echo memory M(1),
M(2), M(3).

You can suddenly switch to the desired echo memory without switching.

The size of the buffer needs to be In-LJ bits.

As mentioned above regarding transmission using rectangular pulses with a duty of 50%, if the time to reach the final value of the step response is relatively short, the response to all transmitted data patterns that occur during that transient response time is It is also possible to store it and read it out from memory according to the transmission pattern.

In that case, switch S2 is not required.

The configuration is similar to that shown in FIG. (7) Effects of the Invention According to the present invention, echo cancellation is extremely effective because the wraparound of the transmitted signal waveform itself is subtracted from the received signal, and since no calculations are required, errors are reduced and echo cancellation is extremely suitable. Since no multiplier is required, it is possible to avoid complication of the device and achieve desired echo cancellation with a relatively simple circuit configuration, which helps to solve the problems of the conventional type described above.

The concept of the echo canceller explained in the above embodiment is applicable to echo cancellation of leakage due to capacitance between transmission circuits that occurs regardless of hybrid in a 4-wire data transmission circuit, and to cancel echoes from other transmission circuits adjacent to the data transmission circuit. It can also be applied directly to echo cancellation for leakage.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a conventional data communication device, and FIGS. 2, 4, 5, 7, 8, and 11 are circuit diagrams of a data communication device according to an embodiment of the present invention. The circuit diagrams shown in FIGS. 3, 6, 9, and 10 are signal waveform diagrams corresponding to the embodiments described above. (Explanation of symbols) 1: Transmission circuit, 2: Hybrid circuit,
3; Transmission circuit, 4; Receiving circuit, 43; Selector switch, 5
; Transmission data terminal, 51; Transmitter, 6; Receiving terminal (echo canceller output), 71; Echo memory, 72; Changeover switch, 91; Subtractor.

Claims (1)

[Scope of Claims] 1. Storage means for storing wrap-around components to the receiving side of a transmission signal used for transmitting digital information sent out in advance, and a component stored in the storage means in advance. means for reading out the wraparound component of the transmission signal to the reception side corresponding to the digital information to be transmitted from among the wraparound components of the transmission signal to the reception side; and the output of the storage means read by the readout means; an echo canceller having a difference means for calculating a difference between the signal component and the signal component on the receiving side;
Thereby, the wrap-around component of the transmitted signal to the receiving side is removed by calculating the difference between the pre-stored wrap-around component of the transmitted signal to the receiving side and the signal component on the receiving side. A data communication device characterized by: 2. When using a multi-level signal, the storage of the wrap-around component in the storage means is performed by transmitting in advance a signal at one or more arbitrary levels among the levels used for digital information transmission, and sending it to the receiving side. A multiplier for multiplying the wrap-around component by a value corresponding to the level of each signal used for digital information transmission is arranged on the input side of the storage means,
Any one of the levels used for digital information transmission
One or more levels of signals are transmitted in advance, the average value of the ratio between the transmitted signal and the wrap-around components is calculated, and the average value is used to combine the wrap-around components of all the levels of signals to the receiving side. The data communication device according to claim 1, wherein the data communication device performs the data communication by storing. 3. The pre-transmission of the plurality of levels of signals is performed as a pre-transmission of all combination patterns of digital information to be transmitted that occur within an arbitrary fixed time, and the digital information that has been generated is transmitted to the reading means at a constant rate. A buffer memory is provided that retains time and updates its contents each time it is transmitted, and reads out the wrap-around component of the transmitted signal to the receiving side from the storage device according to the combination of digital information held in the buffer memory, and reads out the wraparound component of the transmitted signal to the receiving side. Claim 2, wherein the signal component of the transmitted signal is removed by calculating the difference between the signal component and the signal component of the transmitted signal.
The data communication device described in Section.