JPS5828893U - display circuit - Google Patents

display circuit

Info

Publication number
JPS5828893U
JPS5828893U JP12402281U JP12402281U JPS5828893U JP S5828893 U JPS5828893 U JP S5828893U JP 12402281 U JP12402281 U JP 12402281U JP 12402281 U JP12402281 U JP 12402281U JP S5828893 U JPS5828893 U JP S5828893U
Authority
JP
Japan
Prior art keywords
capacitor
diode
transistor
display circuit
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12402281U
Other languages
Japanese (ja)
Other versions
JPH0342476Y2 (en
Inventor
和彦 河野
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP12402281U priority Critical patent/JPS5828893U/en
Publication of JPS5828893U publication Critical patent/JPS5828893U/en
Application granted granted Critical
Publication of JPH0342476Y2 publication Critical patent/JPH0342476Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Measurement Of Current Or Voltage (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の表示回路の結線図、第2図はこの考案の
表示回路の1実施例の結線図である。
FIG. 1 is a wiring diagram of a conventional display circuit, and FIG. 2 is a wiring diagram of one embodiment of the display circuit of this invention.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 信号入力端子に接続された充電用の第1コンデンサと、
該コンデンサに直列に接続された整流用の第1ダイオー
ドと、一端が前記第1コンデンサと前記第1ダイオード
の接続点に接続され前記第1コンデンサの充電路を形成
する整流用の第2ダイオードとにより、入力信号の倍電
圧整流回路を構成し、前記倍電圧整流回路の整流出力を
平滑する平滑用の第2コンデンサと、平滑された前記整
流出力がベースに入力されるトランジスタと、該トラン
ジスタにより点灯制御される表示素手とを備えるととも
に、前記第2ダイオードの他端を前記t−ランジスタの
エミッタに接続し、前記第2ダイオードの動作基準電圧
を前記トランジスタのエ −ミッタ電圧により制御した
表示回路。
a first capacitor for charging connected to the signal input terminal;
a first rectifying diode connected in series to the capacitor; and a second rectifying diode having one end connected to a connection point between the first capacitor and the first diode to form a charging path for the first capacitor. constitutes a voltage doubler rectifier circuit for an input signal, a second smoothing capacitor for smoothing the rectified output of the voltage doubler rectifier circuit, a transistor to which the smoothed rectified output is input to the base; a display circuit whose lighting is controlled; the other end of the second diode is connected to the emitter of the T-transistor; and the operating reference voltage of the second diode is controlled by the emitter voltage of the transistor. .
JP12402281U 1981-08-20 1981-08-20 display circuit Granted JPS5828893U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12402281U JPS5828893U (en) 1981-08-20 1981-08-20 display circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12402281U JPS5828893U (en) 1981-08-20 1981-08-20 display circuit

Publications (2)

Publication Number Publication Date
JPS5828893U true JPS5828893U (en) 1983-02-24
JPH0342476Y2 JPH0342476Y2 (en) 1991-09-05

Family

ID=29917910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12402281U Granted JPS5828893U (en) 1981-08-20 1981-08-20 display circuit

Country Status (1)

Country Link
JP (1) JPS5828893U (en)

Also Published As

Publication number Publication date
JPH0342476Y2 (en) 1991-09-05

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