JPS5824922B2 - Manufacturing method of variable resistor - Google Patents
Manufacturing method of variable resistorInfo
- Publication number
- JPS5824922B2 JPS5824922B2 JP51034648A JP3464876A JPS5824922B2 JP S5824922 B2 JPS5824922 B2 JP S5824922B2 JP 51034648 A JP51034648 A JP 51034648A JP 3464876 A JP3464876 A JP 3464876A JP S5824922 B2 JPS5824922 B2 JP S5824922B2
- Authority
- JP
- Japan
- Prior art keywords
- highly conductive
- circuit
- conductive material
- support
- resistive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Adjustable Resistors (AREA)
Description
【発明の詳細な説明】
本発明は可変抵抗器を回路板から製造する方法に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a variable resistor from a circuit board.
抵抗回路板として、絶縁支持体上に、順次に抵抗材料と
高導電材料とを積層することにより基板を得、導体用回
路のパターンと抵抗用回路のパタ一ンとの合成2ターン
に対してネガ像の関係にある部分の高導電材料並びに抵
抗材料を、合成パターン部分をフォトレジスト膜でマス
クのうえエツチングし、次いで、抵抗用回路のパターン
部分を除いてフォトレジスト膜でマスクし、抵抗用回路
のパターン部分の高導電材料をエツチングするものが知
られている。As a resistive circuit board, a resistive material and a highly conductive material are sequentially laminated on an insulating support to obtain a board. The highly conductive material and the resistive material in the areas related to the negative image are etched by masking the composite pattern part with a photoresist film, then masking with a photoresist film except for the resistor circuit pattern part, and etching the resistor material. Etching methods are known for etching highly conductive materials in circuit pattern areas.
しかしながら、上記の抵抗回路板では、導体用回路に、
刷子で選択される敷部の電極を設け、導体用回路中に選
択されるべき抵抗体を介在させ、刷子による電極の選択
で回路抵抗値を変化させる構成の可変抵抗器を得る場合
、電極が支持体上面よりも段状に高く形成されるために
、刷子の摺動に不利な段差が電極端縁に生じ、刷子の移
動にかなり大きなトルクを必要とする、刷子、電極の摩
耗が顕著になる等の不具合が避けられない。However, in the above-mentioned resistor circuit board, in the conductor circuit,
When obtaining a variable resistor with a configuration in which a bottom electrode is selected by a brush, a resistor to be selected is interposed in the conductor circuit, and the circuit resistance value is changed by selecting the electrode by the brush, the electrode is Because it is formed in a stepped manner higher than the top surface of the support, a step is created at the electrode edge that is disadvantageous for brush sliding, and a considerable amount of torque is required to move the brush, resulting in noticeable wear of the brush and electrode. Unavoidable problems such as
本発明に係る可変抵抗器の製造方法は、上述の難点のな
い可変抵抗器を製造し得る方法であり、絶縁支持体上に
、抵抗材料と高導電材料とを順次に積層した基板におい
て、電極端子を含む導体回路のパターンと抵抗回路のパ
ターンとの合成パターンに対しネガ像の関係にある部分
の高導電材料並びに抵抗材料を除去し、次いで、残存さ
れた上記合成パターンの高導電材料並びに抵抗材料の部
分を加圧により支持体に埋没させて、高導電材料の表面
を支持体の表面と面一になし、而るのち、抵抗回路のパ
ターン部分の高導電材料を除去することを特徴とするも
のである。The method for manufacturing a variable resistor according to the present invention is a method for manufacturing a variable resistor that does not have the above-mentioned difficulties. The highly conductive material and the resistive material in the portions that have a negative image relationship with the composite pattern of the conductor circuit pattern including the terminal and the resistor circuit pattern are removed, and then the remaining highly conductive material and resistor of the composite pattern are removed. The method is characterized by embedding a portion of the material in the support by applying pressure so that the surface of the highly conductive material is flush with the surface of the support, and then removing the highly conductive material in the pattern portion of the resistance circuit. It is something to do.
本発明において、基板の抵抗材料並びに高導電材料の層
を導体用回路のパターンと抵抗用回路のパターンとの合
成パターンに形成した段階では、第1図に示すように、
抵抗材料a並びに高導電材料すの各層は支持体Cの上面
よりも高い位置にある。In the present invention, at the stage where the layers of the resistive material and the highly conductive material of the substrate are formed into a composite pattern of the conductor circuit pattern and the resistor circuit pattern, as shown in FIG.
Each layer of the resistive material A and the highly conductive material A is located at a higher level than the upper surface of the support C.
而して、次の加圧工程で合成パターンの抵抗材料a並び
に高導電材料すが、支持体Cに埋没され、第2図に示す
ように、高導電材料すの上面が支持体Cの上面に面一と
される。In the next pressurizing step, the resistive material a and the highly conductive material of the composite pattern are buried in the support C, and as shown in FIG. It is said that they are on the same level.
従って、合成パターンに対し、高導電材料の抵抗用回路
部分に相当する部分が除去された第3図に示す段階では
、支持体Cの上面に面一な導体用回路が形成され、導体
用回路である電極は支持体に面一とされる。Therefore, at the stage shown in FIG. 3 in which the part corresponding to the resistor circuit part of the highly conductive material is removed from the composite pattern, a flush conductor circuit is formed on the upper surface of the support C. The electrode is flush with the support.
このため、電極に対する刷子の摺動はひつかNりなくス
ムースに行われる。Therefore, the brush slides smoothly against the electrode without any hesitation.
本発明において、支持板には、通常熱可塑性プラスチッ
クが使用され、上記の加圧時、支持板は加熱により軟化
される。In the present invention, a thermoplastic is usually used for the support plate, and the support plate is softened by heating during the above-mentioned pressurization.
支持板に、熱硬化性プラスチックを使用することもでき
、この場合、上記の加圧までの工程においては、半硬化
状態に保持し、加圧時には加熱により軟化させ、次いで
硬化させることができる。Thermosetting plastics can also be used for the support plate, and in this case, in the steps up to the above-mentioned pressurization, it can be kept in a semi-hardened state, softened by heating during pressurization, and then hardened.
なお、導体用回路には、次の実施例で示すように、導体
用回路に形成されるべき銅箔をエツチング液から遮断し
、又リード線が接続される電極のハンダ付は性を向上さ
せるために、金メッキを施すこともできる。In addition, as shown in the following example, for conductor circuits, the copper foil to be formed in the conductor circuit is shielded from the etching solution, and the electrodes to which the lead wires are connected are soldered to improve performance. For this purpose, gold plating can be applied.
以下、本発明の実施例について説明する。Examples of the present invention will be described below.
実施例
回路基板は、厚み16mmのガラス−エポキシ積層板の
片面にニッケル主成分の抵抗層を設け、その上に銅箔を
接合した構成である。The circuit board of the example has a structure in which a resistance layer mainly composed of nickel is provided on one side of a glass-epoxy laminate having a thickness of 16 mm, and a copper foil is bonded thereon.
この回路基板の銅箔面にドライフォトポリマーフィルム
(デュポン社製、商品名、リストン16S:をラミネー
トし、常法により露光、現像し、導体用回路に該当する
銅箔部分を露出させ、この露出面に、厚さ1ミクロンの
金メッキを常法により施す。A dry photopolymer film (manufactured by DuPont, trade name, Riston 16S) is laminated on the copper foil surface of this circuit board, exposed and developed by a conventional method to expose the copper foil portion corresponding to the conductor circuit, and The surface is plated with gold to a thickness of 1 micron using a conventional method.
次いで、残存するドライフォトフィルムを常法に従い剥
離し、基板を洗浄のうえ乾燥し、銅箔面に、整面後、再
びドライフォトフィルムをラミネートし、このフィルム
を露光、現像により、導体用回路のパターンと抵抗用回
路のパターンとの合成パターン部分を残して、除去する
。Next, the remaining dry photo film is peeled off according to a conventional method, the board is washed and dried, and the dry photo film is again laminated on the copper foil surface after smoothing, and this film is exposed and developed to form a conductor circuit. is removed, leaving a composite pattern portion of the pattern and the resistor circuit pattern.
このドライフォトフィルムの除去により露出された銅箔
面を下記の配合液(温度50℃)でエツチング除去し、
更に、このエツチングにより露出された抵抗材料層を下
記の配合液(温度90℃)でエツチング除去する。The copper foil surface exposed by removing this dry photo film was etched and removed using the following compounded solution (temperature 50°C).
Further, the resistive material layer exposed by this etching is removed by etching with the following mixed solution (temperature: 90° C.).
銅箔エツチング液 Cr 03 3009 濃硫酸 35g 水 11 抵抗材料層のエツチング液 Fe2(S04)2 400g 濃硫酸 368g 水 11 次いで、残存レジストを剥離、洗浄し、乾燥する。copper foil etching liquid Cr 03 3009 Concentrated sulfuric acid 35g water 11 Etching solution for resistive material layer Fe2(S04)2 400g Concentrated sulfuric acid 368g water 11 Next, the remaining resist is peeled off, washed, and dried.
この段階において、後述の導体用回路に形成されるべき
部分は、表面から金メッキ層、銅箔層並びに抵抗材料層
の構成であり、後述の抵抗用回路に形成されるべき部分
は表面から銅箔層並びに抵抗材料層の構成である。At this stage, the part to be formed into a conductor circuit (described later) consists of a gold plating layer, a copper foil layer, and a resistive material layer from the surface, and the part to be formed into a resistor circuit (to be described later) consists of a copper foil layer from the surface. The structure of the resistive material layer as well as the resistive material layer.
これらの部分は、何れも支持体の上面に実存されている
。All of these parts are present on the upper surface of the support.
上記の乾燥後は、回路基板をラミネーションプレスによ
り、上記の勇件で加熱、加圧する。After drying, the circuit board is heated and pressurized using a lamination press under the conditions described above.
プレスの条件
メイクアップ 回路基板の表、裏面に厚み2mmのステ
ンレススチイールの鏡面
板を、各1枚宛添接し、クッシ
ョン材として、厚さ2.00間の
クッションペーパーを上下に各
10枚宛配置。Pressing conditions Make-up Attach one mirror plate of stainless steel with a thickness of 2 mm to the front and back sides of the circuit board, and as cushioning material, attach 10 sheets each of cushion paper with a thickness of 2.00 mm on the top and bottom. Placement.
温 度 170℃
圧 力 20Kg/i
加圧時間40分
このプレスにより、上記の導体用回路相当部分、並びに
抵抗用回路相当部分が共に支持板に圧入され、これらの
部分と支持板とが面一にされる。Temperature: 170℃ Pressure: 20Kg/i Pressure time: 40 minutes With this press, both the portion corresponding to the conductor circuit and the portion corresponding to the resistor circuit are press-fitted into the support plate, and these parts and the support plate are flush with each other. be made into
プレス後は、前記の銅箔エツチングの条件で、抵抗用回
路パターンに該当する部分から、銅箔を除去する。After pressing, the copper foil is removed from the portion corresponding to the resistor circuit pattern under the copper foil etching conditions described above.
この除去により抵抗用回路が形成され、この形成と同時
に導体用回路が形成される。By this removal, a resistor circuit is formed, and at the same time as this formation, a conductor circuit is formed.
この導体用回路の銅箔表面には、金メッキ層が被覆され
ているので、上記のエツチング時、導体用回路の銅箔は
除去されない。Since the surface of the copper foil of the conductor circuit is coated with a gold plating layer, the copper foil of the conductor circuit is not removed during the above etching.
この金メッキ層に代えて、フォトレジスト膜を使用する
こともできる。A photoresist film can also be used instead of this gold plating layer.
上記のエツチング後は、充分に水洗、乾燥のうえ、抵抗
用回路部分にエポキシ系のカバーコートを施し、これに
て可変抵抗器の製造を完了する。After the above etching, the resistor circuit is thoroughly washed and dried, and an epoxy cover coat is applied to the resistor circuit portion, thereby completing the manufacture of the variable resistor.
このようにして得られた可変抵抗器においては、導体用
回路の導体表面が支持板と面一であり、刷子に接触され
る電極表面と支持板表面との面−化が叶えられる。In the variable resistor thus obtained, the conductor surface of the conductor circuit is flush with the support plate, and the electrode surface that comes into contact with the brush and the support plate surface can be made flush.
又、導体用材料層並びに、抵抗用材料層を支持板に圧入
する際、抵抗用材料層の全面が導体用材料層、すなわち
銅箔で覆われているから、抵抗用材料層が局部的に圧入
されるようなことがな(、従って、この局部的圧入時に
生じる抵抗用材料層の亀裂、破断等もな(、抵抗用材料
層の特性も良好に保持され得る。Furthermore, when press-fitting the conductor material layer and the resistance material layer into the support plate, since the entire surface of the resistance material layer is covered with the conductor material layer, that is, copper foil, the resistance material layer may be partially There is no pressure-fitting (therefore, there is no cracking, breakage, etc. of the resistive material layer that occurs during this local press-fitting), and the properties of the resistive material layer can be maintained well.
第1図、第2図、第3図は本発明を示すための説明図で
あり、第1図は圧入工程前の段階を、第2図は圧入工程
後の段階を、第3図は回路成形後の段階をそれぞれ示し
ている。
図において、aは抵抗材料、bは高導電材料、Cは支持
体である。Figures 1, 2, and 3 are explanatory drawings to illustrate the present invention, with Figure 1 showing the stage before the press-fitting process, Figure 2 the stage after the press-fitting process, and Figure 3 the circuit. Each stage after molding is shown. In the figure, a is a resistive material, b is a highly conductive material, and C is a support.
Claims (1)
層した基板において、電極端子を含む導体回路のパター
ンと抵抗回路のパターンとの合成パターンに対しネガ像
の関係にある部分の高導電材料並びに抵抗材料を除去し
、次いで、残存された上記合成パターンの高導電材料並
びに抵抗材料の部分を加圧により支持体に埋没させて、
高導電材料の表面を支持体の表面と面一になし、而るの
ち、抵抗回路のパターン部分の高導電材料を除去するこ
とを特徴とする可変抵抗器の製造方法。1. In a substrate in which a resistive material and a highly conductive material are sequentially laminated on an insulating support, the high conductivity of a portion that is in a negative image relationship with respect to a composite pattern of a conductive circuit pattern including an electrode terminal and a resistive circuit pattern material and the resistive material are removed, and then the remaining portions of the highly conductive material and the resistive material of the composite pattern are buried in the support by applying pressure,
A method for manufacturing a variable resistor, which comprises making the surface of the highly conductive material flush with the surface of the support, and then removing the highly conductive material from the patterned portion of the resistance circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51034648A JPS5824922B2 (en) | 1976-03-29 | 1976-03-29 | Manufacturing method of variable resistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51034648A JPS5824922B2 (en) | 1976-03-29 | 1976-03-29 | Manufacturing method of variable resistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS52118246A JPS52118246A (en) | 1977-10-04 |
JPS5824922B2 true JPS5824922B2 (en) | 1983-05-24 |
Family
ID=12420250
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP51034648A Expired JPS5824922B2 (en) | 1976-03-29 | 1976-03-29 | Manufacturing method of variable resistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5824922B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0481431U (en) * | 1990-11-28 | 1992-07-15 |
-
1976
- 1976-03-29 JP JP51034648A patent/JPS5824922B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0481431U (en) * | 1990-11-28 | 1992-07-15 |
Also Published As
Publication number | Publication date |
---|---|
JPS52118246A (en) | 1977-10-04 |
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