JPS5823490A - Optoelectric transducer - Google Patents

Optoelectric transducer

Info

Publication number
JPS5823490A
JPS5823490A JP56122708A JP12270881A JPS5823490A JP S5823490 A JPS5823490 A JP S5823490A JP 56122708 A JP56122708 A JP 56122708A JP 12270881 A JP12270881 A JP 12270881A JP S5823490 A JPS5823490 A JP S5823490A
Authority
JP
Japan
Prior art keywords
electrode
semiconductor
semiconductor layer
tiox
antireflection film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56122708A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP56122708A priority Critical patent/JPS5823490A/en
Publication of JPS5823490A publication Critical patent/JPS5823490A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To utilize incident light at its maximum with high efficiency by forming the antireflection film of a section with no electrode in predetermined thickness in the optoelectric transducer for a photosensor or a solar cell. CONSTITUTION:A semiconductor substrate 1 is thermally oxidized in an oxygen atmosphere, and a silicon oxide film is formed. Resists are selectively shaped to the peripheral section of the surface and the back of a semiconductor 1, only the upper surface of the semiconductor is exposed through selective etching, and the ARF3 of an oxide is formed to the whole upper surface is such a manner that it is added to a substance such as TiOx and P2O5 is mixed to TiOx by 0.1-10%. The antireflection film made of TiOx, etc. is shaped through heating. resist films 5 are printing-formed except electrode window holes 8, 8' by using a screen mask through a printing method, etc., the ARF in the window holes 8, 8' is removed by an acidic etching liquid, and the surfaces of a semiconductor layer 4 are exposed at 10, 11. The whole is immersed in a nickel electroless plating liquid forming a metallic electrode, and nickel is deposited and plated onto the surfaces 10, 11 of the semiconductor and the resist films 5. The resists are removed by an organic solvent, and unnecessary metal is lifted off. Accordingly, the external extracting electrode hole 8 and the pectinate type electrode hole 8 also take the same form, and an electrode 13 and an external extracting electrode 12 shaped while the metallic electrodes are fast stuck onto the semiconductor layer are formed.

Description

【発明の詳細な説明】 本発明は光電変換装置およびその作製方法に関する。[Detailed description of the invention] The present invention relates to a photoelectric conversion device and a method for manufacturing the same.

本発明は光電変換装置特に7オトセンサまたは太陽電池
として用いようとするもので、この反射防止膜を形成し
た後この被膜をレジストにて選択的に除去するとともに
この同じフォトレジストを利用してこの除−去された同
一形状を有した窓穴部分のみ金属電極を無電界メッキ法
で形成し、他部をリフトオフ法により除去することを特
徴としている。
The present invention is intended to be used as a photoelectric conversion device, particularly a 7-otosensor or a solar cell, and after forming this anti-reflection film, this film is selectively removed with a resist, and this same photoresist is used to remove this film. - A metal electrode is formed only on the removed window hole portion having the same shape by electroless plating, and the other portion is removed by lift-off method.

かかる同一窓穴を利用したセルファライン方法を用いる
ことにより、従来電極部の上側に反射防止膜がおおいか
ぶさシ外部引出し電極との電気的接続を困難にしていた
。こうしたこれまでの欠点を除くことができ、さらに電
極の側部は同じ窓穴を用いるため反射防止膜と隣接さ−
せることかできる。このためこの電極のない部分の反射
防止膜はすべて基板上面に対し同じ一平面状を有する一
定または実質的に一定の厚さに形成させることができる
。そのため入射光の最天眼の高効率利用をすることがで
きるという特徴を有する。
By using such a self-line method using the same window hole, conventionally, an anti-reflection film was covered above the electrode portion, making it difficult to electrically connect it to the external lead-out electrode. These conventional drawbacks can be eliminated, and since the side of the electrode uses the same window hole, it is adjacent to the anti-reflection coating.
I can do it. Therefore, all of the antireflection films in the areas without electrodes can be formed to have a constant or substantially constant thickness and have the same planar shape with respect to the upper surface of the substrate. Therefore, it has the feature that it is possible to use the most celestial eye of the incident light with high efficiency.

本発明はまた一導電型の半導体の上面に反射防止膜を酸
化チタン、酸化珪素、酸化タンタル窒化チタン等を塗付
法またはスクリーン印刷法にて形成させた後、不純物を
半導体中に拡散させて半導体層を形成する方法に関する
。すなわちこの反射防止膜(以下ARPという)中に半
導体の導電型とは逆の導電型を構成する不純物例えばP
型半導体の場合、ARP中に五酸化リン等のリン化合物
を添加しておき、このARPの形成後800〜1000
’0の温度にて10〜30分加熱し、ARPのシンター
を行なうとともに、その直下の半導体中にARP中の■
価またはV価の不純物を拡散して逆導電型の不純物層を
形成する方法に関する。
The present invention also includes forming an antireflection film on the upper surface of a semiconductor of one conductivity type using titanium oxide, silicon oxide, tantalum nitride titanium oxide, etc. by a coating method or screen printing method, and then diffusing impurities into the semiconductor. The present invention relates to a method of forming a semiconductor layer. That is, in this anti-reflection film (hereinafter referred to as ARP), impurities constituting a conductivity type opposite to that of the semiconductor, such as P.
In the case of a type semiconductor, a phosphorus compound such as phosphorus pentoxide is added to the ARP, and after the formation of the ARP, the
Heating for 10 to 30 minutes at a temperature of
The present invention relates to a method of forming an impurity layer of opposite conductivity type by diffusing valent or V-valent impurities.

本発明はさらにニッケルの無電界メッキ法中に同様に半
導体層と同様の不純物であ91価(例えばホウ素)、V
価(例えばリン)を添加し、これらの不純物を含有した
金属膜例えばニッケル膜を形成することによシ高信頼性
を有する光電変換装置を設けることに関する。
The present invention further provides that during electroless plating of nickel, impurities similar to those in the semiconductor layer, such as 91-valent (for example, boron), V
The present invention relates to providing a photoelectric conversion device having high reliability by doping impurities such as phosphorus and forming a metal film, such as a nickel film, containing these impurities.

従来の光電変換装置は第1図にその一例の製造工程を含
めたたて断面図を示しである。
FIG. 1 shows a vertical sectional view of an example of a conventional photoelectric conversion device including its manufacturing process.

図面において半導体基板(1)例えばP型1〜3A−c
mの表面にN型半導体層(4)を形成する。さらにこの
上面にアルミニューム膜を0.5〜1μの厚さに形成し
た。さらにフォトエツチング工程によシレジストα■を
マスクとして不要の材料(10)を選択的に除去する。
In the drawings, a semiconductor substrate (1), for example, P type 1 to 3A-c
An N-type semiconductor layer (4) is formed on the surface of m. Furthermore, an aluminum film with a thickness of 0.5 to 1 .mu.m was formed on this upper surface. Furthermore, unnecessary material (10) is selectively removed by a photo-etching process using the resist α2 as a mask.

この後第1図(C)に示す如く反射防止M(6)を半導
体表面上の絶縁膜(5)土および対抗電極(10)をお
おって1/4λにして屈折率1.8〜2.2の膜を形成
する。
Thereafter, as shown in FIG. 1(C), an anti-reflection layer (6) is applied to cover the insulating film (5) on the semiconductor surface and the counter electrode (10) to reduce the refractive index to 1.8-2. A second film is formed.

かかる方法で作られた従来の方法においては光翰を透過
する領域(イ)において金属電極をエツチングする強酸
性液が使われ損傷がおきやすい。
In the conventional method made using this method, a strong acidic solution is used to etch the metal electrode in the region (a) where the light passes through, which is likely to cause damage.

さらにこの対抗電極(7)に対しては反射防止膜(3)
が電極の機械的損傷を防ぐという特徴を有し“ながらも
この電極と出力との間の電気的連続のためにさらにこの
反射防止膜に選択的に外部引出し用電極穴を形成させな
ければならないという欠点を有している。さらにこの反
射防止膜(6)を真空蒸着法でSiO等を蒸着して形成
させようとすると、この電極の側部が蒸着されにくくき
わめて薄くなってしまう。さらに図示した如く、塗付法
によ多形成するとこの側部員にのみ本来の700〜10
0OAの厚さではなく 5000A〜1μも形成されて
しまい、この塗付された反射防止膜と電極00)との熱
歪が信頼性の劣化をおよぼす等工学的に実用化はきわめ
て困難なものとしている0本発明はかかる欠点を除去す
るため、半導体(1)の上面にまずARPを平面状に形
成し、その後選択的にこのARPを除去してこの除去さ
れた部分のみ対抗電極を同一窓穴にセルファライン方式
で形成させることを特徴とする0その結果この対抗電極
上に出力との間の連続用外部引出し電極のとりつけに従
来方法の如き特定の工程を必要としない。対抗電極の側
周辺において反射防止膜が形成されなかったシ厚く形成
されることがなく、反射防止膜は基板上に却−の厚さで
あシかつ面方向に対して均質の透過率、屈折率の値を得
ることができるようになった。
Furthermore, an anti-reflection film (3) is applied to this counter electrode (7).
Although it has the characteristic of preventing mechanical damage to the electrode, it is necessary to selectively form an electrode hole for external extraction in this antireflection film in order to maintain electrical continuity between this electrode and the output. Moreover, if this antireflection film (6) is attempted to be formed by depositing SiO or the like using a vacuum evaporation method, the side portions of this electrode will be difficult to evaporate and become extremely thin. As mentioned above, when the coating method is applied, the original 700 to 10 is applied only to this side member.
The thickness is not 0OA, but 5000A to 1μ, and thermal distortion between the applied antireflection film and the electrode 00) deteriorates reliability, making it extremely difficult to put it into practical use from an engineering perspective. In order to eliminate such drawbacks, the present invention first forms ARP in a planar shape on the upper surface of the semiconductor (1), then selectively removes this ARP, and connects only the removed portion with a counter electrode in the same window hole. As a result, a specific process unlike the conventional method is not required for attaching the external lead electrode for continuity between the output and the counter electrode on the counter electrode. Since the anti-reflection film is not formed around the side of the counter electrode, it is not formed thickly, and the anti-reflection film is formed on the substrate with a relatively thin thickness and has uniform transmittance and refraction in the plane direction. It is now possible to obtain the rate value.

さらに本発明においては、反射防止膜は酸化チタン(T
10x)、酸化珪累−酸化チタン混合物。
Furthermore, in the present invention, the antireflection film is titanium oxide (T
10x), silicon oxide-titanium oxide mixture.

酸化タンタル、透明導電膜(酸化スズ、工To)の如き
金属酸化物または窒化チタン、窒化インジュームの如き
金属窒化物によ多形成していること、そしてこのARF
下に不純物を拡散するさらに本発明はセルファライン電
極を構成するため、金属の無電界メッキ特にニッケルを
主成分とした金属(この中にホウ素、リンまたはチタン
、珪素等を添加してもよい〕をloO’c!以下の温度
にて形成している0この無電界メッキ法は装置が簡単で
あシ、多量生産が容易であり材料の使用効率がきわめて
高いという特徴を有している。
This ARF is formed in a metal oxide such as tantalum oxide, a transparent conductive film (tin oxide, etc.) or a metal nitride such as titanium nitride or indium nitride.
Further, in order to form a Selfaline electrode, the present invention uses electroless plating of a metal, especially a metal whose main component is nickel (boron, phosphorus, titanium, silicon, etc. may be added thereto). This electroless plating method is characterized in that the equipment is simple, mass production is easy, and material usage efficiency is extremely high.

以下に図面に従ってその詳細を記す。The details are described below according to the drawings.

第2図は本発明の一製造方法を示しているたて断面図で
ある。
FIG. 2 is a vertical sectional view showing one manufacturing method of the present invention.

第2図(A)において半導体基板(1)例えば珪素半導
体P型0.37100fLQm特に1〜34cmに対し
、表面、裏面を十分清浄にした後この基板を酸素雰囲気
中にて熱酸化して酸化珪素被膜を1000〜400OA
特に1500〜250OAの厚さにピンホールがないよ
うに形成した。
In FIG. 2(A), a semiconductor substrate (1), for example, a silicon semiconductor P type 0.37100 fLQm, especially 1 to 34 cm, is thoroughly cleaned on the front and back surfaces, and then thermally oxidized in an oxygen atmosphere to form silicon oxide. The coating is 1000~400OA
In particular, it was formed to have a thickness of 1500 to 250 OA without pinholes.

さらにこの上面に対しレジストを印刷法により選択的に
半導体(1)の表面の周辺部および裏面に形成した後、
選択エツチングを施して半導体上面のみ露呈させた。さ
らにこの露呈させた表面を含み上面全体に酸化物のA 
RP (3)を例えばT10xに加えてP、O,がTi
Oxに対し0.1〜10%混入したインクスクリーン法
または塗付法によシ焼成後700〜100OAの厚さに
なるように形成した0これはT i Ox−8i 07
7−PtOni合物のARII’を用いてもよい0この
塗付法には東京応化製の前記した塗付材を用い、スピナ
ーにて回転してその厚さを制御して形成した。またスク
リーン印刷法においてはマスクの網目の凹凸がなめらか
な波を形成して得られるか平却的に平面状を有せしめて
形成させている0 さらにTiOxに含まれるバインダーである炭化水素等
を加熱して気化式しめていわゆるTiOx等の反射防止
膜を形成した。
Furthermore, after selectively forming a resist on the periphery of the front surface and the back surface of the semiconductor (1) by a printing method on this upper surface,
Selective etching was performed to expose only the top surface of the semiconductor. Furthermore, oxide A is applied to the entire upper surface including this exposed surface.
For example, by adding RP (3) to T10x, P, O, are Ti
This is Ti Ox-8i 07, which was formed to a thickness of 700 to 100 OA after firing by an ink screen method or a coating method containing 0.1 to 10% of Ox.
7-PtOni compound ARII' may be used. In this coating method, the above-mentioned coating material manufactured by Tokyo Ohka Co., Ltd. was used, and the coating material was rotated with a spinner to control its thickness. In addition, in the screen printing method, the unevenness of the mesh of the mask is obtained by forming smooth waves, or is formed by flattening it into a planar shape.Furthermore, hydrocarbons, etc., which are binders contained in TiOx, are heated. This was then evaporated to form an antireflection film such as TiOx.

この加熱焼成を850〜10oO°Cとすることにより
、このARP中に含まれるリンが半導体中に熱拡散し、
シート抵抗1,0〜100 fLA3の基板とは逆導電
型の半導体層(4)を第2図(B)に厚さを示す如り0
.5μ以下の厚さに形成した。
By heating and firing at a temperature of 850 to 10oO°C, the phosphorus contained in this ARP is thermally diffused into the semiconductor.
The semiconductor layer (4), which has a conductivity type opposite to that of the substrate with a sheet resistance of 1.0 to 100 fLA3, has a thickness of 0 as shown in Figure 2 (B).
.. It was formed to a thickness of 5 μm or less.

さらに第2図(B)において、印刷法またはフォトエツ
チング法特に印刷法によりレジスト膜(5)をスクリー
ンマスクを用いて電極窓穴(8)、(g)を除き印刷形
成せしめた0さらにこの窓穴(8) 、 (a)におけ
るARPを酸性エツチング液にて除去し半導体層(4)
の表面を露呈00)、α力させた。
Furthermore, in FIG. 2(B), a resist film (5) is printed by a printing method or a photoetching method, particularly a printing method, using a screen mask except for the electrode window holes (8), (g). The ARP in the hole (8) and (a) is removed using an acidic etching solution, and the semiconductor layer (4) is removed.
00) and subjected to α force.

次にとの表面に対し清浄後水洗を行なった後5nC1!
、 HCI 、水の混液よりなるセンシタイガ−に5〜
30分浸し、叔戊何I;シた。さらに活性化剤であるレ
ッドシューマー液に5〜30分浸し、表面を活性化させ
た。この後これらを金属電極を構成するニッケル無電界
鍍金液(無電解メッキ液ともいう)すなわちここでは日
本カニャン製のシューマV液に浸した。すると半導体表
面00)。
Next, after cleaning and rinsing the surface with water, 5nC1!
, HCI, and water to Sensi Tiger.
Soak for 30 minutes and soak. Furthermore, the surface was activated by immersing it in Red Schumer's solution, which is an activator, for 5 to 30 minutes. Thereafter, these were immersed in a nickel electroless plating solution (also referred to as an electroless plating solution) constituting the metal electrode, that is, Schumer V solution manufactured by Kanyan Japan. Then the semiconductor surface 00).

α力のみならずレジスト膜(5)上にもニッケルが0.
1〜0.5μの厚さに析出メッキされた。
There is no nickel on the resist film (5) as well as on the α force.
Precipitation plating was performed to a thickness of 1 to 0.5 microns.

さらにこれを軽く水洗、湯洗をした後100〜200°
Cにて加熱乾燥させた。この時同時に裏面にも同様の金
属膜が裏面電極(6)として形成された。さらにこのレ
ジストをトリクレンの如き有機溶剤にて軽く釘4凍を加
えて溶去し、さらにその上面の不要の金属もリフトオン
し除去した。
Furthermore, after washing this lightly with water and hot water, heat it at 100-200°
It was heated and dried at C. At this time, a similar metal film was also formed on the back surface as a back electrode (6). Furthermore, this resist was dissolved away by lightly adding nail 4 freezing with an organic solvent such as trichlene, and unnecessary metal on the upper surface was also lifted on and removed.

かくして外部引出し電極穴(8)およびくし型電極穴(
8)も同じ形状で金属電極が半導体層上に密接して形成
された電極α埠、外部引出し電極α埠を構成させた。
Thus, the external lead-out electrode hole (8) and the comb-shaped electrode hole (
8) also had the same shape as the metal electrode formed closely on the semiconductor layer, forming an electrode α-hole and an external lead-out electrode α-hole.

かかる第2図(0)の構造において、電極α1,0■は
その側周辺にARPが隣接し電極大全体に同一形状にメ
ッキされるため、ARPと電極との間に間隔ができた。
In the structure shown in FIG. 2(0), the ARP is adjacent to the electrode α1,0■ on its side and the entire electrode is plated in the same shape, so there is a gap between the ARP and the electrode.

また側周辺に第1図(C)の(至)の如くもシ上ること
もなく、反射防止膜としての効果が大であった。
In addition, there was no rise around the sides as shown in (to) in FIG. 1(C), and the effect as an antireflection film was great.

この電極α→の部分が拡大されて第3図に示されている
This portion of the electrode α→ is shown in an enlarged view in FIG.

すなわち半導体(1)上の逆導電型の半導体層(4)の
表面に密接して電極(2)とさらにこの上面にノ1ンダ
の如き補助電極α→よシなる電極(7)を有しこの電極
の側周辺の下部に隣接してA RP (3)が設けられ
ている。このためこの側部でのすきまが全くない。
That is, an electrode (2) is closely attached to the surface of the semiconductor layer (4) of the opposite conductivity type on the semiconductor (1), and an auxiliary electrode (alpha) such as a conductor (7) is further provided on the upper surface of the electrode (2). A RP (3) is provided adjacent to the lower part of the periphery of this electrode. Therefore, there is no gap at all on this side.

図面ではARPはスクリーン印刷法で形成したため網目
に対応して表面になめらかな凹凸を有しているが、これ
は入射光−を複屈折させるためさらに反射率を下げる効
果があった。
In the drawing, since the ARP was formed by a screen printing method, it has smooth irregularities on the surface corresponding to the mesh, but this had the effect of further lowering the reflectance because it caused the incident light to be birefringent.

このARPはなめらかな凹凸があって平均的には半導体
上面上に平面状に形成されており、実用上理想構造を有
していた。
This ARP had smooth irregularities and was formed in an average planar shape on the upper surface of the semiconductor, and had a practically ideal structure.

以上の第2図(C)の構造において、変換効率10〜1
8 % s開放電圧0.55〜0.60vをA M l
 (100mW/C,a)にて、得ることができた。ま
た3001xの螢光燈下においても7〜9%、開放電圧
0.4〜0.45Vを得ることができた。さらにこの工
程はセルファライン工程を用いているとともにARPが
不純物の拡散源をかねているため製造工程がきわめて簡
単である0さらにスクリーン印刷法を用いると、10C
♂等の矩形の太陽電池に対しても周辺部も均一な膜厚と
することができ、実に好都合であった。
In the structure shown in FIG. 2(C) above, the conversion efficiency is 10 to 1.
8% s open circuit voltage 0.55~0.60v A M l
(100 mW/C, a). Further, even under a 3001x fluorescent light, an open circuit voltage of 7 to 9% and an open circuit voltage of 0.4 to 0.45 V could be obtained. Furthermore, this process uses the Selfa Line process and the ARP also serves as a diffusion source for impurities, making the manufacturing process extremely simple.
Even for a rectangular solar cell such as a male, the film thickness can be made uniform in the peripheral area, which is very convenient.

第4図は本発明の他の実施例を示している。FIG. 4 shows another embodiment of the invention.

すなわち第4図(A)において基板半導体例えばP型0
.5〜100ユamの珪素に対し第2図(A)の実施例
と同様に酸化膜を選択的に形成して、さらにその上面に
は塗付法にょシリンガラス(PSGという)またはヒ素
ガラス(ASGという)を形成させ150〜300”C
!のプリベークを行なった。
That is, in FIG. 4(A), the substrate semiconductor, for example, P-type 0
.. An oxide film is selectively formed on silicon of 5 to 100 μm in the same manner as in the embodiment shown in FIG. ASG) is formed at 150 to 300"C.
! Pre-bake was performed.

次に窒素中にて700〜1100’Oにて加熱拡散しN
層を0.5μ以下特に300A−0,1μの深さに拡散
してN層(シート抵抗5〜50 ”7’o )として開
放電圧を高めた。次にこれら半導体上の酸化珪素をすべ
てフッ酸系液体にて除去し第1図体)を得た。
Next, the N
The layer was diffused to a depth of 0.5μ or less, particularly 300A-0.1μ, to form an N layer (sheet resistance 5-50"7'o) to increase the open circuit voltage. Next, all the silicon oxide on these semiconductors was fluorinated. It was removed with an acidic liquid to obtain Figure 1).

次にこの半導体層(4)、半導体(1)の上面にARP
(3)をスクリーン印刷法または塗付法にょシ形成し、
第2図(B)と同様レジスト(5)を電極窓穴(8)。
Next, ARP is applied to the top surface of this semiconductor layer (4) and semiconductor (1).
(3) is formed by screen printing method or coating method,
As in FIG. 2(B), the resist (5) is placed in the electrode window hole (8).

(8)を除き他部に選択的に形成した。It was selectively formed in other parts except for (8).

さらに第2図(B)と同様にこれらの上面に無電界メッ
キにて金属膜(6) 、 (6)を形成し、レジスト膜
を溶去してその上のニッケル膜をリフトオンして除去し
た。
Furthermore, metal films (6) and (6) were formed on the top surfaces of these by electroless plating in the same manner as in Figure 2 (B), the resist film was eluted, and the nickel film thereon was removed by lift-on. .

かくして第4図(c)のたて断面図に示された如き光電
変換装置を得ることができた。かかる構造において、変
換効率に関しAMI下にて16〜18チと2〜4多さら
に高めることができ、特に短波長特性である螢光燈T 
(3001x)にて7〜8チすナワチ10〜11μW/
cmLと高い変換効率を得ることができた。
In this way, a photoelectric conversion device as shown in the vertical sectional view of FIG. 4(c) could be obtained. In such a structure, the conversion efficiency can be further increased by 2 to 4 times to 16 to 18 inches under AMI, and in particular, the fluorescent light T with short wavelength characteristics can be further improved.
(3001x) 7-8 chisunawachi 10-11μW/
A conversion efficiency as high as cmL could be obtained.

これらの値は従来方法の単結晶珪素を用いる光電変換装
置に比べて20〜40%も変換効率が高くさらにその製
造工程において1回のマスク合せ、1回の不純物拡散で
すむため、製造価格も約30%下げることができた。
These values are 20-40% higher conversion efficiency than conventional photoelectric conversion devices using single-crystal silicon.Furthermore, the manufacturing process requires only one mask alignment and one impurity diffusion, resulting in lower manufacturing costs. We were able to reduce it by about 30%.

第2図、第4図(B)より (Cりへ移る工程において
フォトレジスト(7)をマスクとして電極部の反射対防
止膜上に電極(1o)を形成しその後400−’i’o
From Figures 2 and 4 (B) (In the step of moving to C, an electrode (1o) is formed on the antireflection film of the electrode part using the photoresist (7) as a mask, and then 400-'i'o
.

°Cにてンンターを7してこの電極材料を反射防止膜を
貫通してその下の極薄膜である窒化珪累膜(5)をバリ
ヤとして作用せしめてもよい。かかる場合はエツチング
工程が不要であシ、工程をさらに簡略化できた。
The electrode material may be passed through the anti-reflection film by heating at 7°C, and the silicon nitride layer (5), which is an extremely thin film thereunder, may act as a barrier. In such a case, the etching process was not necessary, and the process could be further simplified.

以上の説明より明らかな如く、本発明は光照射面側の電
極に関しその上面、反射防止膜が残存していたシまた側
面に他部に比べて厚くまたは薄くしたシすることなく光
照射面は全面において均質な厚さおよび屈折率を有し、
入射光を効率よく半導体内部に導入することができた。
As is clear from the above explanation, the present invention relates to the electrode on the light irradiation surface side, and the light irradiation surface can be made thicker or thinner than other parts on the top surface, the side surface, and the side surface where the antireflection film remains. It has a uniform thickness and refractive index over the entire surface,
The incident light could be efficiently introduced into the semiconductor.

さらに本発明は従来電極形成に用いられていたアルミニ
ュームの真空蒸着法の如き高価な装置を用いることなく
、簡単な電解槽で電極の形成が可能であシ、さらにニッ
ケルは耐熱性でP型N型の半導体に対しオーム接触をす
るため、さらに高信頼性を有せしめることができた。
Furthermore, the present invention makes it possible to form electrodes in a simple electrolytic bath without using expensive equipment such as vacuum evaporation of aluminum, which has been conventionally used for forming electrodes. Since ohmic contact is made with the N-type semiconductor, even higher reliability can be achieved.

本発明は半導体基板を単結晶珪素とした〇しかしS工L
SO等の多結晶珪素、デンドライト型の珪素、高速急冷
法の珪素また基板上に形成された非晶質またはセミアモ
ルファス半導体を用いた光電変換装置に適用可能である
。さらにまたその他の半導体であるゲルマニューム、化
合物半導体等へも応用されうることはいうまでもない。
In the present invention, the semiconductor substrate is made of single crystal silicon.
It is applicable to photoelectric conversion devices using polycrystalline silicon such as SO, dendrite silicon, silicon processed by high-speed quenching method, or an amorphous or semi-amorphous semiconductor formed on a substrate. It goes without saying that the present invention can also be applied to other semiconductors such as germanium and compound semiconductors.

また本発明は光電変換装置のうちフォトセンサ、太陽電
池に用いられるひとつのダイオード構造を有する場合の
みを示した。しかしこれら゛はフォトトランジスタ、複
合体、ダイオードアレー、イメージセンサ等の受光素子
さらに化合物半導体または非単結晶半導体を用いた発光
素子に対しても有効である。特に本発明の無電界メッキ
法を用いたセルファライン方法は、低温処理である半導
体特に非晶質、セミアモルファス半導体または■v化合
物半導体等やわらかい半導体に対し有効であると信じる
Further, the present invention has only shown a case in which one of the photoelectric conversion devices has a diode structure used in a photosensor or a solar cell. However, these methods are also effective for light-receiving elements such as phototransistors, composites, diode arrays, and image sensors, as well as light-emitting elements using compound semiconductors or non-single-crystal semiconductors. In particular, it is believed that the Selfaline method using the electroless plating method of the present invention is effective for low-temperature processing of semiconductors, particularly soft semiconductors such as amorphous, semi-amorphous semiconductors, and iv compound semiconductors.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の光電変換装置の作製工程を示す。 第2図は本発明の光電変換装置およびその製造工程を示
すたて断面図である。 第3図は第2図で得られた光電、変換装置の部分拡大図
を示す。 第4図は本発明の他の光電変換装置およびその製造工程
を示す。 察3図 6′ ¥4図
FIG. 1 shows the manufacturing process of a conventional photoelectric conversion device. FIG. 2 is a vertical sectional view showing the photoelectric conversion device of the present invention and its manufacturing process. FIG. 3 shows a partially enlarged view of the photoelectric conversion device obtained in FIG. 2. FIG. 4 shows another photoelectric conversion device of the present invention and its manufacturing process. Inspection 3 figure 6' ¥4 figure

Claims (1)

【特許請求の範囲】 1、−導電型の半導体の上面に逆導電型の半導体層を有
し該半導体層上に設けられた反射防止膜と該膜に設けら
れた電極穴と紋穴と同一形状を有し前記半導体層に密接
した紋穴に設けられた金属電極とを有することを特徴と
する光電変換装置。 2、特許請求の範囲第1項において、ニッケルを主成分
とする無電界メッキ法によ多形成された金属電極が設け
られたことを特徴とする光電変換装置。 3、特許請求の範囲第1項において、半導体層上に設け
られた平面状の反射防止膜は酸化チタンまたは酸化チタ
ンと酸化珪素の混合物を主成分として屈折率1.7〜2
.2を有して設けられたことを特徴とする光電変換装置
[Claims] 1. - A semiconductor layer of opposite conductivity type is provided on the upper surface of a semiconductor of conductivity type, and the antireflection film provided on the semiconductor layer is identical to the electrode holes and pattern holes provided in the film. A photoelectric conversion device comprising: a metal electrode having a shape and provided in a hole in close contact with the semiconductor layer. 2. A photoelectric conversion device according to claim 1, characterized in that it is provided with a metal electrode formed by electroless plating, the main component of which is nickel. 3. In claim 1, the planar antireflection film provided on the semiconductor layer is mainly composed of titanium oxide or a mixture of titanium oxide and silicon oxide and has a refractive index of 1.7 to 2.
.. 1. A photoelectric conversion device characterized in that it is provided with: 2.
JP56122708A 1981-08-05 1981-08-05 Optoelectric transducer Pending JPS5823490A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56122708A JPS5823490A (en) 1981-08-05 1981-08-05 Optoelectric transducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56122708A JPS5823490A (en) 1981-08-05 1981-08-05 Optoelectric transducer

Publications (1)

Publication Number Publication Date
JPS5823490A true JPS5823490A (en) 1983-02-12

Family

ID=14842638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56122708A Pending JPS5823490A (en) 1981-08-05 1981-08-05 Optoelectric transducer

Country Status (1)

Country Link
JP (1) JPS5823490A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59169185A (en) * 1983-03-09 1984-09-25 リツエンツイア・パテント−フエルヴアルツングス−ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Solar battery
WO2009021713A1 (en) * 2007-08-16 2009-02-19 Deutsche Cell Gmbh Method for producing a semiconductor component, a semiconductor component, and an intermediate product in the production thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59169185A (en) * 1983-03-09 1984-09-25 リツエンツイア・パテント−フエルヴアルツングス−ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Solar battery
JPH0512869B2 (en) * 1983-03-09 1993-02-19 Ritsuentsuia Patento Fuerubarutsungusu Gmbh
WO2009021713A1 (en) * 2007-08-16 2009-02-19 Deutsche Cell Gmbh Method for producing a semiconductor component, a semiconductor component, and an intermediate product in the production thereof

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