JPS58223963A - Shading compensating device - Google Patents

Abstract

PURPOSE:To attain the compensating operation at a high speed also for an abnormal picture element, by deriving separately a shading compensating coefficient of the abnormal picture element, and using the shading compensating coefficient obtained separately only for the abnormal picture element at the reading of an original. CONSTITUTION:A reflected light is led to a photoelectric converting element 6 via a lens, and its output is sampled in a timing predetermined with the 1st timing circuit 9 and a sample-and-hold circuit 10. Further, the shading compensating coefficient is obtained at an operation processor 12 from its output and the output of a D/A converter 11. The shading compensating coefficient is written in a storage element 15 as to a sampling picture element. Further, switches S1, S2, S3, S5, S9 and S10 are switched to the position (b) and the detection (b) and the detection of the abnormal picture is detected while the shading compensating coefficient of a non-sampling picture element is obtained at an interpolation circuit 18.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a shading correction coefficient for correcting the shading characteristics of a photoelectric conversion element such as a COD.

The surface of the document to be recorded is irradiated with a lamp, and the reflected light is passed through a reflecting mirror or lens to a solid-state 1liI# element or film A1~
Recording devices that guide light to a photoelectric conversion element in a diode array and obtain a reproduced image based on the output signal of the photoelectric conversion element have already been widely used.

In this type of recording device, even when reading the uniform reflection II document surface, the output waveform of the photoelectric conversion element does not become flat. There is a shading phenomenon in which the output of pixels at the edges becomes smaller. The cause of this is
These include:

(b) Light reduction effect by the lens of the optical system.

The amount of light passing through the lens of the optical system decreases at the periphery according to Sein's fourth law. For example, when the half angle of view is 20 degrees, the amount of light at the periphery is 78% of that at the center.

(b) Unrestricted Sensitivity of Photoelectric Conversion Elements - Photoelectric conversion elements such as solid-state image elements such as COD and diode arrays may have non-uniform sensitivity due to manufacturing reasons.

(c) Illuminance unevenness and illuminance change of the irradiation lamp For example, a fluorescent lamp is used for the original irradiation lamp, but the lamp length is finite and the illuminance is low because the light emission degree at both ends is lower than at the center of the light emitting device. .

Also, as fluorescent lamps are used, both ends of the lamp turn black, and the intensity distribution changes depending on how it is installed.

Various correction measures have been taken to correct this shading. For example, the light reflected by the uniform reflection Ff11 degree plane is guided to a photoelectric conversion element, and the output signal is Δ/D converted and stored in a storage element.

Shading supplement 1 to read the memory contents when reading the original
There are things that are E-d. The accuracy of this correction is good, but
The time that can be spent on the conversion operation of the Δ/D converter is
The higher the driving frequency of the photoelectric conversion element is, the shorter it becomes, and there is a problem that it cannot handle high-speed reading. or,
There is also the problem that as the number of pixels of the photoelectric conversion element increases, the capacity of the storage element increases.

Therefore, in order to solve these problems, the inventors of the present invention published Japanese Patent Application No. 56-124791 (shading correction l
1l), during charging conversion for a uniform reflection density surface, rimbling the conversion output of a specific pixel to obtain the shading correction coefficient of the sampling pixel, and perform shading correction.
Sometimes, using an interpolation method, the complementary coefficients of non-sampled pixels are sequentially obtained for the original image signal itself, or the original image signal is reproduced in halftones using a dithering method. Perform an operation on the value,
By increasing the output after shading compensation by 1tIJ,
Although high-speed reading has been made possible, this method of performing sampling to obtain correction coefficients and overturning corrections has the effect of detecting abnormal pixels in the pixels of the photoelectric conversion element (for example, as shown in Figure 1, "pixels with extremely low output"). ) exists, the pixel is not corrected correctly and the comparison type 11 for binarization is
, there was a problem where black lines appeared on the recorded images. In other words, the first part is partially protruded downward due to the abnormal pixel.
For the shading waveform (a) in the figure, the shading correction coefficient (by interpolation method; curve b indicated by a broken line in the figure) is significantly different from the ideal correction coefficient (curve C in the figure) for abnormal pixels. A problem arose.

As a countermeasure to this problem, a method of correcting the shading waveform for all pixels by AID conversion may be considered, but as already mentioned, this method cannot cope with high-speed reading from the viewpoint of processing speed. Another method is to interpolate and replace the abnormal pixel with the preceding and following pixels (No. 3), but this method has the drawback that the circuit requires a long processing time.

The present invention has been made in view of the above-mentioned points.The present invention has been made in view of the above-mentioned points. The output of the photoelectric conversion element, which is calculated by 1, is corrected using the interpolation method based on the shading correction coefficient of each used pixel, and the corrected signal is compared with a preset reference voltage. , by detecting the position of the abnormal pixel, determining the shading correction coefficient for the abnormal pixel separately, and using the separately determined ink correction coefficient only for the abnormal pixel when reading the document, photoelectric conversion with the abnormal pixel is performed. The present invention provides a shape-in correction device U that can perform high-speed correction operations even when using elements.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 2 is an explanatory diagram showing the main parts of the document reading device with a movable document table. This device irradiates a document 2 that has not been placed on a document table 1 with a lamp 3 T, and causes the reflected light to pass through a reflecting mirror 4 and an imaging lens 5 to a photoelectric conversion element 6 to obtain an image signal. A white reflective surface 7 is provided in a non-image area in front of the document table 1. For sub-scanning, move the original platen 1 to the arrow F.
This is done by moving in the II7'j direction.

FIG. 3 is a block diagram of an embodiment of the shading correction device of the present invention which receives the output of the reading device as an input.

In the figure, 8 is a first control circuit that outputs the drive clock of the photoelectric conversion element 6 and the photoelectric conversion star 1 to stop signal, and 9 is the drive clock output from the first control circuit 8. This is a first timing circuit that sets the timing for sampling the output of the photoelectric conversion element 6 when the white reflective surface 7 is scanned.

10 is a ripple hold circuit that samples and holds the output image signal of the photoelectric conversion element 6 based on the output signal of the first timing circuit 9 or a fourth timing circuit 20 (described later); 11 is a ripple hold circuit that converts digital input into analog output; 12 is an output image signal Vx of the sample hold circuit 10 and an output v of the D/A converter 11.
13 is a comparator that compares the reference voltage rVr or Vr' with the output VO of the calculation processing circuit 12. Further, 14 starts its operation with the output of the first timing circuit 9 or a fourth timing circuit 20 (described later), and depending on the output of the comparator 13, the D,/A converter 1
A second control circuit sets each bit from the MSB of 1 to l-S B, and 15 is a RAM in which the digital inputs to the D/A converter 11 set by the second control circuit 14 are written one after another. 16 is this memory element 1
A second timing circuit 17 outputs a timing signal for writing to the memory element 15, and a third timing circuit 17 outputs a timing signal for reading from the storage element 15.18
19 is an interpolation circuit that calculates the shading correction coefficient of a non-sampled pixel by interpolation from the shading correction coefficient of the rimbling pixel read from the storage element 15; 19 is the shape ink correction coefficient of the interpolation circuit 18; This is an interpolation timing circuit that sets the timing for sending out calculations. 20 is a fourth timing circuit that outputs a signal for holding the signal of the abnormal pixel for longer than the processing time to the sample hold circuit 10; 21 is a counter that counts the driving clock from the first control circuit 8; 22; 123 is a comparator that temporarily stores the value of the counter 21 upon receiving the output signal of the comparator 13, and 24 is a comparator that determines whether the values of the downward lap 22 of the counter 21 are equal. 24 is a shading correction coefficient for abnormal pixels. Memory element for storing, 25
26 is a fifth timing circuit that outputs a timing signal when writing to the memory element 24, and a sixth timing circuit 26 that outputs a timing signal when reading from the memory element 24. Further, S1 to S1o are switch switches that are switched by the first control circuit 8.

Next, we will explain the operation of the shading correction device of the present invention.

4) The storage operation of the shading correction coefficient will be explained. At this time, the switch 5l-810 is switched to contact a. In the first timing circuit 9, the first
Based on the drive clock for the photoelectric conversion element 6 shown in FIG. 4 (A) outputted from the control circuit 8 of FIG. 4 and the photoelectric conversion start/stop signal shown in FIG. A ripple hold signal is generated.

In FIG. 4(b), a period P is a storage period of the shading compensation iT coefficient, and a period Q is a period for abnormal pixel detection and document reading. +J simple rule circuit 10 is
The shading waveform output from the photoelectric conversion element 6 is rimmed at the L level of the ripple hold signal, held at the H level, and output to the performance processing circuit 12. The second control circuit 14 also starts operating in synchronization with this 4 non-pull hold signal. First, the MS of the D/A converter 11
Turn on B. As a result]]/A converter 11 to 1
A signal Vy of /2FS (full scale) is output, and this signal vy and the signal held in the ripple hold circuit 10 are X=V+(1st spring [),! =(7) Operation VO=V
+ ・Vy is subjected to f> in the arithmetic processing circuit 12. This output Vo is compared with the reference voltage Vr in the comparator 13, and when \tr>VO, the tl level is
In this case, the comparator 13 outputs an L level. The control circuit 14 outputs MS when the output of the comparator 13 is 1-Level.
Leave B unchanged and proceed to the lower bits, and conversely, when it is at the 1-level, set the MSB to A) and proceed to the I; bits. Thereafter, similar operations are performed up to LSB, and the setting digital output of the second control circuit 14 at this time is transferred to the memory element 1.
Add 11 to 5.

This operation is performed internally in the second control circuit 14 in synchronization with the mink, and an example of the timing chart is shown in FIG. Here, the resolution of the )/Δ converter 11 is 8 bits. Note that the start signal is generated from the sample and hold signal.

When the setting from MSB to IsB is completed, the second control circuit 14 to the second timing circuit 1 column 1988-223
9G3 (4) A conversion end signal is output to 1G. This causes the second timing circuit 16 to write the setting digital output of the second control circuit 14 into the storage element 15 . The above operation is based on the sample and hold signal, including the number of ripples (VX
= VI - Vm m times) is repeated (see Figure 1).

By the way, the digital setting for the above operation is Vr
=vo, that is, \l×·\/V =Vr =constant. Therefore, Vy is the shading coefficient itself, and is the result of the song mb in FIG. Therefore, the shading correction coefficients for all limping pixels are stored in the memory element 15.

When the storage of the shading correction coefficients for the limp ring pixels is completed, the switch Sl+82.83. S5.
89 and SIo are switched to contact bk: ", and an abnormal pixel is detected. This detection is performed while the interpolation circuit 18 obtains the shading correction coefficient of the non-limb pixel. Specifically, the data of the shading correction coefficient is
The interpolation circuit 18'C-
This is done while processing the calculations. Since a detailed circuit example of the interpolation circuit 18 is shown in FIG. 6, interpolation processing performed by the interpolation circuit in one day will be explained based on this diagram. First, of the two correction coefficient data, the first data Vo+ is held in the latch 31, and the second data V(Q) is held in the wrap 32 (Vo
+, Vm (see Figures 1 and 7). Arithmetic unit 3
3 is these i-data V 01 * VO? K(
Vo+-VO! ), and the splitting circuit 24 which receives this input calculates the number n of non-sampled pixels between the sampled pixels.
Based on, the change between pixels ΔV+ = (Vo+ −V
Find OI )/(n-t1). These series of operations are performed between times 1 and -1. Next, at time point 12 when reading of the reflective surface 7 for abnormal pixel detection starts, the switch S20 is switched to contact a, and the latch 37
The γ-ta Vo1 is held and output to the D/A converter 11. At the next timing, the switch S is switched to the contact position, and at the same time, Δv1 is held in the latch 35, and Vo+−ΔV1 is output from the calculation unit 36.

The latch 37 holds this and outputs it to the D/A converter 11. As a result of updating the memory contents of the latch 37, the performance section 36 stores a new performance value (Vo+-ΔV1)-8V1=V
o+-2ΔV1 is made. The latch 37 holds this again and outputs it to the D/A converter 11. Furthermore, next, 9tj (V o+−2ΔV+ )−ΔV+ =V
o+ 3ΔV+ lfi'a Genbu 36, D/
It is output to the A converter 11. Thereafter, calculations are similarly repeated in synchronization with the driving of the second control circuit 8, and the calculation results are output to the D/A converter 11. The arithmetic processing based on the above interpolation method is performed based on a timing signal from the interpolation timing circuit 19.

Note that when ΔV1 is held in the latch 35, the two correction coefficients γ-ta necessary for the -1st order interpolation calculation are read out from the storage element 15, and the next interpolation is performed by the same calculation as the adjustment of ΔVI. The change in processing Δ■2 is determined. 8v like this
The reason why the calculation process of 1 and the calculation process of Δv2 are performed in parallel is to shorten the processing time by the interpolation circuit 1B.

Therefore, interpolation calculations using the newly highlighted changes can be performed quickly.

By the way, when performing the above-mentioned interpolation operation, as shown in C of Fig. 1, if the Wringle values adjacent to the -7''ing correction coefficient are written as vk+ and Vk2, then Vk 1 depends on the location.
>Vk 2 , Vk I<Vk 2 . Here, when Vk + <Vk 2, the arithmetic unit 3 a is set to \/k? −Vk I, the calculation unit 36 is set to Vk, −+−Δ
Switching is performed by V kl and interpolation circuit timing 19.

For the above 1 operation, the signal 1 output from the interpolation circuit 18 is
- The aing correction coefficient is j'-program-converted by the D/Δ converter 11, and the ripple hold times are 4°10 hs.
r) (1″)Ih-61i11i1j7,0;5EI
TI! (i@Vx is calculated by τ in the arithmetic processing circuit 12, and the result of the derivation is outputted as a signal Vo. This corrected signal Vo is based on the n capacity of the shedding correction factor. t! compared with the lightning voltage r l , vr'>
When it becomes vo, the comparator 13 outputs 1-level, and the latch 22 holds the count of the counter 21 at this time, that is, the position of the abnormal pixel. At the same time, the timing circuit 20 outputs a hold signal to cause the sample bold circuit 10 to hold the signal of the abnormal pixel. At the same time, switches S+, Ss, and Ss are switched to a contact,
The control circuit 14 starts operating, a shading correction coefficient for the abnormal pixel is determined, and the shading correction coefficient is stored in the storage circuit 24 according to the timing signal from the timing circuit 25. Thereafter, the switches S+, Ss, and Ss are switched to b contacts, and abnormal pixel detection is continued again.

When the abnormal pixel detection and correction jl coefficient storage operation are completed, the switch St l S41 Ss l S? 1) Switch the switches S, , yh to a contacts, and perform the image signal correction operation. This correction operation is similar to the case of abnormal pixel detection described above. That is, the shading compensation iT-coefficient output from the interpolation circuit 18 is D/
The original reading signal Vx, which is analog-converted by the Δ converter 11 and output from the ripple bold circuit 10, is calculated in the arithmetic processing circuit 12, and the calculation result is output as the corrected signal Vo. However, during this operation, the latch 22 that holds the value of the counter 21 and the position of the abnormal pixel
When the comparator 23 detects that the value of is excellent, the switch S8 is switched to the b contact, the timing circuit 26 reads out the correction coefficient corresponding to the abnormal pixel from the memory circuit 24, 11, and correction of abnormal pixels is performed. Then, the normal correction operation is resumed.

By performing the following shading correction for each scan, L-shading can be completely corrected.

In the above example, a multiplication circuit is used as the arithmetic processing circuit 12 to directly correct the image signal. jE Lτ is also good. Below, D'J'
The following describes the case where 11511i is corrected 1k). 8th
The 4×4 di-1a matrix (0, 8, 2
, 10, ... (Y) 'Iza threshold value) is taken as an example, and the value before correction of the daily threshold value in A is placed in the first row of the Iza matrix) (only 1 is shown and Figure 9 It will look like (C) in (B).

By the way, the output (image signal) of the photoelectric conversion element when a reflective surface with uniform density is imaged has constant f and T, as shown by the dotted chain line (a) in Figure 9 (a). Should be, but
Due to shading, it actually looks like the T-dot chain line (1)). Therefore, if this is binarized using the threshold value before correction, the result will be as shown in the lower column of FIG. 9 (1), which will be affected by shading. Here, the black circles in FIG. 9(b) are signals to be printed by double conversion, and the white circles are signals not to be printed. In this case, if the daily threshold value in the first row of FIG. 8 is corrected according to the marking I-'7 and the dashed line (d) is changed by 4 from the solid line (C), the binarized output will be: The result is as shown in the lower column of FIG. 9(b), and the same result as when the output (b) of the photoelectric conversion element in FIG. 9(a) is corrected to (a>) can be obtained.

The correction of this diary threshold value is performed based on the following formula: J:
stomach.

γ error threshold (f1/shiding correction coefficient - dither threshold after correction) To execute this, the arithmetic processing circuit 12 shown in FIG.
For example, it is necessary to cover the structure as shown in FIG. 1st
0, it goes without saying that VX is a picture signal and vy is a shading correction coefficient. This arithmetic processing circuit 12 stores in advance in a storage unit 121 a group of iris thresholds that constitute a daily 1-rix, sequentially reads them out and gives them to the UD/Δ conversion! 1122, and Analog output d is divided by the shading correction coefficient Vy of the division circuit 123, and the result is ff!V.
d/Vy is input to the non-inverting input terminal of the comparator 124, and the image signal VX is input to the inverting input terminal of the comparator 124 to obtain a binarized signal. Note that when calculating the shape ink correction coefficient, since the value of ■×·Vy is required, the multiplication circuit 125 is configured to output an analog value v×·Vv. That is, the switch SW is connected to the a contact point when calculating the ink correction coefficient, and the switch SW is connected to the contact point immediately after the irradiation.

Note that using the 1)/△ converter 11 in FIG. 3, the input is directly sent to the division circuit 1233 in FIG.
If the di)J'@ value in 21 is given to the inscribed division circuit 123 and the image signal Vx is converted to 8/' () and used, the dither threshold can be corrected by digital calculation. become.

If Jζ is just 1, it is possible to easily and inexpensively manufacture a seating auxiliary IF device.

In the example described above, the rimbling intervals when performing interpolation are set at equal intervals, but the sampling interval can be changed as appropriate depending on the shading waveform, such as making it fine at both ends of the shading waveform and coarse at the center. You can also do it.

Although the case where there is one abnormal pixel has been described, when there is a plurality of abnormal pixels, a plurality of laps 22 may be used to obtain the correction coefficient for the abnormal pixel.

Also, if the ring link pixel and the abnormal pixel match,
The entire simbling pixel may be operated pixel by pixel.

Further, in the embodiment, an example in which the uniform reflection surface is white and is provided in a non-image area has been described, but the present invention is not limited to this.

As described above, according to the present invention, it is possible to realize a siding compensation iF device that can perform a high-speed correction operation even when using a photoelectric conversion element that shifts abnormal pixels to the right.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram showing shading waveforms and shading correction coefficients, Fig. 2 is an explanatory diagram of the main parts of an example of a document reading device with a movable document table, and Fig. 3 is a scale diagram showing an embodiment of the present invention. [1] Figure 4 is a timing chart to explain the operation of storing the aiing coefficients, Figure 5 is []
Figure 6 shows an example of the detailed configuration of the interpolation circuit.
Figure 7 is an explanatory diagram showing the calculation of the shimming correction coefficient by the interpolation method. Figure 8 is an explanatory diagram showing an example of the dither matrix. FIG. 10 is a block diagram of an arithmetic processing circuit according to another embodiment of the present invention. 1... Original table 2... Original 3... Lamp 4... Reflector 5... Imaging lens 6
... Photoelectric conversion element 8.14 ... Control circuit 9, j6, 17, 20, 25.26 ... Timing circuit 10 ... Sample hold circuit 11 ... D/Δ converter 12. ... Arithmetic processing circuit 13
．． 23...Comparator 15.24...Storage element 18.
...1 interpolation circuit...Interpolation timing circuit 21...Counter 22...Rudge Figure 5 Tsuta Figure 6

Claims (1)

[Claims] Uniform-versal! ) The reflected light from the reflective surface, which determines the I density, is guided to a charging conversion element via an imaging lens, the output of the photoelectric conversion element is rimmed at a predetermined timing, and the value of the sampling pixel is calculated based on the rimbling value. Shading correction coefficient i: The device calculates the shading correction coefficient of
A shading correction coefficient for the numbered pixel is obtained by scanning, and the output of the photoelectric conversion element obtained by the second scanning of the reflective surface is corrected based on the shading correction coefficient of each used pixel calculated using an interpolation method. Then, by comparing the corrected signal with a preset reference voltage, the position of the abnormal pixel is detected, and the shading correction coefficient of the abnormal pixel is separately determined, and when reading the document, the position of the abnormal pixel is detected. A shading correction device characterized in that only the separately determined shading correction coefficient is used.