JPS58223089A - Electronic time piece with alarm - Google Patents

Abstract

PURPOSE:To prevent the starting of an alarm sound monitor by the operation of halting an alarm sound by prohibiting the start of the alarm sound monitor until a specified time elapses after the halting of the alarm sound. CONSTITUTION:As soon as the contents coincide between a time counter 10 and an alarm memory 11, a coincidence signal from a coincidence detection circuit 12 is outputted to set an RS type FF17 and an alarm sound is generated from an alarm output unit 13. When a switch 7 is operated to stop the alarm sound, the RS type FF17 is reset to halt the alarm sound. At the same time, a timer 22 starts to count. Even when the switch 7 is turned On with the output of the timer 22 at a level L, no monitor sound is generated from an alarm sound generator 13 because AND gates 15 and 16 are in OFF state.

Description

[Detailed description of the invention] The present invention relates to an electronic watch with an alarm.

In recent years, there has been rapid progress in acoustic technology related to the alarm sounds of alarm clocks, and the development of acoustic drive circuits and sounding bodies, such as melody-1 chords and envelopes, has been remarkable. As a result, alarm sounds have become a major selling point in the watch market, and most alarms have become The watch has an alarm sound monitoring function (a function that generates a monitoring sound by a simple predetermined operation even if the alarm set time has not arrived).

On the other hand, the external operation of the watch is generally Ryu/<(
7') Rotation, push, pull, or push-button operation is used, but any of the above methods can also be used to stop the alarm clock or monitor the alarm sound. There is. To stop the above alarm sound,
This is done by the user of the watch to stop the alarm sound from continuing any longer than necessary when the set time of the alarm has reached and the user receives the alarm sound. It is necessary to make the operation as simple as possible, but as a result, other inconveniences arise.

For example, FIG. 1 is a plan view of a conventional electronic watch equipped with three pushbuttons as external operating members.
It is configured so that you only have to press one of the three buttons B and C, and pressing the two buttons A and H at the same time operates the alarm sound monitor. , Now, if the user of the watch performs a slightly messy operation when wanting to stop the alarm sound, A, H
There is a risk of pressing the two buttons at the same time and performing the same operation as the alarm sound monitor. In that case, even if the alarm sound is stopped once, the alarm sound will be restarted according to the monitor command at the same time. Since the monitor sound starts being reported, it ends up being as if the reporting sound had not been stopped.

Furthermore, FIG. 2 is a plan view of an electronic timepiece according to the prior art, which is different from FIG. Stops the alarm sound when the switch is activated once by turning Lease D by a small rotation angle, and monitors the alarm sound when the switch is activated two or more times by turning the leash D by a relatively large rotation angle. In such a configuration, the risk of erroneous operation as described above becomes greater.

In other words, when trying to stop the alarm sound by rotating crown D, the amount of rotation of crown D often increases, and in that case, the alarm sound monitor stops at the same time as the alarm sound is temporarily stopped. The result is exactly the same as if the alarm sound were not stopped.

An object of the present invention is to eliminate the drawbacks of the above-mentioned conventional configuration, and to provide a configuration in which the state of the alarm sound monitor is not caused by an erroneous operation when trying to stop the alarm sound, or as necessary. In this case, the operation to stop the alarm sound is exactly the same as the operation to start the alarm sound monitor, and yet there is no problem in using it. The goal is to make it possible to configure.

Embodiments of the present invention will be described in detail below based on the drawings. FIG. 3 is a plan view showing a schematic structure of an external operation switch mechanism of an alarm clock according to an embodiment of the present invention.

1 is a main plate, 2 is fixed to the winding stem 6', and 4 is a switch wheel provided with a square hole so that it fits into the corner 6a of the winding stem 6 and rotates together with the winding stem 6. The four teeth press and repel the free end of the contact spring 5 whose base is fixed to the circuit board. Further, the protrusion 5a provided on the contact spring 5 is configured to come into contact with the copper foil pattern 6 of the circuit board when pressed by the above-mentioned teeth, thereby forming a switch 7. Therefore, when the crown 2 is rotated, the switch wheel 4 is rotated to intermittently press the contact spring 5 and turn the switch 7 on, thereby commanding to stop the alarm sound and monitor the alarm sound.

FIG. 4 is a block diagram schematically showing the circuit configuration of an alarm clock according to an embodiment of the present invention.

Reference numeral 10 denotes a time counter that receives a reference time signal K to measure time, and 11 represents an alarm memory that stores alarm time. A coincidence detection circuit 12 detects coincidence between the contents of the time counter 10 and the contents of the alarm memory 11 and outputs a necessary signal. Reference numeral 16 denotes an alarm output device that includes an alarm driving circuit, a sounding body, etc., and generates an alarm sound.

14 is an input waveform shaping circuit that outputs the necessary signal and controls the timing of the ON signal from the above-mentioned switch 7, which turns ON and OFF according to the 20 rotations of the crown, and removes chattering. The output signal is input to AND gates 15 and 16.

- The output of the number output circuit 12 is input to an OR gate 19 and a set terminal of an R8 type flip-flop (hereinafter abbreviated as FFF) 18. The output side of the A N and D gate 16 is connected to the other input side of the OR gate 19, and the output side of the OR gate 19 is connected to the cent terminal of the R8 type FF 17.

Also, the Q17 output side of the FF17 is the alarm output device 1.
It is connected to the input side of Qr7 and generates an alarm sound in response to an H level signal from Qr7.

Q+7 is also applied to the other input signal of the AN'D gate 15.

The other output Q+7 of the R8 type FF 17 serves as an input signal to the AND gate 16. On the other hand - AND Kate 1
5 output side R8mFF 17-1817) Connected to the IJ upper setter and the input side of the AN'D gate 21. □ The other input side of the AND gate 21 has an R8 type FF1.
Q of 8 +a small output is connected, AND gate 21
The output side of is connected to the reset terminal of the 4-second timer 22. 4 second timer 22. 2□The output side is connected to the input side of the AND gate 16, and the other output side Q
22 is connected to the input side of A N and D gate 2°. The other input side of AND gate 2o is I Hz
A signal 931 is input, and the output side of the A N l) gate 20 is connected to the input side of the 4-second timer 22.

Here, the operation of the circuit having the above configuration will be explained according to the time chart shown in FIG.

First, when the normal time reaches the alarm setting time, the contents of the time counter 10 and the alarm memory 11 match, and one pulse signal synchronized at the moment of the match is output from the match detection circuit as a match signal Q1□. . The output is AN by setting the R8 type FF18 to the set state.
At the same time as turning on the D gate 21, 1. By setting the R8 type FF1 and 7 through the OR gate 19, the AND gate 15 is turned on and the AND gate 1 is set.
6 is turned off, and the alarm output device generates an alarm sound.

In this state, when the crown 2 is rotated and the switch 7 is turned on, the output side Q+4 of the input waveform shaping circuit 14 is
A solid pulse signal is output.

This pulse signal is the AND gate 1 which is in the ON state.
5 to the reset terminal of the R8 type FF 17, the alarm sound is stopped.

Furthermore, the pulse signal from the above output Q14 is input to the reset terminal of the FF 18 via the AND gate 15, and at the same time is input to the input terminal of the timer 22 via the AND gate 21. timer 22
FJ output 1 rule Q 22 is L level.

Q2□ goes high and becomes a bell, turning the AND gate 20 into the ON state. As a result, the signal l of 111z is input to the timer, and the counting operation of the timer 22 is started.
In this embodiment, the output side Q2□ becomes H level after 4 seconds, and Q2
2 is at L level, AND gate 20 is turned off.
In the F state, the timer 22 stops counting.

Now, when the output side 22 of the timer 22 is at the L level, that is, before the above 4 seconds have elapsed, in order to monitor the alarm sound, turn the crown 2 and switch 7.
Even if the output side Q14 of the waveform shaping circuit 14 is turned on, the pulse signal output from the output side Q14 of the waveform shaping circuit 14 is
．． Since all gates 15 and 16 are in the OFF state, the light cannot pass through these gates 15 and 16, and therefore no operation such as interrogation is caused. Regarding this, until the above-mentioned 4 seconds have elapsed, that is, until the output side Q 22 of the timer 22 reaches the It is the same as "there is".

On the other hand, after the aforementioned 4 seconds, the crown 2
When the switch 7 is turned on by rotating the switch 7, the pulse signal outputted from the output side Q14 of the waveform shaping circuit 14 is as follows.
f;'F Q of 17 +7 output side and Q2 of timer 22
□ Since both the output sides are at H level and the AN'D gate 16 is in the ON state, it will be input to the set terminal of FF 17 via the AND gate 16 and OR gate 19, and as a result , the FF 17 is set, the alarm output device 16 generates a monitor sound, and the alarm monitor state is entered. From this monitor state, further rotate crown 2 and switch 7.
When turned on, the pulse signal output from the input waveform shaping circuit 14 passes through the AND gate 15, which is in the ON state.
In order to be input to the reset terminal of FF17 via
The FF 17 is reversed to the reset state and the alarm sound monitoring state is interrupted. Note - In this case, R8 type FFQ
+s is maintained in the set state from the beginning and the AND gate 21 is also maintained in the OFF state, so the pulse signal output from the waveform shaping circuit 14 when the switch 7 is in the 0-N state is an AND gate. It cannot pass through the gate 21, so the timer 22 is not reset either, and the Q22 output side of the timer 22 is maintained at the H level state. Therefore, when the alarm sound monitoring is interrupted (a) above, the A'N and D gates 16 will be turned on immediately, so immediately after the monitoring is interrupted (wait for 4 seconds) turn the crown 2. Even if the switch 7 is turned on, the pulse signal output from the single waveform shaping circuit 14 passes through the A N , D gate 16 and the OR gate 19 which are in the ON state.
This will be input to the set terminal of the R'S type FF 17, and as a result, the FF 17 will be in the set state, and the alarm sound monitoring similar to the above case will be started again. In other words, in this embodiment, if the alarm sound is stopped when the alarm's second time has arrived, the
Alarm sound monitoring cannot be started until several seconds have elapsed, but if alarm sound monitoring is interrupted, it is configured so that alarm sound monitoring can be restarted immediately after the interruption; , starting alarm sound monitoring, and interrupting alarm sound monitoring are all configured to be performed by the same operation.

As explained above, according to the present invention, an operation to stop the alarm sound when the set time of the alarm has reached and the alarm sound is being generated will cause the alarm sound monitoring to be started. Things can be prevented.

That is, in the present invention, as described above (when the alarm sound is stopped, by providing a side slope means for prohibiting the start of alarm sound monitoring until a predetermined time period has elapsed after the stoppage of the alarm sound), Alarm sound) Since the alarm monitor state 4 will never start at the same time or immediately after stopping, even if you input an alarm sound stop signal to stop the alarm sound and start the alarm sound monitor σ) Even if the alarm sound monitor signal manual operations are similar or exactly the same, the alarm sound monitor state is started when an attempt is made to perform an action to stop the alarm sound. Such things will be completely prevented.

As a result, for example, an alarm device having only one crown as an external operating member, as in the above-mentioned embodiment.
Even with electronic watches, there are operations to stop the alarm sound,
This makes it possible to configure the system so that the operation for starting the alarm sound monitor is exactly the same and there is no operational hindrance. Therefore, the number of external operation members can be reduced and the structure can be simplified. This will also contribute to simplifying the design and improving the external design.

In the above-mentioned embodiment, when the generation of the monitor sound is interrupted, it is configured so that the generation of the monitor sound can be restarted immediately. It is possible to immediately call up or interrupt the alarm sound monitoring state as many times as necessary.

[Brief explanation of the drawing]

Figures 1 and 2 are plan views showing the external appearance of a conventional electronic clock with an alarm, Figures 3 to 5 show an embodiment of the present invention, and Figure 3 shows its external operation switch mechanism. FIG. 4 is a circuit block diagram thereof, and FIG. 5 is a time chart diagram of the main parts of FIG. 4. 2... Crown 7... Switch 10
..... Timing circuit 11 ..... Alarm memory 12 ..... Coincidence detection circuit 16 ..... Alarm output device 14 ..... Input waveform shaping circuit 22 ....・Timer figure 3

Claims (1)

[Claims] A time counter that normally measures time, an alarm memory that stores alarm time, a coincidence detection circuit that outputs a predetermined coincidence detection signal when the contents of the time counter and the contents of the alarm memory match, and an alarm according to the coincidence detection signal. an alarm output device that generates a sound, an alarm sound stop signal input means for stopping the alarm sound, and an alarm sound monitor signal that causes the alarm output device to generate a monitor sound regardless of the presence or absence of the coincidence detection signal. In an electronic clock with an alarm having input means, etc., when the alarm sound is stopped by the alarm sound stop signal input means, generation of the monitor sound is prohibited until a predetermined time has elapsed after the stop. An electronic clock with an alarm, characterized in that it is provided with a control means.