JPS58220429A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS58220429A JPS58220429A JP10331182A JP10331182A JPS58220429A JP S58220429 A JPS58220429 A JP S58220429A JP 10331182 A JP10331182 A JP 10331182A JP 10331182 A JP10331182 A JP 10331182A JP S58220429 A JPS58220429 A JP S58220429A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- resist pattern
- wafer
- pattern
- oxygen plasma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000005530 etching Methods 0.000 claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 claims abstract description 10
- 239000002184 metal Substances 0.000 claims abstract description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 9
- 239000001301 oxygen Substances 0.000 claims abstract description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 28
- 238000000059 patterning Methods 0.000 claims description 11
- 241000257465 Echinoidea Species 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- 238000000354 decomposition reaction Methods 0.000 claims description 3
- 238000009834 vaporization Methods 0.000 claims description 3
- 230000008016 vaporization Effects 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 abstract description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 6
- 230000003749 cleanliness Effects 0.000 abstract description 6
- 238000001020 plasma etching Methods 0.000 abstract description 3
- 239000004411 aluminium Substances 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 10
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 description 6
- 239000010953 base metal Substances 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 239000000428 dust Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000007654 immersion Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000009832 plasma treatment Methods 0.000 description 3
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 238000009835 boiling Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- OCJBOOLMMGQPQU-UHFFFAOYSA-N 1,4-dichlorobenzene Chemical compound ClC1=CC=C(Cl)C=C1 OCJBOOLMMGQPQU-UHFFFAOYSA-N 0.000 description 1
- YLZOPXRUQYQQID-UHFFFAOYSA-N 3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)-1-[4-[2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidin-5-yl]piperazin-1-yl]propan-1-one Chemical compound N1N=NC=2CN(CCC=21)CCC(=O)N1CCN(CC1)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F YLZOPXRUQYQQID-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- CYTYCFOTNPOANT-UHFFFAOYSA-N Perchloroethylene Chemical group ClC(Cl)=C(Cl)Cl CYTYCFOTNPOANT-UHFFFAOYSA-N 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- -1 boron ions Chemical class 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229940117389 dichlorobenzene Drugs 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000002209 hydrophobic effect Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 150000002894 organic compounds Chemical class 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 1
- 229950011008 tetrachloroethylene Drugs 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は半導体装置の製造方法に関し、より具体的には
電極および配線パターンを形成した後、このパターンニ
ングに用いたレジストパターンを除去する方法に係る。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and more specifically to a method for removing a resist pattern used for patterning after forming electrode and wiring patterns. It depends.
半導体装置の製造工程には不−純物を選択的に拡散する
工程や、半導体層、絶縁物層あるいは金属層を選択的に
エツチングしてパターンニングする工程が多数台まれて
いる。この選択拡散または選択エツチングの際のマスク
として、感光性樹脂を露光現像して形成したレジストパ
ターンが多く用いられている。このレジスト剥離液に熱
濃硫酸、硝酸あるいは両者の混酸が用いられる。これに
対して下地が金属である場合、即ち、金属配線層のパタ
ーンニングに用いたレジストパターンを除去するときに
上記の酸室用いると下地の金属ｌ曽がエツチングされて
しまうため、この場合には従来から有機系のレジスト剥
離液が用いられている。レジスト剥離用の有機薬剤は各
レジストメーカーからレジスト剥離液として種々市販さ
れているが、一般的にはジクロルベンゼン、フェノール
、アルキルベンゼンスルホン酸およびテトラクロルエチ
レンを成分とするものである。このレジスト剥離液を用
いた従来のレジスト除去方法は概ね次の通りである。The manufacturing process of semiconductor devices includes many steps for selectively diffusing impurities and selectively etching and patterning semiconductor layers, insulating layers, or metal layers. As a mask for this selective diffusion or selective etching, a resist pattern formed by exposing and developing a photosensitive resin is often used. Hot concentrated sulfuric acid, nitric acid, or a mixture of both is used as the resist stripping solution. On the other hand, if the base is metal, that is, if the above acid chamber is used to remove the resist pattern used for patterning the metal wiring layer, the base metal layer will be etched. Conventionally, organic resist stripping liquids have been used. Various organic chemicals for resist stripping are commercially available as resist stripping solutions from resist manufacturers, but generally contain dichlorobenzene, phenol, alkylbenzenesulfonic acid, and tetrachloroethylene as components. A conventional resist removal method using this resist stripping solution is generally as follows.
まず、有機系の上記レジスト剥離液中の浸漬処理を２回
行ない、続いてトリクロルエチレン中での煮沸処理を２
回とメチルアルコール中・での浸漬処理な２回行なった
後、最後に純水で洗浄する。この方法によれば電極や配
線等の下地金鳩胸を同等エツチングすることなくレジス
トパターンを除去することができる。First, immersion treatment in the above-mentioned organic resist stripping solution was performed twice, followed by boiling treatment in trichlorethylene twice.
After immersion treatment in methyl alcohol and methyl alcohol twice, it is finally washed with pure water. According to this method, the resist pattern can be removed without etching the underlying metal parts such as electrodes and wiring.
（背景技術の間畑点）
ところが、有機系の上記レジスト剥離液による従来のレ
ジスト除去方法には次のような問題があった。(Background Art Mabata Point) However, the conventional resist removal method using the above-mentioned organic resist stripping solution has the following problems.
第１に、レジスト剥離液は沸点の異なる有機化合物成分
の混合液であるため、温度や液組成の管理が困かしい。First, since the resist stripping solution is a mixture of organic compound components having different boiling points, it is difficult to control the temperature and liquid composition.
第２に、レジスト剥離液中での浸漬処理に長時間を要す
る。Second, immersion treatment in a resist stripping solution requires a long time.
？Ｉ４３に、トリクロルエチレンが疎水性であるため、
親水性の半導体ウニへ−表面に乾燥時ゴミが残留する。? Because trichlorethylene is hydrophobic in I43,
Hydrophilic semiconductor sea urchins - Debris remains on the surface when drying.
上記の三つの問題から、レジスト剥離液を用いた従来の
レジスト除去方法は数工程を要するため自動化が困難で
プロセスマージンも大キく。Due to the above three problems, the conventional resist removal method using a resist stripper requires several steps, making it difficult to automate and having a large process margin.
またレジスト除去後における半導体ウェハー表面の高い
清浄度が得られない吟、その改善が望まれていた。Furthermore, since high cleanliness of the semiconductor wafer surface cannot be obtained after removing the resist, an improvement has been desired.
本発明は上記事情に鑑みてなされたもので。 The present invention has been made in view of the above circumstances.
下地金属層をパターンニングするためのエツチングマス
クとして用いたレジストパターンを、簡略かつプロセス
マージンの少ない工程で効率的に除去でき、しかもレジ
スト除去後の半導体ウェハー表面に高度な清浄度を得る
ことができるレジスト除去工程なＡ傭した半導体装置の
製造方法−を提供するものである。The resist pattern used as an etching mask for patterning the underlying metal layer can be efficiently removed in a simple process with a small process margin, and the semiconductor wafer surface can be highly clean after the resist is removed. A method of manufacturing a semiconductor device including a resist removal process is provided.
本発明による半導体装置の製造方法は、下地金属層のパ
ターニングを行なった後、該バターニングのエツチング
マスクとして使用したレジストパターンを酸素プラズマ
と反応させ゛ることにより分解気化させて除去し、続い
てウェハー表面を純水で洗浄する工程を興備したことを
特徴とするものである。In the method of manufacturing a semiconductor device according to the present invention, after patterning a base metal layer, the resist pattern used as an etching mask for patterning is removed by decomposition and vaporization by reacting with oxygen plasma, and then This method is characterized by a step of cleaning the wafer surface with pure water.
本発明は前記レジストパターンとしてネガ、型レジスト
およびポジ型レジストの何れを用いた場合にも適用する
ことができる。The present invention can be applied to any case where a negative type resist, a type resist, or a positive type resist is used as the resist pattern.
本発明によれば下地金属層のエツチングマスクとして用
いたレジストパター刈ｊ酸素プラズマによる励起酸素原
子と反応して酸化され、分解気化して除去される。その
際、下地金属層は酸素プラズマによるエツチングを受け
ない。しかも、周知のようにプラズマによるダメージは
４００℃ＸＩＯ分の熱処理で容易にアニールされる。従
って１本発明は金属配線層の形成後にレジストを除去す
る方法として有効である。According to the present invention, the resist pattern used as an etching mask for the underlying metal layer is oxidized by reaction with excited oxygen atoms generated by oxygen plasma, and removed by decomposition and vaporization. At this time, the underlying metal layer is not etched by the oxygen plasma. Moreover, as is well known, damage caused by plasma can be easily annealed by heat treatment of 400° C.XIO. Therefore, the present invention is effective as a method for removing resist after forming a metal wiring layer.
また、本発明におけるレジスト除去方法はプラズマ処理
、純水洗浄の２工程からなり、レジスト剥離液による従
来の方法に比較して極めて簡略化されている。従って、
プロセスマージンを小さくでき、かつ自動化も容易であ
る。Furthermore, the resist removal method in the present invention consists of two steps: plasma treatment and pure water cleaning, and is extremely simplified compared to the conventional method using a resist stripping solution. Therefore,
Process margins can be reduced and automation is easy.
更に、本発明における酸素プラズマ処理は従来のレジス
ト剥離液処理よりも極めて短時間ですみ、これｋよって
もプロセス時間の短縮を図り、生産性の向上を達成する
ことができる。Further, the oxygen plasma treatment according to the present invention takes a much shorter time than the conventional resist stripping solution treatment, and this also makes it possible to shorten the process time and improve productivity.
加えて、後述する実施例の結果に示すように、本発明に
おけるレジスト除去方法は従来のレジスト剥離液による
方法よりも著しく高いウニへ−表面の清浄度を達成でき
、従って高品質の半導体装置を得ることができる。In addition, as shown in the results of the examples described later, the resist removal method of the present invention can achieve significantly higher surface cleanliness than the conventional method using a resist stripper, and therefore can produce high quality semiconductor devices. Obtainable.
本発明による半導体装置の製造方法は下地金属層をパタ
ーンニングするためのエツチングマスクとして用いたレ
ジストパターンの除去方法に特徴を有するものであるか
ら、このレジスト除去工程に関する実施例を説明する。Since the method for manufacturing a semiconductor device according to the present invention is characterized by a method for removing a resist pattern used as an etching mask for patterning a base metal layer, an embodiment related to this resist removal process will be described.
実施例１
（１） まず、配線工程を終了した半導体ウニ・）−
をプラズマエツチング装置内に収容し、酸素プラズマ雰
囲気下に約３０分間曝してレジストパターンを分解除去
した。Example 1 (1) First, the semiconductor sea urchin that has completed the wiring process.
The resist pattern was placed in a plasma etching apparatus and exposed to an oxygen plasma atmosphere for about 30 minutes to decompose and remove the resist pattern.
なお、配線工程までの製造工程は従来の！Ｖ造方法と全
く同様で、配線工程ではウェハー全面にアルミニウム膜
を蒸着し、該アルミニウム膜上にレジストパターンを形
成した後、該レジストパターンをマスクとしてアルミニ
ウム膜を選択的にエツチングしてアルミニウム配線パタ
ーンを形成した。従って、配線工程を終了した段階では
アルミニウム配線パターンは前記レジストパターンで覆
われている。In addition, the manufacturing process up to the wiring process is conventional! In the wiring process, an aluminum film is vapor-deposited over the entire surface of the wafer, a resist pattern is formed on the aluminum film, and the aluminum film is selectively etched using the resist pattern as a mask to form an aluminum wiring pattern. was formed. Therefore, at the stage where the wiring process is completed, the aluminum wiring pattern is covered with the resist pattern.
（１） 次に、ウェハーをプラズマエツチング装置か
ら取り出してキャリアに移し替えた後、純水による洗浄
操作を１回行なって乾燥した。(1) Next, the wafer was taken out from the plasma etching apparatus and transferred to a carrier, and then washed once with pure water and dried.
上記実施例１の方法によってレジストパターンを除去さ
れたウェハー表面に残存するゴミの量を肉眼観察および
電気測定で調べたところ。The amount of dust remaining on the surface of the wafer from which the resist pattern was removed by the method of Example 1 was examined by visual observation and electrical measurement.
第１表に示す結果が得られた。なお、従来のレジスト剥
離液による方法で、、レジストパターンを除云したウェ
ハーおよび実施例１の酸素プラズマ処理だけでレジスト
パターンを除去したウェハーの夫々について、同様に表
面に残存するゴミの量を調べた結果を併記する。The results shown in Table 1 were obtained. In addition, the amount of dust remaining on the surface of the wafers from which the resist pattern was removed using a conventional method using a resist stripping solution and the wafer from which the resist pattern was removed only by the oxygen plasma treatment of Example 1 was similarly examined. The results are also listed.
第 １ 表
実施例２
残存するレジストパターンに２．□ ｘ １ ｏ” ／
ｃｒｒｔ”のボロンがイオン注入されている以外は実施
例１と全く同じ配線工程を終了した半導体ウェハーにつ
いて、実施例１と薗様のレジスト除去工程を行なった。Table 1 Example 2 2. To the remaining resist pattern. □ x 1 o” /
A resist removal process similar to that in Example 1 was carried out on a semiconductor wafer which had undergone the same wiring process as in Example 1, except that boron ions of ``crrt'' were ion-implanted.
レジストを除去した後のウェハーについて実施例１と同
様に表面に残存す２・ゴミの置を調べた結果を第２表に
示す。Table 2 shows the results of examining the location of dust remaining on the surface of the wafer after the resist was removed in the same manner as in Example 1.
第２表
上記実施例の結果に示されるように１本発明によれば配
線工程後に残存するレジストパターンを除去したとき、
ウヱへ−表面に従来よりも高い清浄度を得ることができ
る。しがも、実施例２に示されたように、レジストパタ
ーンに不純物がイオン注入されている場合にも略同様に
高度の清浄度を得ることができる。不純物がイオン注入
されたレジストパターンの除去は従来から困難なものと
されていたから、これは本発明において特筆さるべき効
果である。Table 2 As shown in the results of the above examples, according to the present invention, when the resist pattern remaining after the wiring process is removed,
Wow - it is possible to obtain a higher level of cleanliness on the surface than before. However, as shown in Example 2, even when impurity ions are implanted into the resist pattern, substantially the same high degree of cleanliness can be obtained. This is a noteworthy effect of the present invention, since it has conventionally been considered difficult to remove a resist pattern into which impurity ions have been implanted.
以上詳述したように、本発明によれば下地金属層なパタ
ーンニングした後、該パターンニングの際にエツチング
マスクとして用いたレジストパターンを下地蛍属層に損
傷を与えることなくしかも商い清浄度で除去することが
でき、もって信頼性の高い半導体装置の製造かり能とン
≧る等１ｗｊ４著な効果を得るこｙができる。As described in detail above, according to the present invention, after patterning the base metal layer, the resist pattern used as an etching mask during patterning can be used without damaging the base phosphor layer and with commercial cleanliness. As a result, it is possible to obtain significant effects such as increasing the ability to manufacture highly reliable semiconductor devices.
Claims (1)
した後、該パターンニングのエツチングマスクとして用
いたレジストパターンを酸素プラズマと反応させること
により分解気化させて除去し、続いてウニへ−表面を純
水で洗浄する工程を具備したことを特徴とする半導体装
置の製造方法。After forming a wiring pattern by patterning the underlying metal layer, the resist pattern used as an etching mask for the patterning is removed by decomposition and vaporization by reacting with oxygen plasma, and then the surface of the sea urchin is coated with pure water. A method for manufacturing a semiconductor device, comprising a cleaning step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10331182A JPS58220429A (en) | 1982-06-16 | 1982-06-16 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10331182A JPS58220429A (en) | 1982-06-16 | 1982-06-16 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58220429A true JPS58220429A (en) | 1983-12-22 |
Family
ID=14350661
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10331182A Pending JPS58220429A (en) | 1982-06-16 | 1982-06-16 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58220429A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62250645A (en) * | 1986-04-24 | 1987-10-31 | Hoya Corp | Washing method |
| JPH03166724A (en) * | 1989-11-27 | 1991-07-18 | Matsushita Electron Corp | Removing method of resist |
| JP2001110895A (en) * | 1999-10-07 | 2001-04-20 | Matsushita Electronics Industry Corp | Formation method for metal wiring |
-
1982
- 1982-06-16 JP JP10331182A patent/JPS58220429A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62250645A (en) * | 1986-04-24 | 1987-10-31 | Hoya Corp | Washing method |
| JPH03166724A (en) * | 1989-11-27 | 1991-07-18 | Matsushita Electron Corp | Removing method of resist |
| JP2001110895A (en) * | 1999-10-07 | 2001-04-20 | Matsushita Electronics Industry Corp | Formation method for metal wiring |
| JP4559565B2 (en) * | 1999-10-07 | 2010-10-06 | パナソニック株式会社 | Method for forming metal wiring |
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