JPS58218094A - Drive circuit of magnetic bubble memory - Google Patents

Drive circuit of magnetic bubble memory

Info

Publication number
JPS58218094A
JPS58218094A JP57099227A JP9922782A JPS58218094A JP S58218094 A JPS58218094 A JP S58218094A JP 57099227 A JP57099227 A JP 57099227A JP 9922782 A JP9922782 A JP 9922782A JP S58218094 A JPS58218094 A JP S58218094A
Authority
JP
Japan
Prior art keywords
circuit
magnetic bubble
emitter
output
time constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57099227A
Other languages
Japanese (ja)
Other versions
JPH0232710B2 (en
Inventor
Shinsaku Chiba
千葉 真作
Haruhiko Kishi
治彦 岸
Ryuji Yano
矢野 隆二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57099227A priority Critical patent/JPS58218094A/en
Publication of JPS58218094A publication Critical patent/JPS58218094A/en
Publication of JPH0232710B2 publication Critical patent/JPH0232710B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
    • G11C19/0858Generating, replicating or annihilating magnetic domains (also comprising different types of magnetic domains, e.g. "Hard Bubbles")

Abstract

PURPOSE:To suppress the generation of excessive magnetic bubble produced at a generator, by providing a time constant set circuit shaping slowly only the fall waveform of a pulse current between a TTL signal input circuit and an emitter follower constant current source circuit. CONSTITUTION:When an output transistor (TR) Q1 of the emitter follower constant current source circuit 3 is turned on, a reference voltage Vref based on a reference voltage circuit 2 is impressed to the emitter, and a current determined with a current set resistor RE connected to the emitter and the emitter voltage flows to a load resistor RL located at the outside of an integrated circuit connected to the collector, so long as the output TRQ1 is not saturated. In this case, since a time constant set circuit 4 comprising a diode D3, a capacitor CT and a resistor RT is connected to the base of the output TRQ1, the base potential of the output TRQ1 is increased to a voltage charged up with the capacitor CT and the fall waveform of an output pulse current I is a mild waveform.

Description

【発明の詳細な説明】 本発明は磁気バブルメモリ駆動回路、特に磁気バブルメ
モリ素子の磁気バブル発生回路(ジェネレータ)におい
て、余分な磁気バブルがある確率で発生するのを抑止し
た磁気バブルメモリ駆動集積回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a magnetic bubble memory drive integrated circuit that suppresses the generation of extra magnetic bubbles with a certain probability in a magnetic bubble memory drive circuit, particularly in a magnetic bubble generation circuit (generator) of a magnetic bubble memory element. It is related to circuits.

一般に磁気バブルメモリ素子においては、磁気バブルの
発生、消去もしくは複製などの機能が必要である。そし
て、これらの動作は磁気バブルの″ 転送路上に設けら
れたヘアピン状のコンダクタパターンにパルス電流を流
し、局部磁界を作ることによって行なわれる。このため
に磁気バブルメモリ装置では、これらの電流を流すため
の駆動回路を有し、パルス電流を流している。これらの
駆動回路のうち、磁気バブルを発生させる磁気バブル発
生回路(ジェネレータ)の駆動回路においては、ジェネ
レータの磁気バブル書き込み特性の向上。
Generally, magnetic bubble memory devices require functions such as generating, erasing, or duplicating magnetic bubbles. These operations are performed by passing a pulsed current through a hairpin-shaped conductor pattern provided on the transfer path of the magnetic bubble to create a local magnetic field.For this purpose, magnetic bubble memory devices do not allow these currents to flow. The drive circuit for the magnetic bubble generation circuit (generator) that generates magnetic bubbles is designed to improve the magnetic bubble writing characteristics of the generator.

省き込みエラーの低減および余分な磁気バブルの発生抑
止などを改善する手段として磁気バブル発生用パルス電
流の電流波形の立上少時間の時定数を早くしてその立下
り時間の時定数を遅くするという波形整形が必要とされ
ている。
As a means of reducing omission errors and suppressing the generation of extra magnetic bubbles, the time constant of the rise time of the current waveform of the pulse current for magnetic bubble generation is made faster and the time constant of the fall time thereof is made slower. This waveform shaping is required.

第1図は発明者らによって提案されている磁気バブル発
生用ジェネレータの駆動集積回路の一例を示す要部回路
図である。同図において、1はトランジスタロム* Q
 a s Q oとダイオードD1とバイアス抵抗R1
,R2と電流制限抵抗R3とからなるTTL信号入力回
路、2は電流制限抵抗R4とダイオードD2とか・らな
りTTL信号入力回路1および後述する定電流源回路に
一定の基準電圧V、。fを供給する基準電圧回路、空は
磁気バブルを発生させるジェネレータに磁気バブル発生
用パルス電流1を流す出力トランジスタQlを有するエ
ミッタホロア形定電流源回路、RLは磁気バブルを発生
させるジェネレータとしての負荷抵抗、RIIは負荷抵
抗RLに流すパルスを流Iを設定す不物流値設定用抵玩
である。そ、して、これらの各回路、1,2.3を構成
する部品は図示しない例えばシリコン製のチップ上に集
積化して構成され、□・負荷抵抗RLはチップ外の磁気
バブルメモリ素手、上に配置されている。      
      ・・′:このように構成された磁気誓ニブ
ルメモリ駆動回路において、TTL信号入カ回路□、1
およびエミッタオ。アヤえ、、、、工、い、、−パ:・
あittm*fVi 、v。
FIG. 1 is a circuit diagram of a main part showing an example of a driving integrated circuit for a generator for generating magnetic bubbles proposed by the inventors. In the same figure, 1 is a transistor ROM*Q
a s Q o, diode D1 and bias resistor R1
, R2 and a current limiting resistor R3; 2 is a TTL signal input circuit 1 consisting of a current limiting resistor R4 and a diode D2, and a constant reference voltage V for the constant current source circuit described later. The reference voltage circuit that supplies f, the emitter-follower type constant current source circuit that has an output transistor Ql that supplies the pulse current 1 for generating magnetic bubbles to the generator that generates magnetic bubbles, and RL the load resistor that serves as the generator that generates magnetic bubbles. , RII is a resistance value setting resistor that sets the pulse flow I to be applied to the load resistor RL. The components constituting each of these circuits 1, 2, and 3 are integrated on, for example, a silicon chip (not shown), and the load resistor RL is connected to a magnetic bubble memory outside the chip, such as a bare hand or a top. It is located in
...': In the magnetic nibble memory drive circuit configured in this way, the TTL signal input circuit □, 1
and Emittao. Ayae......work...-pa:・
attm*fVi, v.

・1 ”□・玉 および基準電圧■refが印加され、’ TTL信号信
号入路回路1力端子1aK第2図(a)に示す所定の入
力パルスvinか入力されると、エミッタホロア形定電
流源回路3の出力トランジスタQ1のオフ時にはベース
電位が第2図(b)に示すように急激に零電位とカシ、
第2図(e)に示すようにパルス電流■の立下シ波形は
急峻となる欠点がめった。
・1 "□・Ball and reference voltage ref are applied, ' TTL signal signal input circuit 1 output terminal 1aK When the predetermined input pulse vin shown in Figure 2 (a) is input, the emitter follower type constant current source When the output transistor Q1 of the circuit 3 is off, the base potential suddenly drops to zero potential as shown in FIG. 2(b).
As shown in FIG. 2(e), the falling waveform of the pulse current (2) was often disadvantageous in that it was steep.

したがらて本発明は、TTL信号入力回路とエミッタホ
ロア形定電流源回路との間に、パルス電流の立下り波形
のみをゆるやかに整形する時定数設定用回路を設けるこ
とによって、ジェネレータにおいて生ずる余分な磁気バ
ブルの発生を抑止した磁気バブルメモリ駆動回路を提供
することを目的としている。
Therefore, the present invention provides a time constant setting circuit that gently shapes only the falling waveform of the pulse current between the TTL signal input circuit and the emitter-follower type constant current source circuit, thereby reducing unnecessary noise that occurs in the generator. The object of the present invention is to provide a magnetic bubble memory drive circuit that suppresses the generation of magnetic bubbles.

以下図面を用いて本発明の実施例を絆細に蚊明する。 
       ・パ 第3図は本発明によ゛する磁気バブルメモリ駆動回路に
係わる磁気バブル発生用ジェネレータの駆動集積回路の
一例を示す々部回路図であシ、第1図と同記号は同一要
素と9るのでその説明は省略す′□□□′1゜ る。第3図において、TTL信号入力回路1とエミッタ
ホロア形定電流源回路3との間には、パルス電流Iの電
流波形の立下り時間のみにTTL信号入力回路1および
基準電圧回路2を電気的に切シ離すダイオードD3と、
このダイオードD3の負極とアース間に並列接続された
時定数設定用抵抗R7と、時定数設定用コンデンサCT
とから構成される時定数設定回路4が接続されている。
Embodiments of the present invention will be explained in detail below using the drawings.
- Figure 3 is a partial circuit diagram showing an example of a drive integrated circuit for a generator for generating magnetic bubbles related to the magnetic bubble memory drive circuit according to the present invention, and the same symbols as in Figure 1 indicate the same elements. 9, so the explanation will be omitted. In FIG. 3, the TTL signal input circuit 1 and the reference voltage circuit 2 are electrically connected between the TTL signal input circuit 1 and the emitter follower type constant current source circuit 3 only during the fall time of the current waveform of the pulse current I. a diode D3 to be disconnected;
A time constant setting resistor R7 and a time constant setting capacitor CT are connected in parallel between the negative terminal of this diode D3 and the ground.
A time constant setting circuit 4 is connected thereto.

この場合、この時定数設定回路4も各回路1,2..3
の構成、部品と同様にチップ上に集積化して構成されて
いる。
In this case, this time constant setting circuit 4 also applies to each circuit 1, 2 . .. 3
The structure and components are integrated on a chip.

このように構成された磁気バブルメモリ駆動回路におい
て、磁気バブル発生用パルス電流は、TTL信号入力回
路1の入力端子1 a K11E 3図(a)に示す入
力パルスViaに対応してエミッタホロア形定電流源回
路3の出力□トランジスタQlがオンすることにより、
基準電圧回路2にしたがう基準電圧V1、fがエミッタ
に印加され、このエミッタV(接続された電流値設定用
抵抗RMとエミッタ電圧とで決定される電流は出力トラ
ンジスタQlか飽和しないI(fl Dコレクタに接続
された集積回路の外部にある負荷抵抗RLに流れる。こ
の場合、ダイオードD3+コンテンサC!および抵抗R
丁tらAる時定数設定用回路4が出力トランジスタQ1
のベースに接続されているので、出力トランジスタQs
のベース電位はコンデンサCTに充電された電圧νに上
昇し、第4図6)に示すようにVや・”(C,R,)に
したがう曲線を描き々がら零電位に戻り、したがって、
出力パルス電流Iの立下り波形は第4図(C)で示すよ
うにゆるやかな波形が得られるととKなる。
In the magnetic bubble memory drive circuit configured in this way, the pulse current for magnetic bubble generation is transmitted to the input terminal 1a K11E of the TTL signal input circuit 1 via the emitter follower forming constant current in response to the input pulse Via shown in FIG. By turning on the output □ transistor Ql of the source circuit 3,
A reference voltage V1, f according to the reference voltage circuit 2 is applied to the emitter, and the current determined by the emitter voltage and the current value setting resistor RM connected to the emitter V is determined by the output transistor Ql or the unsaturated I(fl D into a load resistor RL external to the integrated circuit connected to the collector, in this case diode D3 + capacitor C! and resistor R
The time constant setting circuit 4 is the output transistor Q1.
Since the output transistor Qs is connected to the base of
The base potential of increases to the voltage ν charged in the capacitor CT, and as shown in FIG.
The falling waveform of the output pulse current I becomes K when a gradual waveform is obtained as shown in FIG. 4(C).

以上説明したように本発明によれば、エミッタホロア形
定電流源回路の入力端に時定数設定回路を設けたことに
よって、磁気バブルを発生させるパルス電流の立下シ波
形のみをゆるやかな波形とすることができるので、余分
な磁気バブルの発生を確実に抑止することができる。ま
た、従来磁気バブルメモリ駆動集積回路に夕1付り部品
として取り付けていた時定数設定用コンデンサが不要と
なシ、との結果、接続用端子も不要と准るなど回路構成
のコスト面からの効果も同時に得られるなどの極めて優
れた効果を有する。
As explained above, according to the present invention, by providing the time constant setting circuit at the input end of the emitter follower type constant current source circuit, only the falling waveform of the pulse current that generates the magnetic bubble is made to be a gentle waveform. Therefore, generation of extra magnetic bubbles can be reliably suppressed. In addition, the time constant setting capacitor that was conventionally attached to the magnetic bubble memory drive integrated circuit as an additional component is no longer required, and as a result, there is no need for connection terminals, reducing the cost of circuit configuration. It has extremely excellent effects such as being able to obtain effects at the same time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は発明者らにょシ提案されている磁気バブル発生
用ジェネレータの駆動集積回路の一例を示す狭部回路図
、第2図はその入力信号に対する出力電流の関係を示す
図、第3図は本発明による磁気バブルメモリ駆動回路に
係わる磁気バブル発生用ジェネレータの駆動集積回路の
一例を示す要部回路図、第4図はその入力信号に対する
出力電流の関係を示す図である。 1・・・・TTL伯号信号回路、1a・・・・入力端子
、2・・・・基準電圧回路、3・・・・エミッタホロア
形定電流源回路、4・・・・時定数設定回路。 、τ・、れ
Fig. 1 is a narrow circuit diagram showing an example of a driving integrated circuit for a generator for generating magnetic bubbles proposed by the inventors, Fig. 2 is a diagram showing the relationship between the output current and the input signal, and Fig. 3 4 is a main circuit diagram showing an example of a driving integrated circuit of a generator for generating magnetic bubbles related to the magnetic bubble memory driving circuit according to the present invention, and FIG. 4 is a diagram showing the relationship between the output current and the input signal. 1...TTL signal circuit, 1a...input terminal, 2...reference voltage circuit, 3...emitter follower type constant current source circuit, 4...time constant setting circuit. ,τ・,re

Claims (1)

【特許請求の範囲】 磁気バブルメモリ素子の磁気バブル発生回路に磁気バブ
ル発生用パルス電流を流すエミッタホロア形定電流源回
路を少なくとも具備してなる磁気バブルメモリ駆動集積
回路において、前記エミッタホロア形定電流源回路の入
力端にダイオード。 抵抗およびコンデンサからなる時定数設定回路を設け、
該時定数設定回路の時定数によシ前記パルス電流の立下
シ波形のみをゆるやかにしたことを特徴とする磁気パズ
ルメモリ駆動回路。
[Scope of Claims] A magnetic bubble memory drive integrated circuit comprising at least an emitter follower type constant current source circuit for flowing a magnetic bubble generation pulse current through a magnetic bubble generation circuit of a magnetic bubble memory element, wherein the emitter follower type constant current source Diode at the input end of the circuit. A time constant setting circuit consisting of a resistor and a capacitor is provided,
A magnetic puzzle memory drive circuit characterized in that only the falling waveform of the pulse current is made gentler by the time constant of the time constant setting circuit.
JP57099227A 1982-06-11 1982-06-11 Drive circuit of magnetic bubble memory Granted JPS58218094A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57099227A JPS58218094A (en) 1982-06-11 1982-06-11 Drive circuit of magnetic bubble memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57099227A JPS58218094A (en) 1982-06-11 1982-06-11 Drive circuit of magnetic bubble memory

Publications (2)

Publication Number Publication Date
JPS58218094A true JPS58218094A (en) 1983-12-19
JPH0232710B2 JPH0232710B2 (en) 1990-07-23

Family

ID=14241777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57099227A Granted JPS58218094A (en) 1982-06-11 1982-06-11 Drive circuit of magnetic bubble memory

Country Status (1)

Country Link
JP (1) JPS58218094A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5671875A (en) * 1979-11-14 1981-06-15 Fujitsu Ltd Drive system for magnetic bubble memory gate
JPS5782276A (en) * 1980-11-11 1982-05-22 Nec Corp Driving circuit for magnetic bubble generator
JPS589280A (en) * 1981-07-08 1983-01-19 Nec Corp Driving circuit for magnetic bubble generator
JPS5897186A (en) * 1981-12-02 1983-06-09 Hitachi Ltd Magnetic bubble memory driving circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5671875A (en) * 1979-11-14 1981-06-15 Fujitsu Ltd Drive system for magnetic bubble memory gate
JPS5782276A (en) * 1980-11-11 1982-05-22 Nec Corp Driving circuit for magnetic bubble generator
JPS589280A (en) * 1981-07-08 1983-01-19 Nec Corp Driving circuit for magnetic bubble generator
JPS5897186A (en) * 1981-12-02 1983-06-09 Hitachi Ltd Magnetic bubble memory driving circuit

Also Published As

Publication number Publication date
JPH0232710B2 (en) 1990-07-23

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