JPS58215076A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To contrive to stabilize the electrical properties by a method wherein a compound semiconductor is coated with the organic solvent solution of Si hydroxide which contains constituent elements, the replacement body thereof, or the low polymers thereof, thus heated, and then an insulation film is superposed thereon. CONSTITUTION:The N type GaAs substrate 1 is spin-coated with the solution wherein Si(OH)4, RnSi(OH)4-n, or the low polymers thereof and H3AsO4 are dissolved in C3H5OH. The SiO2 insulation film 2 is formed by fixed heat treatment by condensation from the Si(OH)4 and three dimensional polymerization between each other, and simultaneously the As by the decomposition of H3AsO4 is let to be contained in the film 2. The film 2 has good adhesion property, and the film thickness can be controlled by the viscosity of the solution and the number of spinning. An Al electrode 5 is provided by superposing a SiO2 film 3 on the film 2, and an AuGe/Au electrode 4 is added on the substrate, resulting in completion. This constitution reduces the seperation of constitutent atom As from the surface of the substrate 1, and reduces the surface level density at the interface between the film 2, therefore the characteristics of the device are stabilized.

Description

[Detailed Description of the Invention] (a) The technical field of the invention relates to a method for producing a half-body long tora, especially an anti-pork membrane, and a method for producing a 11Z proboscis-half-toothed membrane that is applied to a sleeping loquat membrane.杷tK, which reduces the level density, causes the membrane's arrow to flow.

(b) Background of the technology Further improvements in the capacity and cost performance of information processing platemaking are said to depend on the semiconductor devices used in this process, and improvements in the speed and power consumption of logical arithmetic units and reductions in the power consumption of memory devices are essential. Larger capacity is being strongly promoted.

Currently, only silicon (Si) semiconductor devices are in practical use, but the high speed of Sl semiconductor devices may be due to the physical properties of St, such as carrier mobility in low electric fields and saturation drift velocity in strong electric fields. In order to reduce the size of 1I11tJ, in parallel with the development of ultra-large-scale integrated circuit devices using Si, gallium arsenide (GaAs) and other compound semiconductors were used instead of 810, achieving high speeds that could not be achieved with Si. Efforts are underway to realize all excellent semiconductor devices with low power consumption.

(e) Conventional technology and problems Potassium/arsenic (GaAs) and indium/phosphorus (I)
Regarding I-V group compound semiconductors such as nP), field effect transistors (hereinafter abbreviated as FETs) have become mainstream due to the short lifetime of minority carriers and the fact that the process is simpler than bipolar transistors. ing. In particular, these l-V group compound conductors can be used as semi-insulating conductors to reduce ground capacitance. ET is mainly used.

The most commonly used 5i-FET is MI.
It is S-shaped. However, regarding III-V compound semiconductors, MIS type F'ETs are not yet in the prototype stage. Regarding the GaAs compound semi-enhanced body, as will be clarified later, n
It is extremely difficult to form a type inversion layer, and although it is easier to form an n-type inversion layer for InP than for GaAs, if the insulating film is self-sprouting, it is difficult to form a type inversion layer. This is due to the fact that stabilization of quality has become an important issue.

In order to stabilize the interface between the compound semi-quartet and the insulating film, the gap =W also occurs in the above-mentioned Nyotoki barrier type FET. That is, the gate-pole of the Schottky barrier FET,
An insulating film, such as divanide silicon (SiOz), is provided on the semiconductor surface between the source hexode or the drain electrode. In this 7-layer barrier type FETVc,
A surface depletion layer is formed quite widely at the interface part of the 9th surface of a half-metal material such as GaAs, which is in contact with the insulating film from the depletion layer directly under the gate to the source or drain electrode, and as a result, the depletion layer of this FET This causes deterioration of cylinder frequency characteristics, etc.

It is extremely difficult to form an n-type inversion layer in the GaAs compound semiconductor mentioned above, and if the depletion layer is formed at the semiconductor interface, the surface of GaAs will have a voting band of compatible positions due to constituent atomic vacancies. This is the result of being present near the center of the surface and fixing the surface potential.

Furthermore, in the case of InP, since this surface level occurs near the bottom end of the conductor, the nu inversion layer is more likely to be formed than in GaAS.

The existence of the above-mentioned surface states that occurs when a disconnected film is formed on the semiconductor surface inhibits the MIS diode, and the voltage applied to the till between the semiconductor and the metal oxide layer provided on the insulating film. It can be calculated by adding 1 to the total capacitance C of 7S to Vg.

That is, the equivalent B di capacitance Crri, e1r
*This is the series value C of the capacitance C1 of the film portion and the capacitance C2 of the depletion layer generated on the semiconductor surface under the metal electrode. Assuming that the conductivity of the corpuscular body is n-type, the equivalent capacitance C with respect to the applied voltage Vg ideally changes as shown in FIG. 1. When Vg is large in region 1 where Vg〉0, C2 is large due to the first layer of nuisance on the semiconductor surface, so C is so C + Ic b L
It becomes. Depending on Vg, C7 will therefore decrease, but in the region ■ where vg becomes 0 and depletion layer sound occurs,
As the depletion f width increases, c, , c decrease. However, when Vg < O and lvgl reaches the region (2) where a p-type inversion layer is formed, the depletion layer width increases further, and the capacitance due to the holes induced on the surface decreases. Pressure folds C2 and C increase. However, if we add the capacitance C at high frequencies, the formation of the p-type inversion layer cannot follow this cylinder wavenumber, so the capacitance in this part is not observed, and a broken line H is obtained, which indicates the inversion layer region. VC
The capacitance that can be measured must be measured by low frequency.

Methods for forming an insulating film on a compound semiconductor surface include direct thinning of the semiconductor, deposition of S1021 silicon nitride (S i3N4 ), etc. by CVD method (CVD method), etc. This method has been conventionally used.

However, when a compound semiconductor device is formed using these insulators (G+'f-), there are problems as mentioned above. ? If we define the original equivalent capacitance C-applied voltage Vg for the shape b5, we get a shape like the example shown in Figure 2, and Vg<O.
It is demonstrated that the increase in capacitance in the region V where lvgl is large, that is, the formation of an inversion layer, is very difficult to suppress.

(d) Purpose of the Invention The present invention relates to a furnace for compound semiconductor devices, which reduces the surface color resistance of the four-terminal interface in a compound that is in contact with the G group, thereby completely stabilizing the chemical properties of the compound semiconductor device. The purpose is to provide a manufacturing method for.

(e) Isamu・1mei's structure Before the present invention
At least - of the elements constituting one compound semiconductor -(;
Containing water, 6] goods or 11" + 4
By distributing the solvent f'cF solution of the can molecules 'tif coalescence of 6 times to Keimata Sono 1 and applying heat treatment fIII, the former iL' light element is contained/recombined. (',') Completely form the compound insulating film, and then remove the silicon oxide insulator BQ.
This can be achieved by creating a history above.

(f) 'i (-Ming's',, 1.: is [more than 1 example], book! + (, Ming is 2 friends) Tomo f, ilj compares 11m1 with 1 and treats it as the master of the concrete tiode. :j', i process・7F
The sushi choku diagram is spear, ru.

;A: J′l”'l (al VC7g:suZll
(n;'i!!GaAs & board 10V (Noricon m
11: g'n w, c*lI<, 2 Y, 'l'l
'J' Kusuruga Zono 9〉1 戊力法[4111:!
It's lll+ of 'l・1il-.

Yuoj, '1. Iln11(・C,i,・te(1, chloride water monomer compound(δ1(01-1),) <, L<
Ii of kJ'j-: iJ, jlt(RnS i (O
H) 4-n; where R is an organic group, n21 to 3),
Alternatively, a low-molecular combination thereof and a compound containing arsenic (As) such as arsenic acid (H3AsO4) are mixed in ethanol (C2Hw
Using a solution dissolved in an organic solvent such as OH), this solution is dropped onto the GaAs substrate 1 fixed on a spinner, and applied while rotating the spinner.

After that, first, for example, the temperature is 350 degrees Celsius for 30 minutes, then the temperature is 650 to 700 degrees Celsius for 40 hours.
By performing heat treatment for a few minutes, a silicon oxide insulating film 2 is formed by condensation such as 81(OH)4→S102 +2HtO and three-dimensional polymerization between 5hots, and at the same time 2HIAsO ,→As
2O5+ 31-120, etc. are decomposed, and As, which is a negative element constituting the compound semiconductor, is contained in the silicon oxide insulating film 2 to form h.

When forming the Noricon oxide insulating film 2, the surface tension of the solution causes the solution to adhere to the semiconductor surface or to the grooves already provided on the semiconductor surface. In addition, if an insulating film is formed overnight by CVD on the electrodes etc. provided on the surface of the early ant body, the same name as on the surface of the early ant body is used. In contrast to jIC, where ,< is more than ≠, the thickness of the film above ``I□, tip, etc., can be adjusted. , the difference in film thickness, i.e., the slope part of the screen 2 like i°C, γ5° of the core liquid and IB e=d, can be made to a certain extent.

Then the third one is shown in I(b)! /'' Ku, Tsu・■ Forms a second green leaf, olfactory 3, on the silicon oxidized proboscis 7-line group 2 of the anus.

This is not necessarily made of light, but it is formed in order to give a deposit basket, and as a material it is 1" For example, 5i02゜513N++ aluminum nitride (AIN) etc. should be selected at will, and its shape is also 2..." Eha CV
16] It is good to use your sword.

Next, as shown in Figure 3 (cJ), do the 4 dragons that will rise,
Gold/Kermanium (AuGe)/Mi (Au) Blue ('
Therefore, 1. The layer 5 on the insulating film 3 is arranged as follows.

As a result of measuring the equivalent capacitance C-applied cage pressure Vg characteristic of the MIS diode of this fruitful example obtained as described above, it was found that at a measurement frequency of 200 (H7) or less, at a frequency of 6 (Hz) shown in Fig. 4, As in the measurement example, Vg < O
r, lvg (In the case of dogs, an increase in the equivalent Yayabanotans C clearly appeared, confirming that an inversion layer was formed.

The formation of this inversion layer reduces the level of the active surface level that fixes the iM+ potential at the interface between the GaAS conductor substrate 1 and the silicon oxide insulating film 2, which affects the characteristics of the semiconductor device. This means that it no longer has a significant impact. This is because the silicon oxide insulating film 2 contains As, which is an element constituting the semiconductor, and therefore the amount of constituent atoms removed from the surface of the semiconductor substrate 1 is reduced.

The effect of completely suppressing the dissociation of the atoms that make up the entire semiconductor is achieved by using Akira Honkabu's method of forming the % J Zemizoku group, which does not heat up, in the state where the surface of the semiconducting body is embossed. Become a participant in the sign.

In addition, in the above embodiment, silicon oxide film 2, water film 2
Although As is included in the , does adding gallium (Ga) produce an effect similar to the Honsho Niwa example? Obtainable. Furthermore, when the semi-straddle substrate is another compound such as InP, for example, phosphorus (P) may be used in place of A9 in the above embodiment.
T5! You can get the benefits of treatment.

(g) Effects of the Invention The manufacturing method of the present invention reduces the surface state density at the interface between the four compound workers and the insulating film described above, thereby increasing the electrical 8 negative. A shaft that can be stabilized, for example, a voltage stamp a in an MIS diode, etc.
Characteristics of i-zenei compound molecules include improved current response characteristics, reduced noise in FETs, etc., and prevention of increase in dark current due to expansion of the depletion layer outside the light-receiving region of the light-receiving device.

It's about improving one's short flute and one's composure.

[Brief explanation of the drawing]

Figure 1 shows an example of the characteristics of a MIS diode with good pressure characteristics, and Figure 2 shows an example of the characteristics of a GaAs M, IS diode manufactured using the original manufacturing method. f diagram, 3rd part: (aj to (C)
(Cross-sectional view showing the peak addition ψ of the present invention)
Equivalent capacitance of the spoon i - 60 feet' pressure f
iiTh is 12. In the figure, ■ is a GaAs compound half-4 working plate, 2 is a silicon oxide insulating film, 3i-1 is an insulating film, and 4 is an n (
If. Electrode, 5 indicates an electrode. 1F1) ptB-F)

Claims (1)

[Claims] On the compound semiconductor cutting surface, the element f constituting the two tenkyo of the compound
By applying an organic solvent bath solution of silicon hydroxide (or four of them or a low-molecular combination thereof) containing at least - to the silicon oxide viscous material containing the above-mentioned elements, the silicon oxide viscosity containing the above elements is applied and heated. 1. A method for attaching a semiconductor device, comprising the steps of forming a bulge, and further providing an insulating film on the silicon hydride.