JPS58204600A - Printed board mounting system - Google Patents
Printed board mounting systemInfo
- Publication number
- JPS58204600A JPS58204600A JP8826482A JP8826482A JPS58204600A JP S58204600 A JPS58204600 A JP S58204600A JP 8826482 A JP8826482 A JP 8826482A JP 8826482 A JP8826482 A JP 8826482A JP S58204600 A JPS58204600 A JP S58204600A
- Authority
- JP
- Japan
- Prior art keywords
- printed board
- board
- connector
- printed
- board mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Mounting Of Printed Circuit Boards And The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
fa+発明の技術分野
本発明は各積電子機器の構成に広く使用されるプリント
板バノケ=ジを所要数バックボー1・゛と着脱自在に挿
着する実装方式の改良に関す。[Detailed Description of the Invention] FA+Technical Field of the Invention The present invention is directed to an improvement of a mounting method for removably inserting a required number of printed circuit boards into a backboard 1. about.
(1))技術の背景
この槓バックボー1′はコネクターを介して着脱自在に
挿着されるプリン1根パツケージ間の接続配線バク ン
を備え、−・般にこれ等を収容°4る筺体°の背面に固
定され、一方コネクターを介してバノクポ ドと着脱自
在に挿着されるプリント板バノケ ジは該ボードの前面
に筐体上F内面に設はイ
られたガ//トレールを介して所要数並設される。(1)) Background of the technology This backboard 1' is equipped with a connecting wiring bag between the main body and the cage, which is detachably inserted via a connector, and generally has a housing for housing these parts. The printed board board is fixed to the back of the board, and is removably inserted into the board via a connector. Several are installed in parallel.
総てのプリント板パッケージが挿着された状態で使用に
供せられるの°Cあるが、使用状態のままでプリンI板
パッケージの一部取り替え、あるいは交換の必要の生じ
る場合がある。例えばメモリー機能をもリプリント娠、
あるいは予備プリント板を設けであるため1プリン1板
のダウンに際しても、正規の機能を発揮しであるも、ダ
ウンしたプリンI・板を取り替える必要の生じた場合等
がその一例である。Although all the printed board packages are ready for use with them inserted, it may be necessary to partially replace or replace the printed board packages while they are still in use. For example, the memory function can also be reprinted,
Another example is when a spare printed board is provided, so even if one printed board goes down, it still functions normally, but it becomes necessary to replace the downed printed board.
(C:)従来技術と問題点
ゾリン]・根パッケージとバンクボードとの挿着に際し
゛(はパターン先端の端子列と、バックボードの二1ネ
クターとは総ての個々の端子が同時に接続され、あるい
は同時にその接続を解くよう構成さ°Cいる。(C:) Prior art and problems Zorin] - When inserting the root package and the bank board, all the individual terminals are connected at the same time to the terminal row at the tip of the pattern and the 21 connector on the back board. or be configured to simultaneously release the connection.
一力Iランシスターや所謂IC等半導体の能動部品は所
定の給電4受け−C3より正常の動作状態になるのに極
め−(短時間ではあるが若ヒの時間を必要と46゜
従ってに&初のス(yチ・オン、および既述のプリン1
板パソケ ンの交換、取り替え等に際し゛(は、j=&
!同時接続、同時解放構成では、−瞬正常でない動作状
態か現出し、トランジスターやICの不正常へ出力が]
、イズとなってバックポー1′を介して接続されている
他のパターンの信号線に及んで誤動作の1只囚となっ(
いた。Semiconductor active parts such as Ichiriki I-run sisters and so-called ICs receive a specified power supply 4 -C3 to reach a normal operating state (although it takes a short time, it takes a lot of time). The first su(ychi-on) and the already mentioned pudding 1
When replacing or replacing a board PC, please use the
! In a simultaneous connection and simultaneous release configuration, an abnormal operating state appears for a moment, and the output is output to an abnormal transistor or IC.]
, and the signal lines of other patterns connected via back port 1' were affected, resulting in malfunction (
there was.
電j′−機器、殊に動作機能の著しく早くかつ袂雑とな
った電子交換機、電子計算機においては、上記欠点は今
や全く見過しできないところである。The above-mentioned drawbacks can no longer be overlooked in electronic equipment, especially in electronic exchanges and electronic computers whose operating functions are extremely fast and complicated.
(di発明の目的
本発明は既述の欠点のないプリン)1人装方式を提IJ
iすることをそのl」的とする。(diObjective of the invention The present invention does not have the above-mentioned drawbacks) It proposes a one-person dressing system.
Let what I do be its l' purpose.
(e1発明の構成
に記目的を達成するたあ本発明におい゛ごは、複#!1
1固のプリンl板パソケ→シを着脱自在に挿着するバッ
クポ 1の共通ず4号線が人々ケ−1・回路を接続され
るよう構成され、該ゲート回路がプリンI線パノケ ジ
の挿着縁終位置で始めて開かれる手段が備えられた構成
のシリンド板人装方式を提供”4る。(In order to achieve the purpose described in e1 structure of the invention, the following points are required in the present invention:
The back port is configured to removably insert the 1-pin pudding l board pasoke → shi.The common line 4 of 1 is configured to connect the pudding I-line panokée to the circuit, and the gate circuit is used for insertion of the pudding I line panokke. To provide a cylinder board mounting system having a structure that is provided with a means that is opened only at the end position of the edge.
ゾリンl−&バソケーソのバックポー1゛への挿着に際
し′(余端f列がコネクタ に同時に接続されるが、挿
着縁終位置に達するまでには若干の時間を要し、この時
間力用ノンノスタ、IC等の半導体能動部品の定常化ま
での〕(通伝号線接続遅延時間となる。When inserting the Zorin l- & Vaso queso into the back port 1' (the remaining end row F is connected to the connector at the same time, it takes some time to reach the final position of the insertion edge, and this time This is the communication line connection delay time until semiconductor active components such as non-nostars and ICs become steady.
即ち、この遅延時間の終了後でなければ、バックポ
ドの共通信号線が個々のプリント板パノケンの該当端子
と接続されることがなく、従っ゛(定帛に達せずに発生
ずるトランジスターあるいはICの出力が信号線を介し
て他のプリント板に影響を及ばずこともなくなる。That is, the backpoint will not be activated until after this delay time has expired.
The common signal line of the board is not connected to the corresponding terminal of each printed board Panoken, so (the output of a transistor or IC that occurs without reaching a constant voltage will affect other printed boards via the signal line. It will no longer be possible to do anything.
(1’1発明の実施例
91図面に不ず実施例によっ°C本発明の要旨を具体的
に説明する。全図を通じ同一・符号は同一・対象PIを
小4゜
第11fflは一フイクIJス・イ、すMを使用した実
施例を要部斜視図を以−C小ずもので、力・イドレ ル
l、1°を介り、“(筺体背面のバックポ ド2の二2
不クタ 3.3′ にプリント板パノう° シ4がその
先、端の接点列5.5゛ を挿入して挿着される。(1'1 Embodiment 91 The gist of the present invention will be specifically explained by referring to the embodiments without reference to the drawings. The same symbols are the same throughout the drawings. The target PI is 4 degrees. The 11th ffl is one frame. The following is a perspective view of the main parts of an example using IJ Su・I, SuM.
The printed circuit board pane 4 is inserted into the retainer 3.3' by inserting the contact row 5.5' at the tip and end thereof.
紡バック、IF F2に同様に挿着される図ボされな
いゝ他、の所要数のプリン1板パソケージとの相!1−
\)・
接続のための共通(−号綿6.6゛ とごれと接続され
るコイ、フタゝ゛1.3.3゛ の端rとの間にゲ I
7.7゛がバックポ ド2Lに実装され°(おり、プリ
ント板4が挿iさj′J始めて、接点列5.5゛がコネ
クタ 3、;(゛ に挿入され接続され、プリント根4
に搭載された半導体部品が給電され始めCも(j号線6
.6° はバイ’/ 、A電圧E+こよっ”ζ3111
状蛯にあるゲ 17.7″ のために未接続のままであ
る。プリン1機4の挿着が進み、:1ネクタ 3.3”
の間に装掬されたマイクUス、イノナN1が、ゾリン)
板4の先端突出部8にfっ゛C動+’L Jるや、その
接J5.4 Sの閉結により、))1・7.7° の阻
止がとかれて信号線の接続が始めて行われる。第2図は
第3図に示すフォトインタラプタ−を2 Ill使用し
て純電気的に本発明の目的を達成する他の実施例を要部
斜視図を以て示すもので、2個のフォトインタラプタ−
P、P’ は上部ガイドレール1の途中に装着され、
又プリント板4の上部縁部にスリット9を設け、スリッ
ト9がフォトインタラプタ−Pと一致する位置が該プリ
ント板のバンクボード2との最終位置に該当するよう定
められる。The spinning back, which is inserted in the same way as the IF F2, is compatible with the required number of printed 1-board PC cages! 1-
\)・ Common for connection (-No. 6.6゛ Carp to be connected to the dirt, and the end r of the lid ゛゛1.3.3゛ I
7.7" is mounted on the back pod 2L, and the printed circuit board 4 is inserted and the contact row 5.5" is inserted and connected to the connector 3;
Power began to be supplied to the semiconductor components mounted on C (J line 6
.. 6° is bi'/, A voltage E + Koyo'ζ3111
It remains unconnected due to the connector 17.7" in the connector. The insertion of pudding 1 and connector 4 progresses, and the :1 connector 3.3"
Mike US and Inona N1 were scooped up between Zorin)
When the protruding portion 8 of the plate 4 is connected to the protruding portion 8 of the plate 4, the connection J5.4 S is closed, and the blockage of ))1 7.7° is removed and the signal line is connected. It is done for the first time. FIG. 2 is a perspective view showing another embodiment in which the object of the present invention is achieved purely electrically by using two photointerrupters shown in FIG.
P and P' are installed in the middle of the upper guide rail 1,
Further, a slit 9 is provided at the upper edge of the printed board 4, and the position where the slit 9 coincides with the photointerrupter P is determined to correspond to the final position of the printed board with the bank board 2.
フォトインクラブターP、P’ は第3図にその側面
図(イ)と回4路構成図、(ロ)で示されるように、間
隔10を挾んで両腕に夫々人力発光ダイオード(L E
D)と出力検波器(DET)を設けてコの字状に形成
されており、正規の電圧をかけて間隔10に遮蔽物を挿
脱させることによって出力回路に動作復旧のリレー動作
をなす機能を備えている。As shown in the side view (a) and the circuit configuration diagram (b) in FIG.
D) and an output detector (DET) are installed in a U-shape, and the function is to perform a relay operation to restore operation to the output circuit by applying a regular voltage and inserting or removing a shield at intervals of 10. It is equipped with
2個のフォトインクラブターP、P” の出力をPの出
力はそのまま、P” の出力は反転(O印を付した端子
)させてAND回路11に付与し、その出力でバックボ
ード2の共通信号線6.6゛ のゲ17.7′各制御!
16よ)構成され(いる。The outputs of the two photo ink converters P and P'' are applied to the AND circuit 11 with the output of P being unchanged and the output of P'' being inverted (to the terminal marked O), and the output is applied to the backboard 2. Common signal line 6.6゛ Ge 17.7' each control!
16) is composed of.
即らシリンド板パノゲーン、1か挿着されて鰻糾位置で
スリン19かソオ)−、インタフブタ l)の間隙に入
っ(ANI)回118+1の入力端か論理的1..44
理的Oの条に1にある際以外はデ 17.7°に図−I
cの場合、a12理的0か付与されて、ノ(通(+j号
線6.6” かコネクタ :3、:3° の該当端rと
接続さJIることがない。That is, the cylinder plate panogen, 1 is inserted, and the input end of the input terminal of 118 + 1 enters the gap of the interface port 19 (19 or so) - and the interface port 1) is inserted in the cylindrical plate position. .. 44
Figure-I at 17.7°
In the case of c, a12 is given a logical 0 and is not connected to the corresponding end r of the +j line 6.6" or connector :3, :3°.
(I;)発明の詳細
な説明のよ・)に本発明におい′ζは各4di電子機器
の構成に広く使用されるシリンド板パノゲ ンとバノク
ホ 1・′との接続、あるいは接続解放に際し゛(牛4
゛る誤動を防ILし゛C機器の(6頼性りiめる著しい
効果を備えている。(I;) In the detailed description of the invention, in the present invention, 'ζ is used to connect or release the connection between the cylinder plate panogen and the banokho 1 and ', which are widely used in the configuration of each 4-di electronic device. (Cow 4
It has the remarkable effect of preventing such malfunctions and increasing the reliability of IL devices.
図は本発明の211AIの実施例を示し、第1図はマイ
クロスーイソナを便用した例を、第2図は〕第1・イン
タラシタ を使用した例を共に要部ぷ1視図でボし2、
第3図はソオトインタラゾタ を説明のための斜視図(
イ)と回路構成図(Ll)を小−4゜図にわいて1.、
l’ はガイ1′し ル、2はバソクポ ド、3.3”
はコネクター、4はプリント線パノケ ジ、5.5゛
はその接続端1列、6.6° は共通接続線、7.7
° はケ=119はスリン1.11はA N l)回路
、Mはマ・イン1」スイッチ、))、1)’ はソA
]インタノゾタ をボ4゜η 1 日
¥l 2 図
又
\
弔 づ 図The figures show an example of the 211AI of the present invention. Fig. 1 shows an example using a microsui isona, and Fig. 2 shows an example using a 1st interacitor, both of which are illustrated in perspective. 2,
Figure 3 is a perspective view for explaining Sooto Interrazota (
1) and the circuit configuration diagram (Ll) on a small -4° diagram. ,
l' is gay 1'shiru, 2 is bathokpodo, 3.3"
is the connector, 4 is the printed wire pano cage, 5.5゛ is one row of its connecting end, 6.6° is the common connection line, 7.7
° = 119 is Surin 1. 11 is A N l) circuit, M is Main 1” switch, )), 1)’ is So A
] Intanozota wobo 4゜η 1 day ¥l 2 Figures \ Condolences Figure
Claims (1)
ックボードの共通信号線は人々ケー1回路を介して個々
のプリント板パッケージの昌当端子と接続されるよう構
成され、該ゲート回路がプリント板パッケージの挿着鰻
終位置で始め′ζ開かれる手段が備えられてなることを
特徴と−46プリント板実装力式。The common signal line of the backboard into which several printed board packages are removably inserted is configured to be connected to the corresponding terminal of each printed board package via a single circuit, and the gate circuit is connected to the corresponding terminal of each printed board package. The -46 printed board mounting force type is characterized by being equipped with a means for opening the board package at the final position of insertion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8826482A JPS58204600A (en) | 1982-05-25 | 1982-05-25 | Printed board mounting system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8826482A JPS58204600A (en) | 1982-05-25 | 1982-05-25 | Printed board mounting system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58204600A true JPS58204600A (en) | 1983-11-29 |
Family
ID=13938024
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8826482A Pending JPS58204600A (en) | 1982-05-25 | 1982-05-25 | Printed board mounting system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58204600A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60150699A (en) * | 1984-01-18 | 1985-08-08 | 富士フアコム制御株式会社 | Electric connecting mechanism of electronic device |
JPS61144691U (en) * | 1985-02-27 | 1986-09-06 |
-
1982
- 1982-05-25 JP JP8826482A patent/JPS58204600A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60150699A (en) * | 1984-01-18 | 1985-08-08 | 富士フアコム制御株式会社 | Electric connecting mechanism of electronic device |
JPS61144691U (en) * | 1985-02-27 | 1986-09-06 |
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