JPS58198955A - Data transmission system - Google Patents

Abstract

PURPOSE:To transmit and receive plural kinds of command efficiently by a simple procedure, by receiving a signal consisting of data to be transmitted which is added with a code indicating the contents of said data, and thus performing data transmission, and transmitting and receiving the plural kinds of command while classifying them. CONSTITUTION:A signal received through a circuit is inputted to a receiving buffer 13 and a gate circuit 16 through a modem 12 and once command reception is completed, an interruption signal 15 is inputted to a microcomputer 14. The microcomputer 14 after confirming the output fetches a command stored in the receiving buffer 13 to open the gate circuit 16 when decoding a succeeding signal to know the indication of a picture signal, thereby driving a thermal head 17. When a command for control is indicated, those commands are fetched to drive a display element 21 through driving circuits 18 and 20, letting an operator know that the recording of a received picture is in process.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data transmission system for transmitting information between remote points.

2. Description of the Related Art In recent years, various systems have been developed that transmit information by converting information such as text or text into electrical signals and transmitting and receiving these signals.

There is a comb. When transmitting Idii information from the transmitter to the receiver in this facsimile, it is necessary to send not only image signals but also various commands related to rIIIigI! transmission. tone, etc.), number of recording sheets, character code control signals for driving the receiver, error signals, etc. Conventionally, these commands were converted into serial data of a predetermined length and sent in chronological order. .

Therefore, even if, for example, only the document size is changed and other commands are not changed, it is necessary to retransmit serial data of a predetermined length including all commands, resulting in a waste of time. Furthermore, as the number of commands increases, it takes time to analyze each of the multiple commands that are sent at once, and the equipment becomes more complex.

The present invention satisfies the above points! To provide a data transmission method that efficiently sends and receives multiple types of commands in three simple procedures.

That is, a code indicating the identity of the data is added to the data to be transmitted, data is transmitted by sending and receiving a good signal, and commands for multiple buildings are sent and received separately.

Hereinafter, the present invention will be explained in more detail using the drawings.

FIG. 1 is a block diagram showing the structure of an embodiment of a facsimile+7 transmitter to which the present invention is applied.

A key switch 1 is used by the operator to set the number of sheets to be transmitted, document size, etc. 2 is a sense country enhancer for sensing the information set by key switch 1, and 5 is a one-chip microcomputer of Chaoschi. 3 is a motor; 4 is a drive circuit for the motor 3;
This is a drive source that performs sub-scanning for optically reading the image.

The microcomputer 5 sets a command related to image transmission to the transback arrow, and then opens the gate 8 and controls the command to be output to the line via the modem 9.Next, the microphone 0 combiator 5 When the completion of transmission of the command set in the trans buffer 6 is confirmed through the signal line 7, the gate circuit 8 is switched and the gt from the imaging element 11 consisting of the COD, etc. of the document reading section (not shown) is confirmed.
The bottle lIi image signal is output to the line via the amplifier lO.

The second factor is a block diagram showing the configuration of one embodiment of a facsimile receiver (four machines) to which the present invention is applied.

The signal received through the same is transmitted via modem 12 7-
The power is applied to the processor 13 and the gate circuit 16.

When the receive buffer 13 completes receiving the command,
Fifteen interrupt signals indicating the completion of reception are manually input to the microcomputer 14. When the microcomputer 14 confirms the output, it takes in the command stored in the receive buffer 13, and when it decodes that the following signal is an image signal, it opens the gate circuit 16 and drives the thermal head 17. . Also, in the same way, those commands are decoded as commands for controlling the drive circuit. A motor 19, which is a drive source for a recording section (not shown), and an operation 1iK are connected via drive circuits 18 and 20.
The display element 21 is driven to indicate that the received data is being recorded.

Figure 3 is a block diagram showing a specific circuit configuration of the microcomputer 5, transformer buffer 6, and gate circuit 8 shown in the first figure.

In the third meat, components common to those in FIG. 1 are given the same numbers. 8 is the gate circuit and human power 4 to the S terminal
No. 11 selects the signal to be input to the modem 9 via the signal line 112. 100°101 and 102 are each 8
It is a bit parallel-in serial-out shift register, and the Q output of the shift register 102 is connected to the gate circuit 8.
is applied to channel A of

5 is a microcomputer, and the data bus DB connects directly (or via the I10 port) to the shift register 100.
, 101. and 102 data input terminals. When writing parallel data to these shift registers, select the chips from shift registers 100 to 102 using the shift load switching signal 8/'LK, and then apply the 1 read write signal R/V to the I/F terminal. By applying the voltage to E, each shift register is made ready for data writing.

The command type designation line CF, which is manually input to the serial input terminal of the shift register 100, is used to set in advance on hardware whether the data content is a command or an image signal.

Shift register 100 is a data register, and data to be transmitted is set therein.

Shift register 101 is a size register and indicates the size of data set in shift register 100. That is, if the data ends with 8 bits, ti r
lJ indicates how many times the command length is to be repeated in units of 8 bits, such as "2" if the length is 8 bits or more and 16 bits or less.

The shift register 102 is an index register, and a signal indicating the contents of data set in the data register, a signal for discriminating between a command and an I1II signal, and a command signal such as a recording start command are set.

The three shift registers 00, 101, and 102 are connected in series and are shifted by a common transfer lock CLK, and a total of 24 bits of data set in the three shift registers are serially transferred to the gate circuit 80. applied to the channel.

FIG. 4 shows the format of commands serially output from the gate circuit 8, where (A) is the command and (B) is the transfer lock CLK.

A 1-pit start bit BTB is provided at the beginning, followed by 8-bit index, size, and data, and a 2-bit stop bit sp% is thrown after each bit.

Transmission 4: The command transmitted from 1llA to the receiver is (
1) Original size (A3.B4.4.B5 each size), (2) Number of recorded sheets (1 to 255 sheets), (3) Halftone recording (binary image/medium tone)% (4) Track magnification (16 levels from 0.5x to 2.0x), t5) Recording start, (6)
Assume that the image signal is manually input, and (7) the command signal is 7 where an error occurs. The first reward is its contents and shift register 100-1
The relationship of the bit set to 02 is accepted.

In this case, all data set in data register 100 can be expressed in 8 bits.Is register 1
The value set to 01 is [lJ.

Further, the commands are only for the 3-command company index, which instructs (5) to start recording, (6) to input a uni image signal, and (7) to generate an error, and there is no need to set bits in the size and data registers.

The upper bit Mill set in the index register 102 is used to distinguish between a command and an image signal. That is, "1" is set for a command, and "1" is set for a -image signal. Table 103 is a command/counter that counts the transfer lock CLK applied to three shift registers. The counting start point is controlled by the data enable signal 5.

Reference numeral 105 indicates a ratio, which is a reference value set according to the length of the command to be transmitted via the pass line D, and a counter 1.
A comparison is made with the count value of 03, and opening/closing of the WANDA-log is determined depending on the comparison result.

AND gate 104 is shift register io.

This is to control the rounding wheel of the shift operation of .about.102.

When the command transfer is completed and the command type CF specifies image signal communication, WANDl'-)106
With the output of , the gate circuit 8, which had previously selected channel A, selects channel cram school and continues to form a path for transmitting image signals. At that time, it is noticed that a code indicating that there is a #A writing damage signal is written in the index register 102.

The original image is photoelectrically transformed onto the image sensor 11 via an optical system (not shown). Then, it is increased to a predetermined level by the amplifier 10 as a flaw signal, and is further increased to a predetermined level by the binarization circuit 107.
After being binarized in , it is applied to channel 8 of gate circuit 8 .

The transfer lock of C0D11 is the same as the transfer lock CLK used for the O command transfer described above, and a counter 108 counts the number of pits. Entrance 9, 109 is a comparator.

Completion of clock counting corresponding to reading 1247 images of the image sensor 11 is determined by the comparator 109 by comparison with a reference value set in advance in the switch 110 according to the document size. The output becomes an interrupt signal JtlQ of the microcomputer 5 and notifies the microcomputer 5 of completion of one line counting. According to this interrupt signal IRQK, the count on line a of the picture reading item is calculated by the microcomputer 5.
It can be calculated using software.

4. Even if it is a type in which a counter is provided outside the microcomputer 5 and counts by hardware, it is acceptable.

Note that the clock signal CLK is connected to the modem 9 via the signal line 113.
It is also man-powered.

Figure Is5 is a block diagram showing a specific circuit configuration of the receive buffer 13°v (crocodile/viator 14. gate circuit 16) shown in JI2.

20G! 01 and 202 are a data register, a size register, and an index register each consisting of an 8-bit serial-in-parallel-out shift register. Three shift registers 200, 201, and 2 (l are serially connected, and a shift load signal is always at a high level. Also, 203 is a latch.

In the initial state m, the microcomputer 14 operates the shift register 200,
Clear all 201, 202 and latches 2031.91.

The commands input to the signal line 212 via the modem 12 in a synchronized manner as shown in Figure aI3 are sent to the shift register 2 in synchronization with the transfer lock 213 sent from the transmitter.
00, 201 and 202 are manually operated in sequence. Initially, the micro combinator 14 is in the state of accepting commands.
,t/.

Bo) Ilo 1 is at a high level. Therefore, the MND gate 215 is open and the clock passes through it, so that when a command is input manually from the signal line 212, it is sequentially shifted to the right in synchronization with this clock.

All 24-bit commands are input manually to shift registers 200, 201, and 202, and then the start bit S
When TB is latched into latch 203, the output of latch 203 goes high. This high level output is inverted to a low level by an inverter 217 and inputted to an OR gate 214.

At this point, bits indicating data, size, and index are latched in shift registers 200, 201, and 202, respectively.

Further, when the command in the index register 202 is valid, by decoding it with a decoder (not shown), the input I^%-216 of the OR gate becomes a low level.

Then, the output of 08) 214 becomes low level, and the microcomputer 14 is interrupted to signal that the command has been received (46), and jumps to the interrupt processing routine.

The low level output of the M9, 0 wing gate 214 hardly closes the AND gate 215. This stops the shift operation of each shift register.

The microcomputer 14 observes the bit data latched in each register via the data bus DB according to the interrupt processing routine.

The index register 202 contains commands that are divided into commands, and the commands are roughly classified. In the size register 201, a small bit is set to indicate the data size. Further, various data are stored in the data register 200, and as mentioned above, depending on the type of command, there are cases where the data and size are not taken into account. Furthermore, if the data cannot be sent in one go, that is, if the data is 9 bits or more, the size bits may be set to a necessary value and the data may be transmitted several times. Therefore, microcomputer-4 has "2" in the size register 201.
If the above numerical value is set, it is determined that more commands of the same type will be sent again, and reception of the command contents continues smoothly.

Microcomputer-4 has index register 20
Once the type of command is determined by reading the bits in step 2, the commands indicated by the bits latched in the data index 200 are delivered to a predetermined wing area according to the determination.

Next, the contents of the index 202 indicate that ``the following data is number i'' (if it is a 61-screen #I signal input command and 9, the microphone and computer 4 are I10 baud) 1101 output to a low level and AN
D gate 205 is opened.

The manually generated image signal is once input to the buffer memory 206 via the mund gate 205, and then sent to the bale printer 207.
sent to. The printer 207 constitutes a so-called laser beam printer consisting of a laser F208, a scanner 209, a photoconductive drum 210, and the like.

Incidentally, Ilo 2 is a control line for controlling the printer 207 manually according to a number of commands in sequence. , 211 are recording sheets on which images are recorded.

As mentioned above, according to the present invention, one transmission 111
This enables multiple types of data transmission.

In addition, if there is data that has changed among multiple data, there is no need to retransmit all data including data that has not changed, and only the data that needs to be changed can be transmitted. In addition, since the length of data sent at one time is short, the transmission of commands becomes SVI@, making use of the short idle time on the transmission line, and can be used, for example, at the switching point of a uniform line in image transmission. It is also possible to insert and transmit command information.Furthermore, if the present invention is applied to information transmission in a delivery barrier, it is convenient because there is no need to construct two transmission lines between them. As described above, according to the present invention, efficient data transmission is possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of a facsimile transmitter to which the present invention is applied, and FIG. The figure is a block diagram showing a specific example of figure 341,
FIG. 4 is a diagram showing the type of command, and FIG. ag5 is a block diagram showing a specific example of FIG. 201 and 202 are shift registers and 203ti latches.

Claims (1)

[Claims] A data transmission method that waits to transmit data for multiple units on the same transmission path by sending and receiving signals in which a code indicating the 8 answers of the data is added to the data to be transmitted.