JPS58196785A - Recording and reproducing system of television signal - Google Patents

Recording and reproducing system of television signal

Info

Publication number
JPS58196785A
JPS58196785A JP57080404A JP8040482A JPS58196785A JP S58196785 A JPS58196785 A JP S58196785A JP 57080404 A JP57080404 A JP 57080404A JP 8040482 A JP8040482 A JP 8040482A JP S58196785 A JPS58196785 A JP S58196785A
Authority
JP
Japan
Prior art keywords
signal
recording
television
signals
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57080404A
Other languages
Japanese (ja)
Other versions
JPH033986B2 (en
Inventor
Ryoichi Imanaka
良一 今中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57080404A priority Critical patent/JPS58196785A/en
Publication of JPS58196785A publication Critical patent/JPS58196785A/en
Publication of JPH033986B2 publication Critical patent/JPH033986B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10Indexing; Addressing; Timing or synchronising; Measuring tape travel
    • G11B27/19Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
    • G11B27/28Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
    • G11B27/30Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording
    • G11B27/3027Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording used signal is digitally coded
    • G11B27/3036Time code signal
    • G11B27/3054Vertical Interval Time code [VITC]

Abstract

PURPOSE:To realize high-speed frame retrieval, etc., of a video signal, by recording an address signal in the interval of horizontal synchronizing signal. CONSTITUTION:A pulse generator 8 separates a synchronizing signal from an input signal and supplies the synchronizing signal to a timing signal generation circuit 9. The circuit 9 controls an RAM11 and outputs an address and a digital signals having a fixed pattern to the synchronizing signal part of the video signal. These signals are encoded in a coding circuit 12, inputted to a signal adder 5 via a switch S1 to be added to a frequency-converted chromaticity signal, and recorded in a proper memory medium. The address signal recorded in the section of the horizontal synchronizing signal is used to perform the frame retrieval, etc., of a video signal.

Description

【発明の詳細な説明】 本発明はテレビジョン信号の記録、再生方式に関するも
ので、特にテレビジョン信号とともに、頭出し等に用い
るアドレス信号等のデータ信号を記録、再生する方式に
係る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for recording and reproducing television signals, and particularly to a method for recording and reproducing data signals such as address signals used for cueing, etc. together with television signals.

従来よりビデオディスク等においては、情報トラックの
頭出しのためにアドレス信号がビデオ信号の垂直同期信
号のブランキング部分4に重畳されてdα録さfVでお
り、これによって所望の情報トラックの検索が行なわれ
ていIる。この従来の方法では、アドレス信号を読み出
せるタイミングが1/60秒に1回であり、検索時間を
短かくするために、情報信号を再生するピックアップで
、高速で情報トラック群を走査すると、アドレス信号が
十分な頻度で読み出せないため、検索するのに時間がか
かつていた。またアドレス信号のデータ量も少なかった
Conventionally, in video discs and the like, in order to locate the beginning of the information track, an address signal is superimposed on the blanking portion 4 of the vertical synchronization signal of the video signal and recorded as fV, thereby making it possible to search for the desired information track. It is being done. In this conventional method, the timing at which an address signal can be read is once every 1/60 second, and in order to shorten the search time, a pickup that reproduces the information signal scans a group of information tracks at high speed. It took a long time to search because the signals could not be read out frequently enough. Also, the amount of data in the address signal was small.

本発明はこの点に鑑み、提案されたもので、テレビジョ
ン信号の同期信号部分を一定のパターンをもったディジ
タル信号(5YNCワードと呼ぶ)と、ト」す記ビデオ
情号の番地を示すアドレス信号等のデータ信号で構成し
、過当な方法で符号化して記録することにより、アドレ
ス信号の記録される個所を大鼠に設け、検索を高速に行
なうとともに、活用できるデータ量を増加させるもので
ある。
The present invention has been proposed in view of this point, and consists of converting the synchronization signal portion of a television signal into a digital signal (referred to as a 5YNC word) with a certain pattern, and an address indicating the address of the video information. It consists of data signals such as signals, and by encoding and recording them using an appropriate method, the location where the address signal is recorded is set up in a large mouse, which speeds up searches and increases the amount of data that can be used. be.

以下、本発明の一実施例をあげ説明する。Hereinafter, one embodiment of the present invention will be described.

第1図において、端子Aに記録すべきビデオ信号中のク
ロマ信号が取り出され、平衡変調器2で発振器3の出力
と平衡変調され、低域フィルター14の出力に周波数変
換されたクロマ信号を得る。
In FIG. 1, a chroma signal in a video signal to be recorded at terminal A is taken out, balanced modulated with the output of an oscillator 3 by a balanced modulator 2, and a frequency-converted chroma signal is obtained as the output of a low-pass filter 14. .

6は1成域フィルターでビデオ信号中の輝度信号が分離
され、周波数変調は7でFM信号に変調される。
A luminance signal in the video signal is separated by a single pass filter 6, and frequency modulation is performed by a filter 7 into an FM signal.

8はパルス発生器で、入力ビデオ信号より同期信号を分
離し、9のタイミング信号発生回路にその同期信号を供
給する。10はリードオンリーメモリで、9のタイばン
グ信号発生器にデータを供給し、11のランダムアクセ
スメモリー回路を制御し、このランダムアクセスメモリ
ー回路11の出力としてビデオ信号の同期信号部分にN
YNCワードおよびアドレス信号が発生する。
A pulse generator 8 separates a synchronizing signal from the input video signal and supplies the synchronizing signal to a timing signal generating circuit 9. 10 is a read-only memory, which supplies data to the tying signal generator 9 and controls the random access memory circuit 11, and outputs N to the synchronizing signal portion of the video signal as the output of the random access memory circuit 11.
YNC word and address signals are generated.

12は符”4化回路で、ランダムアクセスメモリー回路
11の出力を記録媒体に適合した符号化方式により、ラ
ンダムアクセスメモリー1西路11の出力を符号化し、
スイッチS1に供給する。ここで杓号化回路12の符号
化出力のクロック信号は、3の発1辰器と同期関係を保
つこともできる。哀イッチS1はタイミング信号発生器
9により制御さ7[る電子スイッチで第2図に示すよう
に周波数変調器7の出力と符号化回路12の出力が順番
に信号加昇器5に入力されるように動作する。すなわ 
  1ち、第2図において、イは低域フィルター4の出
力である輝度信号で、周波数変調器7により周波数変調
され、口に示す信号に変換される。一方、符号化回路1
2の符号化出力はハで示され、スイッチS1で二で示す
ように周波数変調信号口と合成されて信号加算器5に入
力される。そして加算器6により周波数変換されたクロ
マ信号と加算されて適当な記録媒体に記録される。
12 is a code 4 encoding circuit which encodes the output of the random access memory circuit 11 using an encoding method suitable for the recording medium;
Supplied to switch S1. Here, the clock signal of the encoded output of the encoder circuit 12 can also maintain a synchronous relationship with the generator 3. The switch S1 is an electronic switch controlled by a timing signal generator 9, and as shown in FIG. It works like this. Sunawa
First, in FIG. 2, A is a luminance signal that is the output of the low-pass filter 4, which is frequency modulated by the frequency modulator 7 and converted into a signal shown at the mouth. On the other hand, encoding circuit 1
The encoded output of 2 is shown by C, and is combined with the frequency modulation signal port by switch S1 as shown by 2, and is input to the signal adder 5. Then, it is added to the frequency-converted chroma signal by an adder 6 and recorded on a suitable recording medium.

次に同期信号部分に記録するデジタル信号のフォーマッ
トについて説明する。
Next, the format of the digital signal recorded in the synchronization signal portion will be explained.

水平同期信号期間it、約471581で、今、S Y
NCワードとして12ビツト、アドレス信号として20
ビツトそう入するとすれば(第2図ホ)、4μsec/
(12+20 )=0.12611 stx/ bi 
tとなり、十分記録再生か可能な値である。
The horizontal synchronization signal period it is about 471581 and now S Y
12 bits as NC word, 20 bits as address signal
If bits are inserted (Fig. 2 E), 4μsec/
(12+20)=0.12611 stx/bi
t, which is a value that allows sufficient recording and reproduction.

また20ビツトのアドレス信号+=こより、79999
個の情報トラックに1つづつ番地をわりふることが1丁
能である。
Also, from the 20-bit address signal +=, 79999
It is possible to assign an address to each information track one by one.

なお、光学方式ディスクにビットの形で記録する場合は
、信号加算器5の後に、すεツタ回路を設けて、低域フ
ィルター4の出力であるクロマ信号をデユティサイクル
変調として記録することができる。
Note that when recording in the form of bits on an optical disc, it is possible to provide an ε-tutter circuit after the signal adder 5 and record the chroma signal that is the output of the low-pass filter 4 as duty cycle modulation. can.

次に再生方法について述べる。Next, the reproduction method will be described.

第3図はNr5J:回路の一実施例を示すブC17り図
でめる。
FIG. 3 is a block diagram showing one embodiment of the Nr5J: circuit.

第2図で説明した記録用信号二とほぼ同じ信号が記録°
媒体から再生され、端子Aに入力される。
Almost the same signal as recording signal 2 explained in Fig. 2 is recorded.
The signal is played back from the medium and input to terminal A.

30の帯域フィルタは低域変換したクロマ信号を通過さ
せ、31の平衡変調器に入力する。この平衡変調器31
の出力中のクロマバースト信号はバースト抜取り回路3
2で抜き出され、33の位相比較器に人力され、基準信
号発生434 (3,58MHz)の出力と位相比較さ
ね、この位相比較器33の出力は低域フィルター35を
経て36の■CO(電圧制御発振器)を制御し、その出
力が平衡変調器31に人力され、いわゆるAPCループ
を構成する。
The bandpass filter 30 passes the low-pass converted chroma signal and inputs it to the balanced modulator 31. This balanced modulator 31
The chroma burst signal being outputted is sent to the burst extraction circuit 3.
2, the phase comparator 33 inputs the phase comparison with the output of the reference signal generator 434 (3,58MHz), and the output of this phase comparator 33 passes through the low-pass filter 35 to the CO (voltage controlled oscillator), and its output is input to the balanced modulator 31, forming a so-called APC loop.

29if4域フイルターで低域変換されたクロマ化り成
分を除き、周波数変調された14度信号成分がFMi調
回路37が供給され、FM復調回路37の出力には、同
期信号を含まない輝度イを号が得られる。
The frequency-modulated 14-degree signal component, excluding the chromatic component that has been low-frequency converted by the 29if 4-band filter, is supplied to the FMi modulation circuit 37, and the output of the FM demodulation circuit 37 is a luminance signal that does not include a synchronization signal. number is obtained.

40はコンパレータで、符号化されたデジタル信号部分
がスライスされ、41のクロック信号発生器に前記VC
O36の出力とともに入力される。
40 is a comparator, which slices the encoded digital signal portion and sends the coded digital signal portion to the clock signal generator 41.
It is input together with the output of O36.

クロック信号発生器41は、前記vC036の出力と、
コンパレータ40の出力より抜き出した符号化されたデ
ジタル信号部分のクロック信号より、安定なりロック信
号を発生させる。
The clock signal generator 41 receives the output of the vC036,
A stable lock signal is generated from the clock signal of the encoded digital signal portion extracted from the output of the comparator 40.

42はデコーダーでコンパレータ4oの出力とクロック
信号発生器41のクロック信号により、復号化するだめ
のもので出力には、NRZ信号が得られ43のシフトレ
ジスタに送られる。このシフトレジスタ43により、デ
コーダー42の7リアル出力化号をパラレル信号に変換
し、データ比較器44であらかじめ定められた5YNC
ワ一ド発生器46の5YNCワード出力と比較され、一
致した時にパルス信号′f:発生する。
A decoder 42 is used for decoding using the output of the comparator 4o and the clock signal of the clock signal generator 41. The NRZ signal is obtained as an output and sent to the shift register 43. This shift register 43 converts the 7 real output signals of the decoder 42 into parallel signals, and the data comparator 44 converts the 7 real output signals into parallel signals.
It is compared with the 5YNC word output of the word generator 46, and when they match, a pulse signal 'f' is generated.

したかってデータ比較器44の出力がビデオ信号の同期
(g号を示すパルスとなる。なお、シフトレジスタ43
は、5YNCワードの後に再生される −て別の制御回
路(図示せず)に伝達する。
Therefore, the output of the data comparator 44 becomes a pulse indicating the synchronization (g) of the video signal.
is played after 5 YNC words and communicated to another control circuit (not shown).

なお、46はコントロール回路であり、シフトレジスタ
43と5YNCワ一ド発生器46のタイεンクヲコント
ロールスル。
In addition, 46 is a control circuit, which controls the tie of the shift register 43 and the 5YNC word generator 46.

なお、46はコントロール回路であり、シフトレジスタ
43と5YNCワ一ド発生器45のタイミング比較器4
4の出力である何期信号パルスは5YNC発生器47に
入力され、ビデオ信号の同期信号を発生させ、同期信号
加算回路38に入力さ才1、この加算回路38の出力は
、同期信号を有し/(輝度信号となり、クロマ信号加算
回路39で乎陶変調器31の出力を帯域フィルター28
で整形されたクロマ信号と加算され、端子Bにテレビジ
ョン(。@出力として供給する1、 以上のように構成することにより、水平同期信弓区間に
アドレス信号及記録できるようになり、このアドレス信
号を用いてビデオ信号のフレーム検索等が非常に高速で
行なうことができる。
In addition, 46 is a control circuit, and the timing comparator 4 of the shift register 43 and the 5YNC word generator 45
The periodic signal pulse which is the output of 4 is input to the 5YNC generator 47, which generates a synchronization signal for the video signal, and input to the synchronization signal addition circuit 38.The output of this addition circuit 38 has a synchronization signal. (This becomes a luminance signal, and the chroma signal addition circuit 39 passes the output of the light modulator 31 to the bandpass filter 28.
By configuring as above, it is possible to record an address signal in the horizontal synchronization signal section. Using the signal, frame searches of video signals can be performed at extremely high speed.

また1フレームにはNTSCテレビジョンMMの場合、
525の水平同期信号が存在するので、1フレームには
、 525X20ビット−10600ビツトのデータを記録
できることになる。したがって、アドレス信号だけでな
く、別の例えは文字情報信号をそう人できることも勿論
、可能であり、この場合は、アドレス信号と他の情報信
号を区別するため、識別信号を設けたり、そう人する位
置により区別することができるものである。
In addition, in the case of NTSC television MM, one frame includes
Since there are 525 horizontal synchronization signals, data of 525 x 20 bits - 10,600 bits can be recorded in one frame. Therefore, it is of course possible to use not only address signals but also character information signals. In this case, in order to distinguish address signals from other information signals, an identification signal may be provided, They can be distinguished by their location.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のテレビジョン信号の記録再生方式の1
実施例の記録系を示すブロック図、第2図は同動作波形
図、第3図は再生系を示すブロック図である。 1・・・・・・帯域フィルター、2・・・・・・平衡変
調器。 3・・・・・・発振器、4,6・・・・・・低域フィル
ター、5・・・・・・加算器、7・・・・・・周波数変
調器、8・・・・・・パルス発生器、9・・・・・・タ
イミング信号発生111路、” ”””リードオンリー
メ″そり、11・・・・・−ランダムアクセスメモリー
回路。 第1図 、3 第2図 第3図
FIG. 1 shows one of the recording and reproducing systems for television signals according to the present invention.
FIG. 2 is a block diagram showing the recording system of the embodiment, FIG. 2 is a waveform diagram of the same operation, and FIG. 3 is a block diagram showing the reproduction system. 1...bandpass filter, 2...balanced modulator. 3...Oscillator, 4,6...Low pass filter, 5...Adder, 7...Frequency modulator, 8... Pulse generator, 9... Timing signal generation 111 path, 11... - Random access memory circuit. Fig. 1, 3 Fig. 2 Fig. 3

Claims (4)

【特許請求の範囲】[Claims] (1)テレビジョン信号の少なくとも同期信号部分を、
一定のパターンのデジタル信号に変換するとともに、前
記テレビジョン信号に関連したデータ信号をデジタル信
号の形で前記一定のパターンのデジタル信号とともに配
置し、前記デジタル信号部分は符号化し、前記同期信号
部分のテレビジョン信号は周波数変調し、共に記録媒体
に記録し、再生することを特徴とするテレビジョン信号
の記録再生方式。
(1) At least the synchronization signal part of the television signal,
a data signal associated with the television signal is arranged in the form of a digital signal together with the pattern of digital signals, the digital signal part is encoded and the synchronization signal part is converted into a digital signal of a certain pattern; A recording and reproducing method for television signals, which is characterized in that the television signals are frequency modulated, recorded on a recording medium, and then reproduced.
(2)テレビジョン信号に関連したデータ信号は、テレ
ビジョ、ン信号のフレーム番号を示すアドレス信号とし
たことを特徴とする特許請求の範囲第1項に記載のテレ
ビジョン信号の記録再生方式。
(2) The recording and reproducing method for a television signal according to claim 1, wherein the data signal related to the television signal is an address signal indicating a frame number of the television signal.
(3)テレビジョン信号に含まれるクロマ信号のサブキ
ャリアが符号化したデジタル信号のクロック信号と同期
関係をもつように設定したことを特徴とする特許請求の
範囲第1項記載のテレビジョン信号の記録再生方式。
(3) The television signal according to claim 1, characterized in that the subcarriers of the chroma signal included in the television signal are set to have a synchronous relationship with the clock signal of the encoded digital signal. Recording and playback method.
(4)テレビジョン信号に含まれるクロマ信号を、前d
ピ符号化したデジタル信号のクロック信号と同期関係を
もつ信号により周波数変換し、記録媒体に記録したこと
を特徴とする特許請求の顧囲第1項に記載のテレビジョ
ン信号の記録再生方式。
(4) The chroma signal included in the television signal is
1. A recording and reproducing method for a television signal according to claim 1, wherein the frequency of the digital signal is converted using a signal having a synchronization relationship with a clock signal of a pi-encoded digital signal, and the resulting signal is recorded on a recording medium.
JP57080404A 1982-05-12 1982-05-12 Recording and reproducing system of television signal Granted JPS58196785A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57080404A JPS58196785A (en) 1982-05-12 1982-05-12 Recording and reproducing system of television signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57080404A JPS58196785A (en) 1982-05-12 1982-05-12 Recording and reproducing system of television signal

Publications (2)

Publication Number Publication Date
JPS58196785A true JPS58196785A (en) 1983-11-16
JPH033986B2 JPH033986B2 (en) 1991-01-21

Family

ID=13717346

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57080404A Granted JPS58196785A (en) 1982-05-12 1982-05-12 Recording and reproducing system of television signal

Country Status (1)

Country Link
JP (1) JPS58196785A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62229558A (en) * 1986-03-29 1987-10-08 Aiwa Co Ltd Index signal recorder
JPS62229559A (en) * 1986-03-29 1987-10-08 Aiwa Co Ltd Index signal recorder
US10046892B2 (en) 2013-12-26 2018-08-14 Shanghai Hongyan Returnable Transit Packagings Co., Ltd. Tamper-evident device and valve using same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62229558A (en) * 1986-03-29 1987-10-08 Aiwa Co Ltd Index signal recorder
JPS62229559A (en) * 1986-03-29 1987-10-08 Aiwa Co Ltd Index signal recorder
US10046892B2 (en) 2013-12-26 2018-08-14 Shanghai Hongyan Returnable Transit Packagings Co., Ltd. Tamper-evident device and valve using same

Also Published As

Publication number Publication date
JPH033986B2 (en) 1991-01-21

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