JPS58196060A - Thin film semiconductor device - Google Patents

Thin film semiconductor device

Info

Publication number
JPS58196060A
JPS58196060A JP57078851A JP7885182A JPS58196060A JP S58196060 A JPS58196060 A JP S58196060A JP 57078851 A JP57078851 A JP 57078851A JP 7885182 A JP7885182 A JP 7885182A JP S58196060 A JPS58196060 A JP S58196060A
Authority
JP
Japan
Prior art keywords
thin film
electrode
film semiconductor
semiconductor layer
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57078851A
Other languages
Japanese (ja)
Other versions
JPS6357952B2 (en
Inventor
Yutaka Yamauchi
豊 山内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP57078851A priority Critical patent/JPS58196060A/en
Priority to US06/492,675 priority patent/US4570332A/en
Priority to DE19833317108 priority patent/DE3317108A1/en
Publication of JPS58196060A publication Critical patent/JPS58196060A/en
Publication of JPS6357952B2 publication Critical patent/JPS6357952B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/016Thin-film circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03921Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042PV modules or arrays of single PV cells
    • H01L31/0445PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H01L31/046PV modules composed of a plurality of thin film solar cells deposited on the same substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

PURPOSE:To easily manufacture electrodes on the same surface of a semiconductor layer by a method wherein the thin film semiconductor layer is changed into low resistance and then electrode take-out terminals are provided. CONSTITUTION:An a-Si 12 which functions as a solar battery is laminated on a conductive substrate 11 wherein a conductive layer is adhered on a stainless substrate or insulator. The a-Si 12 is equipped with junctions such as P-N, P-I-N, M-I-S, and Schottky, and these junctions generate photovoltage. Clear electrode films 13 and 15 which take out output are formed on the surface of the a-Si 12. Where, the clear electrode film 13 is formed as the electrode for the light receiving surface of the a-Si 12. On the other hand, the electrode film 15 is formed at a distance from the electrode 13. The terminals 14 and 16 are formed respectively on these electrodes 13 and 15. The terminal 16 is formed by a method wherein the thin film semiconductor layer sandwiched by the thin film 15 and the substrate 11 is changed into low resistance. Thereby, electrodes can be easily formed on the same surface of a semiconductor layer.

Description

【発明の詳細な説明】 本発明は薄膜太陽電池や薄膜半導体デバイスに関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to thin film solar cells and thin film semiconductor devices.

従来の単結晶を用いた半導体デバイスに対して、近年は
アモルファスシリコン(以下a−8iと略記)をはじめ
とする非晶質、微結晶質(マイクロクリスタル)または
多結晶質を用いた薄膜半導体デぶイスの開発が活発に行
われている。このような非晶質、微結晶質及び多結晶の
半導体デバイスは、膜質の抵抗率が大きいため膜の水平
方向への電流の広がりが小さいこと、及び電磁的または
熱的な手段を利用して結晶化すれば抵抗率が小さくなる
等の特性をもつことが知られている。本発明はこれらの
特性を活用して、新規な電気的端子を備えた非晶質、微
結晶質又は多結晶の半導体デバイスを提供するものであ
る。
In contrast to conventional semiconductor devices using single crystals, in recent years thin film semiconductor devices using amorphous, microcrystalline, or polycrystalline materials such as amorphous silicon (hereinafter abbreviated as A-8I) have been developed. The development of bus chairs is being actively carried out. Such amorphous, microcrystalline, and polycrystalline semiconductor devices are characterized by the fact that the resistivity of the film is high, so that the spread of current in the horizontal direction of the film is small, and that it is possible to use electromagnetic or thermal means. It is known that crystallization has characteristics such as a decrease in resistivity. The present invention takes advantage of these properties to provide amorphous, microcrystalline, or polycrystalline semiconductor devices with novel electrical terminals.

まず以下に従来から用いられている薄膜半導体デバイス
としてa−8i太陽電池を例として説明する。
First, an explanation will be given below using an A-8I solar cell as an example of a conventionally used thin film semiconductor device.

第1図に従来のステンレス(導体)基板1上に形成され
たp−1−n接合アモルファス太陽電池2の構造断面図
を示す。第1図(a)は、透明導電膜3で被われた受光
面側の電極4に対して他方の電気的端子5を下部即ち導
体基板1側に設けた場合であり、第1図(b)は物理的
または化学的な手段で基板1上の一部の半導体薄膜(こ
の場合アモルファスシリコン接合層)を除去して他方の
電極6を基板1に対して同じ上面(受光面)側に設けた
ものである。第1図(a)の構造では電極がa−8i層
2の夫々の面に形成されることになり、半導体デ”Mを
設置する場所や配線に著しく制限を受けるという欠点が
あった。また第1図(b)の構造ではa−8tをエツチ
ング除去するか、或いは予めa−8iの積層領域を制限
しなければならず、製造工程が頻雑になったシ、受光面
積が著しく減縮されるという欠点があった。
FIG. 1 shows a structural sectional view of a p-1-n junction amorphous solar cell 2 formed on a conventional stainless steel (conductor) substrate 1. FIG. 1(a) shows a case where the other electrical terminal 5 is provided on the lower part of the electrode 4 on the light-receiving surface side covered with the transparent conductive film 3, that is, on the conductor substrate 1 side. ) is a process in which a part of the semiconductor thin film (in this case, the amorphous silicon bonding layer) on the substrate 1 is removed by physical or chemical means, and the other electrode 6 is provided on the same upper surface (light-receiving surface) side with respect to the substrate 1. It is something that In the structure shown in FIG. 1(a), electrodes are formed on each surface of the a-8i layer 2, which has the disadvantage that the location and wiring for installing the semiconductor device are severely restricted. In the structure shown in FIG. 1(b), it is necessary to remove a-8t by etching or limit the stacked area of a-8i in advance, which makes the manufacturing process more frequent and the light-receiving area is significantly reduced. There was a drawback that

本発明は上記従来装置の欠点を除去し、他の機器への接
続が容易であると共に、製造が容易な電極構造を備えた
薄膜半導体装置に関する。
The present invention relates to a thin film semiconductor device having an electrode structure that eliminates the drawbacks of the conventional devices, is easy to connect to other equipment, and is easy to manufacture.

第2図は本発明による一実施例を示す側面図で、ステン
レス基板又は絶縁体上に導電層を被着した導電性基体1
1上に太陽電池として機能し得るa−8i12が積層さ
れている。該a−8i12は、p−n層 p−1−n層
 M−I−8,ショットキー等の接合を備え、これらの
接合が単数又は複数に積層されて、入射光を受けること
により光起電力を発生する。上記a−8i12の表面に
は出力を取り出すための2つの電極、透明電極膜13及
び15が形成されている。ここで透明電極膜13はa−
8i12の受光面の電極として設けられ、従って受光面
のほぼ大部分を被って形成されている。
FIG. 2 is a side view showing an embodiment of the present invention, in which a conductive substrate 1 is formed by depositing a conductive layer on a stainless steel substrate or an insulator.
A-8i12, which can function as a solar cell, is laminated on top of A-8I12. The a-8i12 is equipped with junctions such as p-n layer, p-1-n layer, M-I-8, Schottky, etc., and these junctions are laminated in single or plural layers and photoactivated by receiving incident light. Generate electricity. Two electrodes, transparent electrode films 13 and 15, for extracting output are formed on the surface of the a-8i12. Here, the transparent electrode film 13 is a-
It is provided as an electrode on the light-receiving surface of 8i12, and is therefore formed to cover almost a large part of the light-receiving surface.

一方透明電極膜15はa−8i12の相対する裏側から
出力を取り出すための電極で、上記透明電極膜13とは
離れて形成されている。透明電極膜13及び15の夫々
には銀ペースト等による端子14.16が形成されてい
る。
On the other hand, the transparent electrode film 15 is an electrode for extracting output from the opposite back side of the a-8i12, and is formed apart from the transparent electrode film 13. Terminals 14 and 16 made of silver paste or the like are formed on each of the transparent electrode films 13 and 15.

上記電極端子16の側については、透明導電膜15と基
板11とで挾まれた薄膜半導体層を電気的、電磁的又は
熱的な手段、で低抵抗化して裏側の出力を導出する。
On the side of the electrode terminal 16, the resistance of the thin film semiconductor layer sandwiched between the transparent conductive film 15 and the substrate 11 is reduced by electrical, electromagnetic or thermal means, and the output from the back side is derived.

次に上記第2図に示した薄膜半導体装置の製造工程を挙
げて実施例をより詳細に説明する。第3図(a)〜(e
)は各工程における断面図で、ステンレス。
Next, an example will be described in more detail by citing the manufacturing process of the thin film semiconductor device shown in FIG. 2 above. Figure 3 (a) to (e)
) is a cross-sectional view of each process, stainless steel.

鉄、銅、銀、アルミニウム、アルミ合金、ニッケル、鉄
−ニッケル又はこれらの合金等の金属からなる導電性基
体111I′i洗浄された後、第3図(a)に示すよう
に一方の表面にプラズマCVD法によりアモルファス半
導体層12が形成される0該アモルファス半導体層12
は光電特性をもたせるため、p−1−nをシングルセル
又はタンデムセルに積層シサれている。a−8iの場合
、p層はSiH4ガスにBzHsガスを少量添加したも
のを原料ガスとして、i層はSiH4ガスや5iHa+
SiF4ガスを原料ガスとして、またn層はSiH,ガ
スやSiH。
After being cleaned, a conductive substrate 111I′i made of a metal such as iron, copper, silver, aluminum, aluminum alloy, nickel, iron-nickel or an alloy thereof is coated on one surface as shown in FIG. 3(a). The amorphous semiconductor layer 12 is formed by a plasma CVD method.
In order to provide photoelectric properties, p-1-n are laminated into a single cell or a tandem cell. In the case of a-8i, the raw material gas for the p layer is SiH4 gas with a small amount of BzHs added, and the raw material gas for the i layer is SiH4 gas or 5iHa+.
SiF4 gas is used as the raw material gas, and the n-layer is SiH gas or SiH.

+SiF、SiH4ガス sガスを少量添加したものを
原料ガスとして、それぞれプラズマCVD法により成長
させたものである0各層の膜厚は光起電効果を最大とな
らしめるよう設計されるが、その−例を示すと、p−1
−nのシングルセルからなる場たp−1−nのタンデム
セルからなる場合p、〜上記アモルファス半導体層12
の表面全面に透明導電膜Aを形成する0透明導電膜Aは
ITO(I n203− Snow )や5n02: 
Sbを電子ビーム蒸着法やスパッター法によシロ00〜
100OA厚形成したものである。次に透明導電膜Aを
透明電極13と透明電極15に分割するため化学的な手
法により第3図(e)に示すようにパターニングする0
更に透虱電極13及び15の一部に銀ペーストをスクリ
ーン印刷し夫々の電極端子14.16とする。
+SiF, SiH4 gas, SiH4 gas Added a small amount of s gas as the raw material gas, each grown by plasma CVD method.0 The film thickness of each layer is designed to maximize the photovoltaic effect, but - For example, p-1
-n single cells, p-1-n tandem cells p, ~ the amorphous semiconductor layer 12
The transparent conductive film A that forms the transparent conductive film A on the entire surface of is made of ITO (In203-Snow) or 5n02:
Sb is deposited by electron beam evaporation method or sputtering method.
It is formed to a thickness of 100 OA. Next, in order to divide the transparent conductive film A into transparent electrodes 13 and 15, patterning is performed using a chemical method as shown in FIG. 3(e).
Further, silver paste is screen printed on a portion of transparent electrodes 13 and 15 to form electrode terminals 14 and 16, respectively.

半導体層表面は電極端子14.16の上面を除いて第3
図(d)のように透明樹脂17でオーバーコートし、最
後に導電性基体11と一方の電極16との間に電磁的エ
ネルギーを加えてp−1−nのアモルファス半導体接合
層を破壊して低抵抗領域18を形成する。低抵抗領域1
8の抵抗値R8は数十Ω以下であシ、アモルファス太陽
電池を低照度(100ルツクス〜5000ルツクス)で
使用する場合、この直列抵抗Rsの大きさは、アモルフ
ァス太陽電池の特性を減少させない。第4図は上記工程
を経て作製された民生用アモルファス太陽電池の斜視図
である。
The surface of the semiconductor layer is the third layer except for the top surface of the electrode terminals 14 and 16.
As shown in Figure (d), the amorphous semiconductor bonding layer of p-1-n is overcoated with a transparent resin 17, and finally electromagnetic energy is applied between the conductive substrate 11 and one electrode 16 to destroy the p-1-n amorphous semiconductor bonding layer. A low resistance region 18 is formed. Low resistance region 1
The resistance value R8 of 8 is several tens of ohms or less, and when the amorphous solar cell is used at low illuminance (100 lux to 5000 lux), the magnitude of this series resistance Rs does not reduce the characteristics of the amorphous solar cell. FIG. 4 is a perspective view of a consumer-use amorphous solar cell manufactured through the above steps.

次に上記薄膜半導体装置を作製する過程において、電極
端子16と導電性基体11とで挾まれた半導体領域18
を低抵抗化するための電気パルスによる接合破壊方法を
説明する。
Next, in the process of manufacturing the thin film semiconductor device, the semiconductor region 18 sandwiched between the electrode terminal 16 and the conductive substrate 11
A method of breaking the junction using electric pulses to lower the resistance will be explained.

タンデム型アモルファス太陽電池は、ステンレス/ p
+−i+  n、/ pz−1g−n2/ I To構
造からな覧各層の膜厚ばPt=70OA・ i + =
 400OA。
Tandem type amorphous solar cells are made of stainless steel/p
+-i+ n, / pz-1g-n2/ I To structure, the film thickness of each layer is Pt = 70OA・i + =
400OA.

n2=15OA、p、=tsoA、1z=600A、 
n2=15OA、ITO=70OAに作製されている場
合を挙げる。上記太陽電池に、この場合はステンレス基
板側をアースにn2側電極16を正電圧となる逆バイア
スをパルス状で印加する。第5図(a)に示すような印
加電圧+50v、パルス幅4m5ecのパルスを1回作
用させると領域18の直列抵抗Rsは第6図Bに示すよ
うな分布を示し、また第5図(b)のように逆パルス−
正パルスを対として印加すると第6図Cのように抵抗値
は減少し、更に上記第5図(b)のパルスを2回作用さ
せると抵抗値は第6図りのように一層低い値に分布し、
200以下を示した。抵抗値をゼロにすることはできな
いが、電磁的な手段で1〜1000以下に低下させるこ
とができる。
n2=15OA, p,=tsoA, 1z=600A,
A case where n2=15OA and ITO=70OA are fabricated will be described. In this case, a pulsed reverse bias is applied to the solar cell, with the stainless steel substrate side being grounded and the n2 side electrode 16 being a positive voltage. When a pulse with an applied voltage of +50 V and a pulse width of 4 m5ec is applied once as shown in FIG. 5(a), the series resistance Rs in the region 18 shows a distribution as shown in FIG. 6B, and ) as inverse pulse −
When positive pulses are applied as a pair, the resistance value decreases as shown in Fig. 6C, and when the pulse shown in Fig. 5(b) above is applied twice, the resistance value is distributed to an even lower value as shown in Fig. 6. death,
It showed 200 or less. Although the resistance value cannot be reduced to zero, it can be reduced to 1 to 1000 or less by electromagnetic means.

処で領域18における抵抗の値が太陽電池の特性に及ぼ
す影響を実験した結果を示す。第7図は面積1dのアモ
ルファスシリコン太陽電池を照度       □20
0ルックスの螢光灯下で動作させた時の直列抵抗の影響
を示したものである。また第8図は直列抵抗と電気的特
性の減少率との関係を示したものである。第7図及び第
8図から読み取れるように直列抵抗の値が1000の時
、特性の減少率は2%位であり、この程度の値ならほと
んど影響がないことが解った0従って上記パルス印加に
よって得られた200以下の抵抗値は第7図、第8図に
示した1000以下であることから、アモルファス太陽
電池の特性を劣化させないことは明らかである。
The results of an experiment on the influence of the resistance value in region 18 on the characteristics of the solar cell will now be shown. Figure 7 shows the illuminance of an amorphous silicon solar cell with an area of 1 d □20
This figure shows the effect of series resistance when operating under 0 lux fluorescent light. Moreover, FIG. 8 shows the relationship between series resistance and the rate of decrease in electrical characteristics. As can be read from Figures 7 and 8, when the series resistance value is 1000, the reduction rate of the characteristics is about 2%, and it was found that this value has almost no effect. Since the obtained resistance value of 200 or less is 1000 or less as shown in FIGS. 7 and 8, it is clear that the characteristics of the amorphous solar cell are not deteriorated.

半導体接合層の破壊は光レーザ−(Arレーザー、YA
Gレーザ−、CO□レーザー)を用いても可能であった
The semiconductor bonding layer can be destroyed using optical lasers (Ar laser, YA laser).
This was also possible using G laser, CO□ laser).

更に上記タンデム型アモルファス太陽電池を真空容器中
に入れ電子ビーム(たとえば20KV10−6A)の照
射によっても接合の破壊は可能であった。この場合モノ
シラン(SiH<)を主原料とする水素系アモルファス
シリコン(a−8t:H)太陽電池の方がSiF、ガス
を含む原料ガスから作うレるフッ素系アモルファスシリ
コン(a−8t:F:5’)太陽電池より低いエネルギ
ーで破壊された。
Furthermore, it was also possible to destroy the junction by placing the tandem type amorphous solar cell in a vacuum container and irradiating it with an electron beam (for example, 20KV10-6A). In this case, hydrogen-based amorphous silicon (a-8t:H) solar cells that use monosilane (SiH<) as the main raw material are better than fluorine-based amorphous silicon (a-8t:F :5') Destroyed at lower energy than solar cells.

上記実施例は基体としてそれ自体が導電体である金属板
を用いたが、ガラスのような透光性絶縁板を用いても構
成することができる。即ち第9図に示すようにガラス板
20の表面に透明導電膜21を形成し、その上にアモル
ファス半導体接合層(p−i −n/p −i−n )
 22を通常の手法で形成する。該半導体層22上に背
面電極(Al金属)23を真空蒸着し、上述の実施例に
おける透明電極13.15と同様に化学的手法で必要な
形状23.25にパターニングする。更に背面電極23
.25上の一部にAgペーストの印刷により電気的端子
24.26を形成し、その周辺をエポキシ系樹脂27で
保護する。最後に上述の実施例と同様に電磁的手段で低
抵抗領域28を形成して素子は完成する。完成した半導
体装置の斜視図を第10図に示す0上記実施例は単一¥
ルを説明したが、第11図に示すように同一基板20上
に複数セルの素子を電気的に直列接続としたアモルファ
ス太陽電池も可能である0 ℃魂7→;直列接続−されに−h=1太i奄蟇0尊鉦塔
蕃以上本発明によれば、薄膜半導体層を低抵抗化して電
極取り出し端子を設けることにより、半導体層の同一表
面に電極を容易に作製することができ、半導体装置をア
センブリーする工程において大幅なコストダウンや自動
化が容易となり、経済的な利点があるばかりでなく、半
導体装置をアセンブリーするだめのスペースに対する制
限が著しく緩和される。
Although the above embodiment uses a metal plate which is itself a conductor as the base, it is also possible to use a light-transmitting insulating plate such as glass. That is, as shown in FIG. 9, a transparent conductive film 21 is formed on the surface of a glass plate 20, and an amorphous semiconductor bonding layer (p-i-n/p-i-n) is formed thereon.
22 is formed in a conventional manner. A back electrode (Al metal) 23 is vacuum-deposited on the semiconductor layer 22 and patterned into a required shape 23.25 by a chemical method similar to the transparent electrode 13.15 in the above-described embodiment. Furthermore, the back electrode 23
.. Electrical terminals 24 and 26 are formed on a portion of 25 by printing Ag paste, and the periphery thereof is protected with epoxy resin 27. Finally, a low resistance region 28 is formed by electromagnetic means in the same manner as in the above-described embodiment, and the device is completed. A perspective view of the completed semiconductor device is shown in FIG.
However, as shown in Figure 11, an amorphous solar cell in which multiple cell elements are electrically connected in series on the same substrate 20 is also possible. According to the present invention, by reducing the resistance of the thin film semiconductor layer and providing an electrode extraction terminal, it is possible to easily produce an electrode on the same surface of the semiconductor layer. In the process of assembling semiconductor devices, it is possible to significantly reduce costs and facilitate automation, which not only has economic advantages, but also significantly reduces restrictions on space for assembling semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)、(b)は従来の光応答半導体デバイスの
断面図、第2図は本発明による一実施例の半導体デバイ
スの断面図、第3図(a)〜(e)は本発明による実施
例の製造工程を説明するための断面図、第4図は同実施
例による半導体デバイスの斜視図、第5図は本発明に適
用する低櫨抗化のために印加するパルス波形図、第6図
は印加パルス数と抵抗分節例を示す断面図及び斜視図、
第11図は本発明による更に他の実施例を示す断面図で
ある011ニステンレス基板 12:a−8i  13
+15:透明電極 14.16:電極端子 17:樹脂
コート膜 18:低抵抗領域 代理人弁理士 福 士 愛 彦(他2名)(a)   
              fノ第1凶 第2図 2 第4図 第3図 第5図 0   #   #   #   #  80  80
   F5   ###−一 第7図 z InJ
FIGS. 1(a) and (b) are cross-sectional views of a conventional photoresponsive semiconductor device, FIG. 2 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, and FIGS. 4 is a perspective view of a semiconductor device according to the embodiment, and FIG. 5 is a pulse waveform diagram applied to reduce the resistance applied to the present invention. , FIG. 6 is a cross-sectional view and a perspective view showing an example of the number of applied pulses and resistance division,
FIG. 11 is a sectional view showing still another embodiment of the present invention.011 Ni stainless steel substrate 12:a-8i 13
+15: Transparent electrode 14.16: Electrode terminal 17: Resin coat film 18: Low resistance area patent attorney Aihiko Fukushi (and 2 others) (a)
f No. 1 No. 2 Fig. 2 Fig. 4 Fig. 3 Fig. 5 Fig. 0 # # # # 80 80
F5 ###-1 Figure 7z InJ

Claims (1)

【特許請求の範囲】 工、導電性基体上に積層された接合を有する薄膜半導体
層と、該薄膜半導体層の一部に接合を破壊して形成され
た低抵抗領域と、上記薄膜半導体層上に形成された一方
の電極膜と、該電極膜と分離させて設けられ且つ上記低
抵抗領域に接続された他方の電極とを備えてなる薄膜半
導体装置。 2、前記薄膜半導体層は、p−1−nを一組としてこれ
らの接合を単数または複数層積層してなり、光応答性を
有することを特徴とする特許請求の範囲第1項記載の薄
膜半導体装置。 3、前記導電性基体は、透光性絶縁基板上に透明導電膜
が形成されてなることを特徴とする特許請求の範囲第1
項又は第2項記載の薄膜半導体装置。 4、前記薄膜半導体層上の電極膜は、一体的に形成され
た薄膜半導体上に複数個設けられてなり、低抵抗領域を
介して電極膜に対向する薄膜半導体の領域を電気的に直
列接続したことを特徴とする特許請求の範囲第3項記載
の薄膜半導体装置。 5、前記薄膜半導体層は受光面側に一方の電極膜及び他
方の電極膜が形成されてなる太陽電池であるととを特徴
とする特許請求の範囲第2項記載の薄膜半導体装置。
[Claims] A thin film semiconductor layer having a bond stacked on a conductive substrate, a low resistance region formed by breaking the bond in a part of the thin film semiconductor layer, and a thin film semiconductor layer on the thin film semiconductor layer. 1. A thin film semiconductor device comprising one electrode film formed on the electrode film, and the other electrode provided separately from the electrode film and connected to the low resistance region. 2. The thin film according to claim 1, wherein the thin film semiconductor layer is formed by stacking a single or multiple layers of junctions of p-1-n as a set, and has photoresponsiveness. Semiconductor equipment. 3. Claim 1, wherein the conductive substrate is formed by forming a transparent conductive film on a transparent insulating substrate.
The thin film semiconductor device according to item 1 or 2. 4. A plurality of electrode films on the thin film semiconductor layer are provided on the integrally formed thin film semiconductor, and regions of the thin film semiconductor facing the electrode films are electrically connected in series via a low resistance region. A thin film semiconductor device according to claim 3, characterized in that: 5. The thin film semiconductor device according to claim 2, wherein the thin film semiconductor layer is a solar cell in which one electrode film and the other electrode film are formed on the light receiving surface side.
JP57078851A 1982-05-10 1982-05-10 Thin film semiconductor device Granted JPS58196060A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP57078851A JPS58196060A (en) 1982-05-10 1982-05-10 Thin film semiconductor device
US06/492,675 US4570332A (en) 1982-05-10 1983-05-09 Method of forming contact to thin film semiconductor device
DE19833317108 DE3317108A1 (en) 1982-05-10 1983-05-10 THIN FILM SEMICONDUCTOR COMPONENT

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57078851A JPS58196060A (en) 1982-05-10 1982-05-10 Thin film semiconductor device

Publications (2)

Publication Number Publication Date
JPS58196060A true JPS58196060A (en) 1983-11-15
JPS6357952B2 JPS6357952B2 (en) 1988-11-14

Family

ID=13673324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57078851A Granted JPS58196060A (en) 1982-05-10 1982-05-10 Thin film semiconductor device

Country Status (1)

Country Link
JP (1) JPS58196060A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60113975A (en) * 1983-11-25 1985-06-20 Matsushita Electric Ind Co Ltd Thin-film photovoltaic element
JPS6191971A (en) * 1984-10-12 1986-05-10 Fuji Electric Co Ltd Manufacture of solar battery device
JPS61260683A (en) * 1985-05-03 1986-11-18 シーメンス ソーラー インダストリーズ,エル.ピー. Thin film solar module and manufacture thereof
JPS6265479A (en) * 1985-09-18 1987-03-24 Fuji Electric Corp Res & Dev Ltd Manufacture of thin film solar battery
JPS6355451U (en) * 1986-09-27 1988-04-13
JPS6413740U (en) * 1987-07-17 1989-01-24

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4856372A (en) * 1971-11-16 1973-08-08
JPS5778852A (en) * 1980-11-06 1982-05-17 Nidek Kk Binocular inverted image lens type photocoagulator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4856372A (en) * 1971-11-16 1973-08-08
JPS5778852A (en) * 1980-11-06 1982-05-17 Nidek Kk Binocular inverted image lens type photocoagulator

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60113975A (en) * 1983-11-25 1985-06-20 Matsushita Electric Ind Co Ltd Thin-film photovoltaic element
JPS6191971A (en) * 1984-10-12 1986-05-10 Fuji Electric Co Ltd Manufacture of solar battery device
JPS61260683A (en) * 1985-05-03 1986-11-18 シーメンス ソーラー インダストリーズ,エル.ピー. Thin film solar module and manufacture thereof
JPS6265479A (en) * 1985-09-18 1987-03-24 Fuji Electric Corp Res & Dev Ltd Manufacture of thin film solar battery
JPS6355451U (en) * 1986-09-27 1988-04-13
JPS6413740U (en) * 1987-07-17 1989-01-24

Also Published As

Publication number Publication date
JPS6357952B2 (en) 1988-11-14

Similar Documents

Publication Publication Date Title
US4879251A (en) Method of making series-connected, thin-film solar module formed of crystalline silicon
US4865999A (en) Solar cell fabrication method
US5259891A (en) Integrated type solar battery
US4532371A (en) Series-connected photovoltaic array and method of making same
WO2006101741A2 (en) Scalable photovoltaic cell and solar panel manufacturing with improved wiring
AU2010216750B2 (en) Solar battery module
US10205040B2 (en) Solar cell, method for manufacturing same, solar cell module and wiring sheet
JP2986875B2 (en) Integrated solar cell
JP3755048B2 (en) Integrated thin film tandem solar cell and manufacturing method thereof
JP2015207598A (en) Solar cell module, solar cell, and inter-element connection body
JPH11186573A (en) Manufacture of integrated thin-film photoelectric converter
US4570332A (en) Method of forming contact to thin film semiconductor device
JPS58196060A (en) Thin film semiconductor device
TW201246571A (en) Thin film solar cell module and manufacturing method thereof
JPH0864850A (en) Thin film solar battery and fabrication thereof
TW200849620A (en) Backside contacting on thin layer photovoltaic cells
JPS59161081A (en) Thin-film solar cell
JPH11261086A (en) Photovoltaic device and solar battery module
JPS6213829B2 (en)
JPS58196061A (en) Electrode formation for thin film semiconductor device
US20150207019A1 (en) Method for Fabricating Crystalline Silicon Solar Cell Having Passivation Layer and Local Rear Contacts
JP2869178B2 (en) Photovoltaic device
JPS6316913B2 (en)
JPS61284974A (en) Solar battery
JPH06120533A (en) Thin film solar cell and manufacture thereof