JPS58195341A - Loop terminal equipment - Google Patents

Loop terminal equipment

Info

Publication number
JPS58195341A
JPS58195341A JP7672182A JP7672182A JPS58195341A JP S58195341 A JPS58195341 A JP S58195341A JP 7672182 A JP7672182 A JP 7672182A JP 7672182 A JP7672182 A JP 7672182A JP S58195341 A JPS58195341 A JP S58195341A
Authority
JP
Japan
Prior art keywords
transmission
circuit
data
shift register
code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7672182A
Other languages
Japanese (ja)
Inventor
Hiroyuki Wada
和田　宏行
Toyokazu Hashimoto
橋本　豊和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7672182A priority Critical patent/JPS58195341A/en
Publication of JPS58195341A publication Critical patent/JPS58195341A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/437—Ring fault isolation or reconfiguration

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To improve reliability, by providing a shift register circuit to two pairs of transmission lines individually, erasing a GA code and decreasing the amount of hardware of a duplex loop transmission system. CONSTITUTION:Shift register circuits 5-1, 5-2 have bit length longer than that of the GA code given with the right of transmission, the GA code is received and the bit length of the GA code for erasing the GA code is required when the data to be transmitted from the calling station exists. A reception data is inputted to the shift registers 5-1, 5-2, a signal of an existing reception circuit 3-1 is inputted to a reception controlling circuit 6 with a selection circuit 4, and the data addressed to the calling station is transmitted to a common controlling section 10. The input data of the registers 5-1, 5-2 is outputted to transmission lines 1, 2 by transmission circuits 9-1, 9-2 via a switching circuit 8. The data of the register 5-1 is the GA code, and when a data transfer request signal is transmitted to a transmission controlling circuit 7 from the common controlling section 10, a transmission controlling circuit 7 transmits the signal.

Description

【発明の詳細な説明】 発明の対象 本発明は、ループ伝送システムにおける端局装置に係り
、特にループ伝送システムの信頼性の向上ヶ計るに好適
なループ端局装＊ＶＣ関する。DETAILED DESCRIPTION OF THE INVENTION Object of the Invention The present invention relates to a terminal station device in a loop transmission system, and particularly to a loop terminal station device *VC suitable for improving the reliability of a loop transmission system.

従来技術 従来、二重化された伝送路を有し、ＧＡ（Ｇｏ　−Ａｈ
−αｄ：送信権付与パターン）符号によって、送信権制
御を行うループ伝送システムにおけるループ端局装置は
、第１図に示すような回路構成が考えられてきた、第１
図において１゜２は伝送路で、いずれかが現用で他力が
予備となっている。５−１．５−２はレベル＆換や復調
等を行う受信回路で、９−１．９−２はレベルｆ俟や変
調等を行う送信回路で、それぞれ前記伝送路１．２に対
応して設けられている。６−１．６−２は受信制御回路
で、伝送路１．２から送られて（るビット直列のデータ
をビット並列のデータに変倹し、自局宛のデータを受信
したときは自局内に取込む機能やＧＡ符号の検出機能な
どの受信制御を行う。Conventional technology Conventionally, a duplex transmission path was used, and GA (Go-Ah
-αd: transmission right granting pattern) A loop terminal device in a loop transmission system that performs transmission right control using a code has been considered to have a circuit configuration as shown in FIG.
In the figure, 1°2 is a transmission line, one of which is currently in use and the other is a reserve. 5-1.5-2 is a receiving circuit that performs level conversion, demodulation, etc., and 9-1.9-2 is a transmitting circuit that performs level conversion, modulation, etc., and each corresponds to the transmission line 1.2. It is provided. 6-1.6-2 is a reception control circuit that converts the bit-serial data sent from the transmission line 1.2 into bit-parallel data, and when receiving data addressed to its own station, It performs reception control such as the function of importing into the GA code and the function of detecting the GA code.

７−１．７−２は送信制御回路で、受信制御回路６−１
．６−２同様、伝送路１．′２に対応して設けられてお
り、ＧＡ符号馨受信し自局が送信ｎｙｘ得たとき共通制
御ｓｉｉから送信要求があれば、該送信要求に対するデ
ータｉ共通制御部１０から、受取り、ビット並列のデー
タンビット直列のデー′１．・　１ りに変捗し、送信（ロ）路９Ｌ１．９−２　ｗ介して伝
送路１．２に送出し、それ以外の時は、受信制御回路６
−１．６−２　Ｋよって受信したデータｌそのまま送信
回路９−１．９−２　Ｋ対して送出している。なお、共
通制御部１０からのデータ！送出するときは、受信した
Ｇ４符号は内部で保留するか、一時消滅させ、自局から
のデータを送出し終えたとき、貴びＧＡ符号を発生させ
、自局の送信１！ＩＹ放棄する。7-1.7-2 is a transmission control circuit, and reception control circuit 6-1
．． Similarly to 6-2, transmission line 1. '2, when the own station receives a GA code and obtains a transmission nyx, if there is a transmission request from the common control SII, data i corresponding to the transmission request is received from the common control unit 10, and bit parallel processing is performed. The data bit series data '1. - Changes to 1 and sends it to the transmission line 1.2 via the transmission (b) line 9L1.9-2w, and at other times, the reception control circuit 6
-1.6-2 K, therefore, the received data l is directly sent to the transmitting circuit 9-1.9-2 K. In addition, data from the common control unit 10! When transmitting, the received G4 code is held internally or temporarily erased, and when the data from the local station has been transmitted, the second GA code is generated, and the local station transmits 1! IY give up.

共通制御部１０はループ端局装置内の制御を行う回路で
送信制御回路７−１又は７−２、受信制御回路６−１又
は６−２とのデータの授受の制御ン行い、受信制御回路
６−１と送信制御回路７−１か。The common control unit 10 is a circuit that performs control within the loop terminal device, and controls data exchange with the transmission control circuit 7-1 or 7-2 and the reception control circuit 6-1 or 6-2. 6-1 and transmission control circuit 7-1?

受信制御回路６−２と送信制御回路７−２のいずれか一
方の受信、送信制御回路との間で該データの授受ができ
、この選択は選択回路１１によって行うことができる。The data can be exchanged between the reception and transmission control circuits of either the reception control circuit 6-2 or the transmission control circuit 7-2, and this selection can be made by the selection circuit 11.

この選択は現用伝送路、予備伝送路の切り替えを行うも
ので、例えば、伝送路２が予備伝送路となっているとき
は受信回１ Ｍ　Ｓ−２、！ｑ、、、ｆｌｌＪｌＩＤＯ＊　６−２　
、　ａ（Ｎｆｌｌｊ＃［ｆｆ１Ｍ　７−２　。This selection is to switch between the working transmission line and the protection transmission line. For example, when transmission line 2 is the protection transmission line, the receiving circuit 1 M S-2,! q,,,flJlIDO* 6-2
, a(Nfllj#[ff1M 7-2.

送信回路９−２ケ介して伝送路２のデータケそのまま下
Ｉ送出するようＫなっている。　　　　　λ以上の如き
構成となっており、受信回路５−１゜５−２、受信制御
回路６−１．６−２、送信制御回路７−１．７−２、送
信回路９−１．９−２がいずれも２重化さｊておりルー
プ伝送システム全体の信頼性ケ高めようと考えられてき
た。The data on the transmission line 2 is sent out directly via the transmitting circuit 9-2. The configuration is as follows: receiving circuit 5-1゜5-2, receiving control circuit 6-1.6-2, transmitting control circuit 7-1.7-2, transmitting circuit 9-1.9- 2 is duplexed, and it has been considered to increase the reliability of the entire loop transmission system.

しかし、受信制御回路６−１．２でビット直列のデータ
をビット並列のデータに変抄したものを、馬び送信制御
回路７−１．２でビット直列のデータＫｆ換てるといっ
た機能を有しているため、）・−ド物量が多くなり高価
なものとなる。また。However, it has the function of converting bit-serial data into bit-parallel data in the reception control circuit 6-1.2 and converting it into bit-serial data Kf in the transmission control circuit 7-1.2. Because of this, the amount of material used in )--d becomes large and expensive. Also.

ループ伝送システム全体においては全ループ端局装置の
前記受信制御回路６−１．２．送信制御（ロ）路７−１
．２が直列に接続されることＫなりシステム全体として
は重列信頼度となるため、ＭＴＢＦ（平均故障開時間）
の低下ケまねいている。In the entire loop transmission system, the reception control circuits 6-1.2. Transmission control (b) path 7-1
．． Since 2 are connected in series, the system as a whole has multiple series reliability, so MTBF (Mean Time to Failure)
This is causing a decline in

発明の目的 本発明の目的とてるところは、前述の如き従来の問題点
となる信頼性の向上に関し、安価にしてｉ＃ｌ信勅性を
得るループ伝送システムに用いるループ端局装置奢提供
することにある。OBJECTS OF THE INVENTION An object of the present invention is to provide a loop end station device for use in a loop transmission system that achieves i#l reliability at a low cost, in order to improve reliability, which is a problem in the conventional art as described above. There is a particular thing.

本発明においては、従来方式の欠点である伝送路上に直
列に接続される回路１に最小にせしめ。In the present invention, the number of circuits 1 connected in series on the transmission path, which is a drawback of the conventional system, is minimized.

かつ、伝送路ン゛２重化すること、丁なわち、従来方式
の回路に対し、受信回路と送信回路の間　□に２対の伝
送路に対し個別ｔｔｃＧＡ符号のビット　　□長よりも
長い、かつ制御し得る最小値のビット長ケ有するシフト
レジスタ回路を設け、該シフトレジスタにより、ＧＡ符
号の消去を可能とすることにより、ハード物量ン少な（
せしめ、信頼性向上を計るものである。In addition, the transmission path is duplexed, that is, the bit length of the individual ttcGA code is longer than the bit length of the individual ttcGA code for the two pairs of transmission paths between the receiving circuit and the transmitting circuit in contrast to the conventional circuit. By providing a shift register circuit having a controllable minimum bit length and making it possible to erase the GA code, the amount of hardware can be reduced (
This is intended to improve reliability.

発明の実施例 以下、本発明の一実施例を第２囚により説明する。１，
２は伝送路で、いずれか−力が現用、他方が予備伝送路
となっており、現用伝送路に障害が発生した場合、予備
伝送路に切り替えて運転するようＫなっている。５−１
．５−２は第１図で説明したのと同じ受＋！回路である
。９−１．９−２も第１図で説明したのと同じ送信回路
である。Embodiment of the Invention Hereinafter, an embodiment of the present invention will be explained by the second prisoner. 1,
Reference numeral 2 designates transmission lines, one of which is in use and the other is a backup transmission line, so that if a failure occurs in the current transmission line, operation is switched to the backup transmission line. 5-1
．． 5-2 is the same Uke+! as explained in Figure 1! It is a circuit. 9-1 and 9-2 are also the same transmitting circuits as explained in FIG.

４は選択回路で前記受信回路５−１．３−２の出カン受
け、現用伝送路となっている側の信号を出力てる機能を
有している。５−１．５−２はシフトレジスタ回路でＧ
Ａ符号のビット長よりも長いビット長を有Ｔるもので、
このシフトレジスタ回路５−１．５−２は、Ｇ　Ａ符号
！受信し、自局から送るべきデータがあるとき、該ＧＡ
符号を消去するためＧＡ符号のビット長Ｖ帯している。Reference numeral 4 denotes a selection circuit which has the function of receiving the output of the receiving circuit 5-1, 3-2 and outputting the signal on the side that is the active transmission line. 5-1.5-2 is a shift register circuit and G
It has a bit length longer than the bit length of the A code,
This shift register circuit 5-1.5-2 has GA code! When there is data to be received and sent from the own station, the corresponding GA
In order to erase the code, the bit length of the GA code is V.

６は受信制御回路で、第１図で説明した受信制御回路６
−ｉ、６−２と同じ機能？有するものである。７は送信
制御回路でこれも第１囚で説明した送信制御回路７−１
．７−２と同機能を有するものである。6 is a reception control circuit, which is similar to the reception control circuit 6 explained in FIG.
-i, same function as 6-2? It is something that you have. 7 is a transmission control circuit, which is also the transmission control circuit 7-1 explained in the first prisoner.
．． It has the same function as 7-2.

８は切り替え回路で、これはシフトレジスタ回路５−１
．５−２からのデータを送信回路？−１，９−２Ｋ送出
呵るか、送信制御回路７からのデータを送出するかケ切
り替えること、ただし、予備伝送路となっている（ｌｔ
ｌｌＶＣはシフトレジスタ回路５−１または訃２の出力
（１！−＠Ｌか出力せず、かつ送信：１゜ １９１Ｊ　１１　＠　％　７”ｈ　（Ｏｆ　−１″′：
ａ、、、’−ゝ０°１０″号な受け、自局が送信権ヶ保
持、したときのみである。8 is a switching circuit, which is a shift register circuit 5-1
．． A circuit that transmits data from 5-2? -1,9-2K transmission (2) or data from the transmission control circuit 7 can be switched; however, it is used as a backup transmission line (lt
llVC is the output of the shift register circuit 5-1 or 2 (1!-@L or not output, and transmission: 1゜191J 11 @% 7"h (Of -1"':
a,..., '-ゝ0°10'' is received only when the own station holds the transmission right.

１０は共通制御部で、送信制御回路７、受信制御回路６
との間のデータの授受に＠する制御１行うもので、この
回路以降の回路については、本発明の主旨とは直接関係
ないので省略したが、ループ伝送システムに加入する端
末装置等Ｖ接続する回路が存在することはトうまでもな
い。10 is a common control section, which includes a transmission control circuit 7 and a reception control circuit 6.
The circuits after this circuit are omitted as they are not directly related to the gist of the present invention, but the terminal devices, etc. that join the loop transmission system are V-connected. It goes without saying that a circuit exists.

次にこの回路の動作ｌ述べる。Next, the operation of this circuit will be described.

伝送路１が現用で伝送路２が予備となっている場合につ
いて説明する。伝送路１，２から送られて（るデータ（
伝送路２は予備であるのでデータとしては％に送られて
いないが、説明士データとして述べる。）それぞれ、受
信回路６−１゜５−２にヨって受信されレベル変換され
る。該受信データはシフトレジスタ回路５−１．５−２
　Ｋ入力されるとともに選択回路４によって現用伝送路
である受信回路５二１の信号が受信制御回路６に：： 入力され、受信制御回路６では自局宛のデータであれば
、これを　信し共通制御ｓ１０に対してト 送出する。シフトＶ、ジスタ回路５−１．５−２　Ｋ入
力さｊたデータは切り替え回路８ケ介して送信回路９−
１．９−２４Ｃよってレベル変換され伝送路１．２に出
力される。一方、シフトレジスタ回路５−１に入ったデ
ータがＧＡ符号であり、共通制御部１０からデータ転送
要求信号が送信制御回路７に送られてきている時は該要
求信号に対するデータを送信制御回路７は送出てる。こ
のとき切り替え回路８は送信制御回路７からのデータを
送出てるように切り替わっている。A case will be described in which transmission line 1 is in use and transmission line 2 is in reserve. Data sent from transmission paths 1 and 2 (
Since the transmission line 2 is a reserve, it is not sent as data, but it will be described as explainer data. ) are received by receiving circuits 6-1 and 5-2, respectively, and their levels are converted. The received data is transferred to shift register circuit 5-1.5-2.
At the same time, the selection circuit 4 inputs the signal from the reception circuit 521, which is the active transmission line, to the reception control circuit 6, and the reception control circuit 6 accepts the data if it is addressed to its own station. It is sent to the common control s10. Shift V, register circuit 5-1, 5-2 K input data is sent to transmission circuit 9- via 8 switching circuits.
The signal is level-converted by 1.9-24C and output to transmission line 1.2. On the other hand, when the data entering the shift register circuit 5-1 is a GA code and a data transfer request signal is sent from the common control unit 10 to the transmission control circuit 7, the data corresponding to the request signal is transferred to the transmission control circuit 7. is sending out. At this time, the switching circuit 8 is switched so as to transmit data from the transmission control circuit 7.

以上、述べた如き構成で動作ケ行うので、本発明におい
ては次のような効果Ｗ得られる。Since the configuration described above operates, the following effects W can be obtained in the present invention.

発明の効果 シフトレジスタ回路が、現用／予備伝送路に対しそれぞ
れ個別に設けられているのみであるので２重化さｔして
いＴｏ箇所の論理は極めて簡略化されたものとなり、か
つ、伝送路として一１２重化された形であるので、ルー
プ伝送システム全体の信頼性の向上ン安価に計ることが
できる効果ケ有している。Effects of the Invention Since shift register circuits are only provided individually for the working and backup transmission lines, the logic of the duplexed parts is extremely simplified, and Since it is a 12-duplex type, it has the effect of improving the reliability of the entire loop transmission system and being able to be measured at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来技術によるループ端局装置のループ伝送路
制御部のｉ！ｉｌ理ブロック図、１ｉ１２１Ｊは本発明
の一実施例のループ端局装置のループ伝送制御部の談坤
ブロック図である。 １．２・・・伝送路 ５−１．２・・・シフトレジスタ回路 ４・・・選択回路 ６・・・受信制御回路 ７・・・送信制御回路 ８・・切り替え回路 才１図 第２ｆＩFIG. 1 shows the i! Reference numeral 1i121J is a block diagram of a loop transmission control section of a loop terminal device according to an embodiment of the present invention. 1.2... Transmission line 5-1.2... Shift register circuit 4... Selection circuit 6... Reception control circuit 7... Transmission control circuit 8... Switching circuit Figure 1 2fI

Claims (1)

【特許請求の範囲】[Claims] １２重の伝送路によりループ状に接続され、＃２ｍの伝
送路のうち一方が、予備伝送路となる構成で、かつＧＡ
符号により送信権制御を行なうループ伝送システムに用
いるループ端局装置Ｉにおいて、前記２重の伝送路の各
々に対応して設けらｎ、レベル変換等７行なう受信（ロ
）路と、送信回路があり、ＧＡ符号のビット長以上の長
さを有し、前記２つの受信回路の出力データ信号に接続
され前記２重の伝送路に対応して設けられた２個のシフ
トレジスタ回路と、該２個のシフトレジスタ回路の入力
である２対のデータ信号のうち現用伝送路からのデータ
信号を自局宛データの受信を行なう受信制御回路に出力
する受信選択回路と、前記２個のシフトレジスタ回路の
出力側に接続され、予備伝送路となっている側は該シフ
トレジスタ回路の出力Ｖ＠記送信回路に出力し、現用伝
送路になっている匈は自局がＧＡｆ（より送信軸ケ得て
いるときで送信状態にあるときは、データの送信を行う
送信制御回路からのデータを送信（ロ）路に出力し、該
送信状態以外は現用伝送路側の＠１シフトレジスタ回路
の出力データｗ前Ｐ送信回路に出力するような送信デー
タ切り替え回路とから成るループ伝送制御部を有するこ
とにより伝送路の２１什ン計り、ループ伝送路の信頼性
χ高めることを特徴とするループ端局装置。It is connected in a loop with 12 transmission lines, and one of the #2m transmission lines serves as a backup transmission line, and the GA
In a loop terminal device I used in a loop transmission system in which transmission rights are controlled by codes, a receiving (b) path is provided corresponding to each of the double transmission paths, and seven receiving paths for performing level conversion, etc., and a transmitting circuit are provided. two shift register circuits, each having a length equal to or longer than the bit length of the GA code, connected to the output data signals of the two receiving circuits and provided corresponding to the double transmission path; a reception selection circuit that outputs the data signal from the current transmission line among the two pairs of data signals that are input to the shift register circuits to a reception control circuit that receives data addressed to the local station; and the two shift register circuits. The side that is connected to the output side of the shift register circuit and is used as a backup transmission line outputs the output of the shift register circuit to the transmission circuit, and the side that is used as the active transmission line is connected to When it is in the transmission state, the data from the transmission control circuit that transmits data is output to the transmission (b) path, and when it is not in the transmission state, the output data w of the @1 shift register circuit on the working transmission path side is output. What is claimed is: 1. A loop end station device, characterized in that it has a loop transmission control unit comprising a transmission data switching circuit for outputting to a front P transmission circuit, thereby increasing the reliability of the loop transmission path by increasing the reliability of the transmission path.
JP7672182A 1982-05-10 1982-05-10 Loop terminal equipment Pending JPS58195341A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7672182A JPS58195341A (en) 1982-05-10 1982-05-10 Loop terminal equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7672182A JPS58195341A (en) 1982-05-10 1982-05-10 Loop terminal equipment

Publications (1)

Publication Number Publication Date
JPS58195341A true JPS58195341A (en) 1983-11-14

Family

ID=13613425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7672182A Pending JPS58195341A (en) 1982-05-10 1982-05-10 Loop terminal equipment

Country Status (1)

Country Link
JP (1) JPS58195341A (en)

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