JPS58195276A - Method for matching pattern - Google Patents

Abstract

PURPOSE:To speed up matching and to reduce the generation of malfunction by finding a temporary pattern center having high pattern probability and moving a matching pattern successively from the center to the periphery of the input pattern to match the pattern. CONSTITUTION:The input pattern 2 of an object 1 to be recognized is read out by a TV camera 3, binary-coded by a binary-coding circuit 4 and successively stored in an input pattern memory 5 synchronusly with the scanning of the camera 3. The temporary center positions of X and Y components of a matching pattern are set up in temporary center registers 6, 7 and the temporary centers of respective components are applied to adders 11, 14. In addition, the outputs of matching scanning counters 10, 13 for the X and Y components respectively and the X and Y component outputs 8, 12 of an offset memory 9 are applied to the circuit 11, 14 and the pattern 2 in the memory 5 is read out in a consistent degree counting circuit 17 by using the outputs of the circuits 11, 14 as the addresses. Subsequetly, the mask pattern read out from a mask pattern memory 16 is successively moved to the periphery of the pattern 2 by a circuit 17 to match the pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) 1 Technical Field of the Invention The present invention relates to a pattern matching method that starts matching processing from a position with a high matching probability when carrying out input cover pattern and mask pattern tono matching. .

(2) Background of the Invention Various methods have been developed to check whether the entered cover pattern matches a pre-stored mask pattern, but each method has its own drawbacks. However, the reality is that there is still room for further development as a method for matching both of the above patterns.

(3) Distance between prior art and W One of the pattern matching methods since W is a method in which an XY projection process is performed on an input pattern, the pattern center is found from the histogram, and pattern matching is performed. According to this method, a small amount of dirt generated in the input cover pattern causes the desired center to shift, causing mismatching. There is also a method of performing matching by sequentially moving the mask pattern from the end of the input pattern, but this method has the disadvantage that the processing time is long.

(416 OBJECTS OF THE INVENTION The present invention was devised in view of the drawbacks of the conventional methods as described above, and its purpose is to provide a pattern matching method that is high speed and has fewer malfunctions.

(5) 1 Structure of the Invention The purpose of this invention is to sequentially move the mask pattern stored in the mask pattern memory with respect to the input cover pattern stored in the input cover pattern memory, and check whether or not there is a matching between the input cover pattern and the mask pattern. When investigating, find the pattern tentative center with a high pattern matching fi rate,
Insert the mask pattern from the center! - This is achieved by firstly moving the pattern toward the periphery of the pattern to match the input cover pattern and the mask pattern.

(6) Dormitory Example of 1 Invention (''□ ′□,,:,・ Hereinafter, with reference to the attached drawings, the embodiment of the present invention will be described. :) 工＋t1□0.. --5゜O.0. A cultivated animal with a cover turn 2, whose input cover turn 2U
The nine cover turn signals read by the TV camera 3 and binarized by the binarization circuit 4 are sequentially stored in the input cover turn memory 5 in synchronization with the scanning of the TV camera 3. .

Reference numerals 6 and 7 are provisional center storage registers, in which the X component of the provisional center is placed in register 6, and the Y component of the provisional center is placed in register 7. This tentative center is determined by a statistical method, for example, by sequentially moving the incoming cover turns and setting the point where the incoming cover turn points that maximize the degree of pattern matching are most concentrated as the tentative center. 8 is the X component offset amount output of the offset memory 9, and 10 is a matching scan counter for the X component. The output of the register 6, the X component offset 1 output 8, and the output of the counter 10 are connected to the X addressing circuit of the memory 5 via the summation circuit 11. ,. Y, O, guy:, 1. This is a matching scan counter for 13tiY components. The output of the register, Y component off, 1 cent deception output 12, and the output of the counter 3 are connected to the Y addressing circuit of the memory 5 via the summation circuit 14. The counter 13Fi is connected to the carry output of the counter 10, and is incremented by 1 every time there is a Φyy from the counter 10. Further, the carry output of the counter 13 is connected to an offset memory read counter 15, and is incremented by the value Fil of the counter 13 every time there is a current value from the counter 13.

The output of counter 15 is connected to the addressing circuit of memory 9.

The counters 10 and 13 are respectively connected to the mask pattern memory 1.
Retail connected to the X addressing circuit and Y addressing circuit of 6.

The outputs of the memories 5 and 160 are connected to the matching degree counting circuit 17.

Next, the operation of an example of the device of the present invention having the above configuration will be described.

The input cover pattern 2 is read by a TV camera 3, and its output is binarized by a binarization circuit 4 and stored in the input cover pattern memory 5. At this time, the degree of pattern matching is maximized using a statistical method. The point where up to 4 input cover turn points gather,
The tentative center of the side pattern is determined, and its X and Y coordinate values are stored in the tentative center storage register 6.7.

Next, a matching scan is started to determine whether matching can be obtained between the cover pattern input in the input cover pattern memory 50 and the mask pattern in the mask pattern memory 16.

That is, a storage area corresponding to the entire storage area of the mask pattern memory 16 is cut out from the input pattern memory 5 based on the temporary center specified by the value of the register 6.7, and the storage area is sent out in bit series. Meanwhile, the contents of memory 16 are also sent out in bit series. This can be explained in detail as follows.

At the beginning of the matching scan, the outputs 8, 12 of the memory 9 are also zero and the counters 10.13 are reset to zero. At the start of the matching scan, the counter is incremented by 1 at predetermined time intervals. The value is summed with the value of register 6 and the value of X component offset amount output 8 in addition circuit 11, and is supplied to the X addressing circuit of memory 5, and the value of register 7 and the value of Y component offset amount output The sum of the value of 12 and the value of the counter 13 is taken by the summation circuit 14, and the output value is supplied to the Y-Abiref2hufu circuit of the memory 5, and the input pattern specified by the output of both sums is calculated. The bit is read.

On the other hand, the value of counter 10.13 is 1 memory 16
, Y ABILEFF2FF circuit, and the bits of the memory 16 designated by these values are read out.

These bits are compared and counted in the coincidence count W817.

The comparison count of such bits is determined by the bits of memory 16 specified by the values of counters 10.13, 7. Yo104.1
．．・Enemy'・U. . 6. Therefore, the value of the counter 13 is incremented by 1 each time a carry is output from the counter 10, that is, every time the reading of the X direction digits of the memory 16 is completed. Then, when a carry is output from the counter 13, all bits of the entire memory area of the memory 16 and the above memory area specified by the value of the register 6.7 and the value of the offset amount output 8.12 are allocated. Comparison from the starting point with all the bits specified by the value of counter 10.13 (these bits correspond to the above memory area and are each bit in the memory area extracted from memory 5) Counting ends. At that time, -
The numeral counting circuit 17 outputs an output signal indicating the degree of matching.

Each time a carry is output from the counter 13 as described above, the offset read counter 15 is incremented by one. At each count up, the qb output area of the memory 5 is moved toward the periphery of the input pattern. For example, as shown in the figure, it is moved in a spiral manner. Each time it moves, a storage area corresponding to the entire storage area of the memory 16 is stored.
1 is extracted from the memory 5, all bits of these storage areas are subjected to the above-mentioned comparison and counting operation, and at the end of the comparison, a coincidence output signal is output from the coincidence counting circuit 17.

Then, the -number output signal is used to determine whether it is within a predetermined level range, and pattern matching is performed. If the determination is affirmative, the process ends.

As described above, according to the present invention, the starting point of pattern matching is set at the statistically determined pattern tentative center (a point with high matching probability), and the presence or absence of matching between the input cover pattern and the mask pattern is checked. Therefore, it is possible to reduce the number of matching trials, achieve high-speed matching, and reduce malfunctions.

In the above embodiments, an example has been described in which the movement of the mask pattern from the temporary center of the pattern toward the periphery of the incoming pattern occurs in a spiral manner, but it may also be caused to move radially from the temporary center of the pattern.

(7) 0 Effects of the Invention In short, according to the present invention, since the starting point of pattern matching is set to a point with a high matching probability and matching is started, it is possible to realize high-speed matching. - The effect of reducing the occurrence of motion can be obtained.

[Brief explanation of the drawing]

The accompanying drawings illustrate one embodiment of the invention. In the figure, b is an input cover pattern memory, 6°7Fi temporary center storage register, 9 is an offset memory, 10tiX component matching scan counter, 1311! Component matching excitation counter, 15 an offset memory translation counter, 11.14 a summation circuit, 16 a mask pattern memory, and 1F a coincidence degree counting circuit. Patent issuer: Fujitsu Limited-7, department

Claims (1)

[Claims] When matching the long pattern from the bottle with the mask pattern by sequentially moving the nine mask patterns stored in the mask pattern memory against the input cover pattern stored in the input cover turn memory, select a pattern with a high probability of pattern matching. A pattern matching method characterized in that the center is determined, and the mask pattern is sequentially moved from the temporary center of the pattern toward the periphery of the cover pattern to match the upper cover pattern and the mask pattern.