JPS58191742U - Muting circuit - Google Patents
Muting circuitInfo
- Publication number
- JPS58191742U JPS58191742U JP8887382U JP8887382U JPS58191742U JP S58191742 U JPS58191742 U JP S58191742U JP 8887382 U JP8887382 U JP 8887382U JP 8887382 U JP8887382 U JP 8887382U JP S58191742 U JPS58191742 U JP S58191742U
- Authority
- JP
- Japan
- Prior art keywords
- muting
- power supply
- supply voltage
- output
- time constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Noise Elimination (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来例を示す回路図、第2図及び第3図はタイ
ムチャート、第4図は本考案の一実施例を示す回路図、
第5図はそのタイムチャートである。
5.7・・・・・・時定数回路、SWr曲切換スイッチ
、Trよ・・・・・・制御トランジスタ、Tr2・・・
・・・ミューティングトランジスタ、Tr3.Tr、・
・・・・・トランジスタ(検出手段)。
(c) a7゜
−一すぐニーN=−FIG. 1 is a circuit diagram showing a conventional example, FIGS. 2 and 3 are time charts, and FIG. 4 is a circuit diagram showing an embodiment of the present invention.
FIG. 5 is the time chart. 5.7... Time constant circuit, SWr song selection switch, Tr... Control transistor, Tr2...
...muting transistor, Tr3. Tr,・
...transistor (detection means). (c) a7゜-one straight knee N=-
Claims (1)
給路の電源電圧の立下りを検出する検出手段と、該検出
手段の検出出力が印加される時定数手段と、該時定数手
段の出力が印加される制御手段と、該制御手段の出力に
て制御されるミューティング手段とを備え、前記切換手
段にて前記電源電圧供給路を切換えた際には、前記検出
手段にて一力の電源電圧供給路の電源電圧の立下りを検
出し、前記時定数手段の時定数にて定まる時間前記検出
手段の出力を前記制御手段に印加して前記制御手段を駆
動することにより前記ミューティング手段を駆動し、以
って前記ミューティング手段にてミューティングをかけ
るようにしたことを特徴とするミューティング回路。a switching means for switching the power supply voltage supply path; a detection means for detecting a fall in the power supply voltage of the power supply voltage supply path; a time constant means to which the detection output of the detection means is applied; and an output of the time constant means. and a muting means that is controlled by the output of the control means, and when the switching means switches the power supply voltage supply path, the detection means switches the power supply voltage to one power. The muting means is activated by detecting a fall in the power supply voltage of the voltage supply path and applying the output of the detection means to the control means for a time determined by the time constant of the time constant means to drive the control means. A muting circuit characterized in that the muting circuit is driven so that the muting means applies muting.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8887382U JPS58191742U (en) | 1982-06-14 | 1982-06-14 | Muting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8887382U JPS58191742U (en) | 1982-06-14 | 1982-06-14 | Muting circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58191742U true JPS58191742U (en) | 1983-12-20 |
JPS6327480Y2 JPS6327480Y2 (en) | 1988-07-25 |
Family
ID=30097526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8887382U Granted JPS58191742U (en) | 1982-06-14 | 1982-06-14 | Muting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58191742U (en) |
-
1982
- 1982-06-14 JP JP8887382U patent/JPS58191742U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6327480Y2 (en) | 1988-07-25 |
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