JPS5819090B2 - Data interrupt control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data interrupt control device 1 for controlling data transfer or transmission between a digital control device and a device or circuit controlled by a program.

Data ways and data link devices have come to be widely used as data transfer means between program control devices.

Conventionally, an interrupt control device of this type has been shown in FIG.

In the figure, 1 is a transmitting device indicating a data transmitting side, 2 is a receiving device indicating a data receiving side, and 3 is a data transmission path.

Since the interrupt control of the present invention is mainly required on the receiving side, the second receiving apparatus will be described in more detail.

21 is a data transmission control unit that executes transmission control based on a data transmission method; 22 is a reception data buffer unit that temporarily stores transmitted data (reception data); 23;
is a reception completion detection unit 24 that detects that transmission is completed;
25 is an interrupt signal generation unit that requests data processing in the buffer unit 22 based on the reception completion signal 23;
This is a programmable processing device that executes processing of received data stored in 22 in response to an interrupt signal generated from the programmable processing device.

Next, I will explain one operation.

In order to simplify the explanation, FIG. 2 shows a conceptual operational procedure according to the prior art.

First, data transmitted from the first transmitting device to the second receiving device passes through the third transmission path, activates the second transmission control unit 21, and starts transmission in the second device.

When the transmitting device No. 1 and No. 1 transmits n pieces of data, the No. 2 receiving device executes an operation of successively storing the n pieces of received data into the received data buffer section No. 22.

At this time, the reception completion detection section 23 constantly monitors the transmission completion command or transmission completion signal transmitted from 1, and detects the completion command or the transmission completion signal.

The interrupt signal generating section 24 generates an interrupt signal to the processing device 25f.

When the processing device 25 confirms this interrupt signal, it transfers the received data (n) stored in the received data buffer section 22.
).

This process 1 transfers the data in the received data buffer section 22 to the data memory section 202, and
This includes a process of reading the data into the processing device 25 via interrupt 1.

Since the conventional data interrupt control device is configured and operates as described above, the receiving device receives n pieces of data (n=t...n) in data transfer and transmission control 1. Each time the processing unit 25 receives a data interrupt processing request, it must execute the processing.

If the processing device 25 that executes program control has the primary purpose of executing an applied control program such as process control (hereinafter referred to as actual control), it should execute interrupt processing every time the data is transmitted. This is inappropriate because it delays the execution of the actual control, which is the first objective.

Furthermore, interrupt control in conventional data transmission is necessary in the transmission control means 1, and all received data has the characteristic of requesting interrupt processing from the processing device 1. It does not necessarily mean that

However, conventional interrupt control devices are designed to automatically interrupt the processing device when data reception is completed, regardless of the content of the received data.

It had the disadvantage of poor processing efficiency.

The present invention has been made to eliminate the drawbacks of the conventional ones as described above, and has a data interrupt control device 1 for data transmission control.
The data sender knows the characteristics of the transmitted data and determines whether or not interrupt control is required when receiving one piece of transmitted data, thereby reducing the load on data transmission on the receiving device (to the minimum by one) and making the data easy to use. The purpose is to provide an interrupt control device.

An embodiment of the present invention will be described below with reference to FIG.

In FIG. 3, numeral 1 indicates a data transmitter, which transmits data to a data receiver 2 via a data transmission path 3. In FIG.

The data receiving device f2 includes a data transmission control section 21.2 that executes data transmission control. A reception completion detection unit 23 that detects the completion of transmission data. A reception data buffer section 22 that temporarily stores reception data. Furthermore, it is composed of a data memory section 202, a data transfer control section 201 that executes data transfer, an interrupt processing information detection section 200 that decodes the nature of received data, and an interrupt signal generation section 24.

In FIG. 3, a data control circuit not directly related to the present invention is not shown.

Next, I will explain the operation in detail.

In order to simplify the explanation of the operation shown in FIG. 3, FIG. 4 shows the main points of the present invention and its procedures.

First, data is transmitted from a data transmitting device 11 by designating the device number that is to receive the transmitted data.

If data receiving device 2 is now designated, the data transmission control unit 21 is activated and reception of transmission data is started.

Here, if n pieces of data are sent, temporarily 1
The received data buffer section 22f stores this data.

When the reception of n pieces of data is completed, the reception completion detection section 23 operates and instructs the data transmission control section 21f to complete the data transmission, while the data transfer control section 201 receives the reception data buffer. The unit 221 instructs the start of transfer control to transfer the n pieces of received data stored in the data memory unit 202.

At this time, that is, when data is transferred from the reception data buffer section 22 to the data memory section 202f, the interrupt information detection section 200 is operating, and the data transmitted from the data transmission device 1 to the data reception device 2 ( Detects the presence or absence of an interrupt processing request for the processing device 25f (received data).

If "present", the interrupt signal generator 241 is instructed to generate an interrupt signal; if "absent", no instruction is given.

Here, the mechanism of interrupt processing information in transmitted data, that is, received data will be explained with reference to FIG.

Now, it is assumed that one unit of transmission data (two received data) is called a word, and one word is composed of m bits.

FIG. 5a shows an example of the bit structure of transmission data (reception data).

It is composed of a data section 41 and an interrupt processing information section 42.

The data section 41 indicates a general term for control commands for one data transmission, data such as data types (addresses), numerical values, codes, control information for the receiving device 1, etc., and the contents of these information. 1) Bit configuration.

The interrupt processing information section 42 receives this information 1 in the receiving device 1.
This information is used to determine whether or not an interrupt processing request for received data is necessary, and as an example, 1 in FIG. 5 is assigned 1 bit.

Now, if the data shown in FIG.

Interrupt processing information unit 4 containing m-1th bit f of received data
2, and if it is Xl", the interrupt signal generator 24
Generates an interrupt signal from.

On the other hand, the received data is transmitted to the interrupt processing information section 4 as shown in FIG. 5C.
If 2 is 'XO', no interrupt processing request is issued to the processing device 251.

As is clear from the detailed explanation of the operation of this invention above, 1.
According to the present invention, there is a feature in which, in data transmission 1, an instruction is given as to whether or not interrupt control is to be executed in the receiving device on the transmitted data. Although we have shown an example in which the unit interrupt processing information section has a 1-bit structure, it is also possible to have a multi-bit structure 1 and then 1 piece of information such as the interrupt level and the type of interrupt factor, and also a block of data. It is clear that the same effect can be obtained even if one unit of interrupt processing information is provided.

In addition, as an application example, I mentioned data way transmission 1,
It is clear that the invention can be applied to any data transmission that requires mutual communication or data exchange.

As described above, according to this invention, data transmission,
Transfer control 1 and data interrupt control 1.

Configuration 1 includes an interrupt processing information section for transmitted data (received data), a circuit for detecting the presence or absence of this information, and an interrupt signal generation circuit based on this result. (1) Characteristics of the transmitted data itself. It is possible to determine whether or not interrupt processing is necessary.

(2) Since the processing device 1 does not have to execute interrupt processing once every time data is transmitted, the processing capacity of the processing device itself is improved.

(3) Since the necessity of interrupt processing can be determined on the data sending side, system design becomes easier.

(4) Interrupt control is easy to understand and maintenance is easy.

Effects such as this can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a conventional interrupt control method, and FIG. 2 is a diagram showing its procedure. FIG. 3 is a diagram showing an interrupt control device according to an embodiment of the present invention, FIG. 4 is a diagram showing the procedure of the interrupt control device shown in FIG. This is an example of interrupt processing information. . In FIG. 1, 1 is a transmitting device, 2 is a receiving device, 3
2 is a data transmission path, 21 is a data transmission control section, 22 is a reception data buffer section, and 23 is a reception completion detection section. 24 is an interrupt signal generation section, 25 is a processing device, 200 is an interrupt processing information detection section, 201 is a data transfer control section, 202 is a data memory section, 40 is transmission (or reception) data, 41 is a data section, 42 is the interrupt processing information section. In Figure 1, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] 1. A data transmission control unit that controls the storage of received data sent and received from multiple words in a received data buffer unit, and when reception of a large amount of received data is completed, the data in the received data buffer unit is transferred to the received data memory unit. A data transfer control unit that controls the transfer, and when the above received data buffer 1 is stored and data interrupt processing information added to the above received data is set, the above received data is sent to the data processing device. A data interrupt control device, comprising: an interrupt signal generating section that generates an interrupt signal for reading data in a data memory section.