JPS58190742U - Battery voltage monitoring circuit - Google Patents
Battery voltage monitoring circuitInfo
- Publication number
- JPS58190742U JPS58190742U JP8805082U JP8805082U JPS58190742U JP S58190742 U JPS58190742 U JP S58190742U JP 8805082 U JP8805082 U JP 8805082U JP 8805082 U JP8805082 U JP 8805082U JP S58190742 U JPS58190742 U JP S58190742U
- Authority
- JP
- Japan
- Prior art keywords
- battery voltage
- monitoring circuit
- voltage monitoring
- microcomputer
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stand-By Power Supply Arrangements (AREA)
- Electronic Switches (AREA)
- Measurement Of Current Or Voltage (AREA)
- Power Sources (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図ci従来の電池電圧監視回路の構成を示した回路
図、第2図は本考案による電池電圧監視回路の一実施例
の構成を示した回路図、第3図は本考案の動作を説明す
るための波形図である。
記号の説明=D□、D1oは逆流防止ダイオード、R工
。
R2,R10,R11,R12,R,は抵抗、BATは
充電式−電池、SWはスイッチ、D2はツェナーダイオ
ード、Trはトランジスタ、D1□は放電用ダイオード
、v。
は電源電圧、VBは電池電圧、SIGは電池電圧異常信
号、CPUはマイクロコンピュータをそれぞれあられし
ている。FIG. 1 is a circuit diagram showing the configuration of a conventional battery voltage monitoring circuit, FIG. 2 is a circuit diagram showing the configuration of an embodiment of the battery voltage monitoring circuit according to the present invention, and FIG. 3 is a circuit diagram showing the operation of the present invention. FIG. 3 is a waveform diagram for explanation. Explanation of symbols = D□, D1o are backflow prevention diodes, R construction. R2, R10, R11, R12, R are resistors, BAT is a rechargeable battery, SW is a switch, D2 is a Zener diode, Tr is a transistor, D1□ is a discharge diode, v. is the power supply voltage, VB is the battery voltage, SIG is the battery voltage abnormality signal, and CPU is the microcomputer.
Claims (1)
ているマイクロコンピュータにおいて、電源端子とアー
ス間の前記充電式電池の設けられたパスに挿入されて、
−電源が投入された時、前記充電式電池の電圧が前記マ
イクロコンピュータのメモリの記憶情報を保護し得ない
電圧まで低下している場合に制御信号を発する手段と、
該制御信号を受けると前記マイクロコンピュータを初期
状態に復帰させる電池電圧異常信号を発する手段とを有
する電池電圧監視回路。In a microcomputer equipped with a rechargeable battery that protects information stored in memory during a power outage, the rechargeable battery is inserted into a path between a power supply terminal and ground,
- means for issuing a control signal if, when the power is turned on, the voltage of the rechargeable battery has dropped to a voltage that cannot protect the information stored in the memory of the microcomputer;
A battery voltage monitoring circuit comprising means for generating a battery voltage abnormality signal for returning the microcomputer to an initial state upon receiving the control signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8805082U JPS58190742U (en) | 1982-06-15 | 1982-06-15 | Battery voltage monitoring circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8805082U JPS58190742U (en) | 1982-06-15 | 1982-06-15 | Battery voltage monitoring circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58190742U true JPS58190742U (en) | 1983-12-19 |
Family
ID=30096740
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8805082U Pending JPS58190742U (en) | 1982-06-15 | 1982-06-15 | Battery voltage monitoring circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58190742U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01128113A (en) * | 1987-11-12 | 1989-05-19 | Kyushu Hitachi Maxell Ltd | Compact electrical equipment |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55153007A (en) * | 1979-05-17 | 1980-11-28 | Omron Tateisi Electronics Co | Sequence controller |
JPS56111195A (en) * | 1980-02-01 | 1981-09-02 | Toshiba Corp | Memory system |
JPS5742430B2 (en) * | 1975-02-20 | 1982-09-08 |
-
1982
- 1982-06-15 JP JP8805082U patent/JPS58190742U/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5742430B2 (en) * | 1975-02-20 | 1982-09-08 | ||
JPS55153007A (en) * | 1979-05-17 | 1980-11-28 | Omron Tateisi Electronics Co | Sequence controller |
JPS56111195A (en) * | 1980-02-01 | 1981-09-02 | Toshiba Corp | Memory system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01128113A (en) * | 1987-11-12 | 1989-05-19 | Kyushu Hitachi Maxell Ltd | Compact electrical equipment |
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