JPS58190129A - Signal switching circuit - Google Patents

Abstract

PURPOSE:To perform assuredly the switching of signals along with level matching, by unifying a switching circuit part converted into an electronic switch and an amplifying circuit part for the level matching. CONSTITUTION:The 1st signal of a high level and the 2nd signal of a low level are supplied to the 1st and 2nd transistors TRQ1 and TRQ2, respectively in response to each base. One of these two TRQs are substantially set under an active state with the other one set under a nonactive state with a switching signal supplied selectively. Then the 1st signal is kept at its level as it is in the active mode, and at the same time the 2nd signal is amplified up to the same level as the 1st signal in the active state of the 2nd signal, respectively. Thus these signals can be delivered.

Description

[Detailed Description of the Invention] [Technical Encapsulation of the Invention] This invention is applicable to electronic equipment in general, including company I# equipment, etc.
This invention relates to a signal switching circuit that can perform

[Technical background of the invention]

As is well known, electronic devices in general, including Goro devices, use various signals. An Il conversion circuit is used. Incidentally, in this case, it is often necessary to perform level matching rather than signal switching.

Figure 5%1 shows a typical example of a signal switching circuit that requires such level matching and is found in industrial equipment. f' That is, this is the case of a recording/playback switching circuit of a table fooder having a noise reduction circuit.

Now, in this circuit, the edge piece regeneration selector switch 8 - S5
It is assumed that PLAY is set as shown in the figure. In this state He Sodo JJ
If the induced voltage of is -70 dB and the gain of the head amplifier and ifraiser amplifier 12 is 48 dB, then the increase is 111iI! The output level of '412 is -22 dB.

Then, the output terminal of the noise reduction circuit 13 which processes the reproduced signal (0 is the reference level (580 mV:
-4.7 dB) (Secondly, assuming that the noise reduction circuit 13 itself has a gain of 16 dB, the input terminal of the noise reduction circuit Z3 [
phase], the level must be -80.7 dB, so one stage of the σ) level must be -8.7 dB attenuator 14.
It is necessary to insert f.

That is, in this way, during reproduction, a signal of -4.7 dB is derived to the regenerative amplifier (not shown) and the line output terminal (LINE-011T) (monitor output car M-01+'l'3).

On the other hand, the recording/playback selector switches 81 to S1 are set to record (age).
) side, the line output terminal (L I
NW-OTJT), the edge piece No. 4g from the microphone I5 and the microphone amplifier 16 is connected to the amplifier 12.
(-22 dBσ) voltage level is derived as is.

However, if this continues, the line output @ (LIN
At the electric ratio level derived from E-Ull'l''), it is impossible to simply switch the signal, and it is necessary to take into account the level adjustment of the artist's thread.

For this reason, conventionally, one is added to the recording signal system as shown in Figure 2.
7.8 dB (+Insert amplifier 17 to correct the level difference T
By doing so, it was possible to switch signals along with level matching based on painter's level.

In addition, 18 in the figure @1 is the device for the Rokugata bias generator 1), 1
9 is a trap circuit, and -20 is an amplifier, to which the 11 bias signal and the green signal are supplied respectively.
It has the role of

[Problems with fishing on your back]

However, in conventional signal switching circuits such as those described above, a switch and a dedicated amplifier must be used and modified separately in order to switch signals with level matching. However, the structure became complicated.

[Purpose of the invention]

Therefore, this invention was made in view of the above points, and provides an extremely good signal switching circuit that has been improved so that signal switching with level matching can be reliably performed with the simplest possible configuration. is intended to provide.

[E-essentials of invention]

That is, in the signal switching circuit according to the present invention, a high level first signal and a low level second signal are connected to each base 1:
the correspondingly supplied first and '#&2 transistors are controlled by selectively supplied switching signals to substantially control one in an operative state and the other in an inoperative state; Now, by configuring the signal I81 to be amplified and derived to the same level as the first signal while the signal I81 is at the same level and the $201) transistor is in operation, it is possible to substantially It is characterized in that it integrates a switching circuit section that can be used as a secondary switch and an amplifier circuit section for level matching.

[Example of actual invention]

Embodiments of the invention (Q)-- will be described in detail below with reference to the drawings. In FIG.
A second input terminal is to which a reproduction signal of a tape recorder having a tape recorder is applied.

These first and second input terminals IN, , IN.

are the first and second transistors Q 1 +Q respectively
0) Connected to each base accordingly.

Here, F1 and the second transistor Q+.

Qz)! , each of their lefters is connected to the power supply V...3 through a resistor 1*R*, and their emitters are commonly grounded through a resistor R1.

Further, the emitter of the first transistor Q+ is connected to an output terminal 011T1 which is used for monitor out and line out, for example, via a diode D1 of the polarity shown, a capacitor C, and a vfi column.

0TIT, are commonly connected.

The base of the second transistor Q3 is grounded via a resistor F4 and also connected to a resistor H.

For example, a switch 811 (one end of which is connected to a switch 811 which is closed only when a switching signal is supplied selectively through a switching signal) is connected to one end of the switch 811, and the other end of which is connected to a power supply VDD. ing.

Further, the midpoint of the connection between the iTg diode D1 and the capacitor C1 is grounded via a resistor R, and is also connected to the flip-flop of the second transistor Qm via a capacitor 08, and further via a resistor R7. Sui Sochi S
tt.

In the above configuration, for example, in the reproducing state, since the switch 811 is open, switching (No. 8) is not applied, so the pace of the second transistor Q: is at the ground level.

In this case, if the base potential of the first Q1 transistor Q1 is maintained at 0.7 V or higher by the signal '#41 from the first input terminal IN, the first Q1 transistor Q1 becomes in an operating state. In this state, the transistor Q1 acts as an emitter follower and transfers the lth signal to the diode D1.
, the first and second output terminals 01 via the capacitor CIv
1T1゜01) 1' is derived from Yuki.

In addition, in this state, the emitter potential of the second transistor Q is pulled up to near the output side of the diode D1 (since it is in a non-operating state,
The second number 48 from the input terminal IN2 of is never derived.

Next, for example, if it is said that the recording state has been set, switch S1
1 is closed and a switching signal is supplied.

Then, the base potential of the second transistor Qs is higher than the emitter potential, that is, the potential difference (vt+g->O,'7~08V), which increases the bias current V, so that the current cut-off region It is in a state where it operates in the active region.

As a result, the second signal supplied from the second Q) transistor Q@O)7 through the second input terminal IN is amplified to approximately the same level as the 177'' signal and is derived. Yo I: It becomes.

The second signal with level adjustment as shown in 0) is supplied to the output terminals 0TITl and 0TJT of the first and second output terminals ``''C through the capacitor Cs*Cmv.

In addition, in this state, the diode D1 is reverse biased by the switching signal and is in the blocking state, so the diode D1 is in the blocking state.
The signal is blocked from being led out beyond the emitter of the first transistor Qs.

It goes without saying that the present invention is not limited to the embodiments described above and illustrated, and that various modifications and applications can be made without departing from the gist of the present invention.

〔Effect of the invention〕

Therefore, as described in detail above, according to the present invention, signal cutting with level adjustment is possible with an extremely easy configuration. I
! It is now possible to provide an extremely good No. J switching circuit that has been improved to reliably perform the following.

[Brief explanation of drawings]

Figure 1 is a block diagram showing a typical circuit example of a company that requires signal switching with level matching, and Figure 2 shows a specific example of Figure 1. , Fig. 3 is a main part υ) configuration diagram showing an embodiment of the signal switching circuit according to the invention. , ~l<,...resistance, C1*C1"
'Conden → A, D,... Die, Sit...
・Switch, ~i13・′岨聒.

Claims (1)

[Claims] a first signal at a low level and a second signal at a low level are respectively supplied to each base of the first and second transistors; and means for selectively supplying a switching signal to control the other transistor to a non-operating state.
The 01 signal remains at the same level and the second +1111
) A signal switching circuit configured to be able to amplify and derive the second signal to the same level as the first signal in an operating state of the transistor.