JPS58186867A - Disk cache control system - Google Patents

Abstract

PURPOSE:To prevent double storage and cache-out operation, by preventing to process the same data, and inputting data in a cache memory when the data becomes unnecessary in a main storage device, in a system which performs hierarchic control over data. CONSTITUTION:When a page that a central processing unit 4 requires is not in the main storage device 1, page-in operation is carried out. When a page in a slot resides in the cache memory 7, page data is transferred to a main storage page frame 2 and the cache page frame from which the page is sent out is freed. If such an error of reading that there is not the page in the slot occurs, page data to be found is paged in the main storage page frame 2 from a slot 15. In case of an error of writing, the allocation of a page frame is performed in the cache memory 7 and data is transferred. Cache-in operation is carried out only in case of an error of writing, so no write hit occurs.

Description

DETAILED DESCRIPTION OF THE INVENTION Object of the Invention The present invention relates to a disk cache control system, and in particular manages a central processing unit or a main storage device, a disk, and a full-level storage device, and manages all data between the storage devices in a predetermined manner. The present invention relates to a disk cache control method suitable for a system in which migration is performed in units of management.

Conventional disk caches attempt to compensate for the speed difference between the main storage device and the disk by placing memory (cache memory) whose speed and capacity are intermediate between the two main storage devices and the disk. It is something to do. In principle, the data on the disk that is frequently read/written is controlled so that it resides in the cache memory as much as possible, thereby reducing the overall read/write time to the data on disk F. .

Figure 1 shows the movement of data between disks, cache memory, and main storage. Disk cache is applied to both paging disks and business data disks, but is it the present invention? ,t As mentioned above, if the central processing unit or main storage device and disks are managed hierarchically,
In other words, it is useful when the same data is moved between main storage and disk, and the operating system always manages where it resides.
The following explanation will be based on the paging disk gold side.

Data movement is performed in units of a fixed size called pages, and as shown in Figure 1, the main storage device 1, cache memory 7, and disk 14 are logically divided into page frames of the same size as the page. has been done. The exchange of page data between the disk subsystem 6, which includes the cache memory 7 and the disk 14, and the main storage unit 1 is called page-in (indicated by an ○ to the arrow). - Called out (indicated by A).

In addition, new page data is entered in the page frame 8 of the cache memory 7. All cache-in (arrow D0
Not shown. ), and when a page and data come out of the page frame 8 of the cache memory 7 and the page frame 8 is released, it is called a cache out (indicated by arrow D2).

When a read/write request is issued to the disk, if the target page exists in the cache memory 7, it is called a hit, and if it does not, it is called a miss.

When a read request is issued and (3) it is a miss, it is called an all read miss (indicated by arrow B), and in this case, the corresponding page is read on all disks 14.
The data is read from and transferred to the main memory g1, and also stored in the cache memory 7.

In the case of a read hit (indicated by arrow B0), if data is transferred from cache memory 7 to main memory W1? Since the data is transferred in a &-contact manner, unlike when reading from the disk 14, there is no mechanical waiting time, and the time required for reading is significantly shortened.

In the case of a write error (indicated by an arrow 0□),
Only writing rr is done to the cache memory 7, and no writing is done to the disk 14 at that point. In the case of a read F hit (indicated by arrow C), as in the case of the read hit, there is no data transfer to/from the disk L, and the required time is shortened. Note that this also applies in the case of a write miss if there is a usable page frame in the cache memory 7.

In case of read miss and write miss, the corresponding page □
- It becomes necessary to create a new file on the entire cache memory 7. Here, if there is no free page in the cache memory 7, all pages considered to have the lowest probability of receiving a read/write request are cached out from the cache memory 7 to the disk 14. To determine which pages should be cached and deleted, a matrix is created in order of the longest unused period, and the most important pages are to be cached out.

The following is an outline of the operation when a cache memory sound is used as a paging disk, but two problems arise here.

The first problem is that a large number of identical pages end up existing in the main memory device 1 and the cache memory 7. For page data? -1, for those with data in main storage 1#1, the disk
Since no read/write requests come to subsystem 5, as mentioned above, if all the same pages are retained during vehicle inspection, the hit rate will be very poor, and the effect of using cache memory 7 will be low. does not appear. This situation is especially true when there is not much difference in size between the cache memory 7 and the main storage device ll, and the cache memory 7 cannot hold all pages other than those existing in the main storage device ll in the large gutter. noticeable.

The second problem concerns cache ordering. A read miss/write miss occurred, but the cache
If there are no free page frames in the memory 7, or if the number of free page frames is below a certain level, the data will be transferred from the page frame on the cache memory 7 to the page frame on the disk 1, as described in % nil. need to be cashed out.

In this case, which page frame to completely replace can be determined using the method described above (
I, RU method). However, under traditional operating system control, if the page has not been modified while in main memory, it simply
Only the page frame in the main storage device 1 is released, and no write command is actually issued to the disk subsystem 5.

For this reason, the disk subsystem δ side does not know that the pages that have not been depleted have been paged out, and it becomes impossible to maintain the correct matrix for the cache out. In other words, pages that have no previous history are considered to be accessed less frequently than pages that have been changed and paged out, and tend to become the target of cashing out and become islands.

Purpose of the Invention The present invention was made in view of the above circumstances, and its purpose is to solve the above-mentioned two problems in the conventional disk cache control system - overlapping between the main storage device and the cache memory. An object of the present invention is to provide a disk cache control method that eliminates 4m-+ cache outs for pages that have not been stored or modified.

The above object of the present invention is to have a cache memory that is placed between a main storage device and a disk device and holds a part of data stored in the disk device, and to perform hierarchical management of all data in a predetermined management unit. In a system in which the cache memo does not retain all of the same data as the data stored in the main storage device, the data is stored once the data is no longer needed in the main storage device. Mouth 1
This is achieved by a disk cache control method characterized by storing data in a cache memory.

In the present invention, overlapping storage between the main memory storage ν and the cache memory is handled by a cache management method as shown in Figure 2. Exclude.

That is, in the event of a read miss, all data is transferred directly from the disk 14 to the main storage device, and no cache-in is performed (see arrow B2). At the time of a read hit, all data is transferred from the cache memory 7 to the main storage device 1, and after this transfer, all page frames of the cache memory 70 are released (see arrow B1). Also, in the event of a write miss, all free page frames in the cache memory 7 are allocated and all data is transferred from the main storage unit W1 to the free page frames in the cache memory 7 (see arrow c2).
. ′Cache-in is the above write miss σ)
This is done when reading, but not when reading. When a page is written out without writing, the page does not exist in the cache memory 7, so no write hit occurs.

According to the above mfMj, the page sent to the main memory w1 is released from the cache memory 7 and remains in the main memory 1-hi and the cache until a write miss occurs due to page out. - The same page will no longer exist in the memory 7.

Regarding the cache-out order problem, as long as the above logic is followed, a write miss will always occur when a page is out, and a cache-in is required. Regardless of whether or not the page data has been changed, the page data must be transferred from the main storage device i1 to the cache memory 7 by a write command.

The page frame to which the write command has been issued is placed at the end of the cache-out queue, so that access intervals can be managed correctly.

Embodiments of the present invention will be described in detail below with reference to all the drawings.

Embodiment of the Invention FIG. 3 is a block diagram of a disk cache system showing one practical example of the present invention. The main memory device 1 is logically divided into main memory page frames 2, and programs and data are stored in page units.

A main memory page frame table 3 is provided to hold reference/change information for each page and to form a page out queue for page outs. 4 is a central processing unit, and data in units of pages is exchanged between the main memory wl and the disk cache subsystem 5 according to instructions from the central processing unit 4.
In/page out is performed.

Cache memory 7 is logically divided into cache page frames 8 and holds all transferred page data. Reference/change information for each cache page frame 8■6t
- The cache page frame table 9 is cleared to maintain and create a cache out queue that determines the order of cache outs. Further, 14 is a disk, which is divided into slots 15 of the same F and size as the page, and holds all page data.

10 is a paging disk director; channel control circuit 11. It has a cache memory control circuit 12 and a disk control circuit 13, and has a central processing unit σ4 and a disk 14. All data transfers to and from the cache memory 7 are controlled.

The entire operation of this embodiment configured as described above will be explained below.

The cache memory control method is basically as shown in FIG. When a page required by the central processing unit 4 ends up in the main memory 1 (page fault), page-in is performed after all main memory page frames are secured. That is, a command is issued to the disk cache subsystem 5 to visit a certain slot and perform a read operation. If the page in the slot exists in the cache memory 7 (read hit)
, main memory page (1) from the corresponding cache page frame 8
1) To frame 2, cache memory control circuit 12. Channel control circuit 11. The desired page data is transferred via the entire central processing unit 4, and at the same time, the cache page frame from which all the page data has been sent is released, and this fact is registered in the cache page frame table 9.

If the page in the slot does not exist in the cache memory 7 (read miss), the disk control circuit starts from the corresponding slot]3. Channel control circuit 11. The desired page data is paged into the 1,000-hour memory page frame 2 of the main memory 1 via the central processing unit 4. At this time, no cash-in is performed.

The entire process described above is shown in the flowchart of FIG.

Also, for reference, a flowchart of conventional processing t-
It is shown in Fig. If the page is paged in as shown in FIG. 4, the page will never exist in the cache memory 7, so that overlapping storage can be avoided.

When a shortage of main memory page frames in the main memory Nl occurs α2), the central processing unit 4 updates the main memory page frame table 3
After all references are made, all empty page frames are created as page-out targets, starting from the first page in the page-out queue (in the case of the LRU method, the page that has not been referenced for the longest time). The first processing method when a page out occurs is as shown in the processing flow in Figure 6 (A), regardless of whether the page has been changed or not.
A write command is always issued to all disk cache subsystems 5. Since the page data to be paged out does not exist on the cache memory 7 and will always result in a write miss, the page data is paged out by referring to the cache out queue in the cache page frame table 9. After determining the frame r, from the main memory page frame, the central processing unit w4. A page is transferred to the cache page frame in the cache memory 7 through the channel control device fall and the cache memory control circuit 12Thu.
Transfer all data.

The second processing method when a page out occurs refers to the main memory page frame table 3 to determine whether the page has been changed or not, as shown in the entire processing flow in FIG. 6(B). If this is a popular page, then from the main memory page frame as above, and if it is a page that has not been changed, then from the disk.
All data is transferred to the network memory 7. In the latter case,
Simultaneously with the data transfer, notify the cache page frame table 9 that a page out without any changes has been performed,
Place W in the cash-out queue on the front page frame. For reference, a flowchart of the conventional process is shown in Figure 7. Figure 6 (A).

By performing page out as shown in (B), the cache out order can be made to correspond accurately to the access frequency.

- In the process described in F, when writing to the cache memory 7, writing to the corresponding slot on the disk is not performed, and eventually this cache page frame will become a cache memory.
A so-called write-after method can be used in which the data is written to the disk at the time the data is written out.

Effects of the Invention LZJThe above-mentioned tIr+<, according to the present invention, the guest of honor 1. There is a cache memory placed between the storage device and the disk device that holds part or all of the data that is not stored in the front blind 14 disk device. In a system in which data is hierarchically organized in a predetermined management unit, the cache memory does not hold all of the same data as the data stored in the main storage device W, and When the data becomes invalid in the storage device, the data is put into the cache memory, which eliminates the problem with the conventional disk cache wholesale control method and eliminates the problem of the main storage, cache memory, and The disks can function as memory arranged contiguously in order of read/write frequency (see Figure 9), and the cache
The full effect of all memory paging disks can be exerted. In particular, in cases where it is difficult to increase the total capacity of the main memory device due to limitations on the number of bits of the main memory address, etc., the effect is extremely large.

[Brief explanation of the drawing]

Paper 1 Figure 2: Is there a problem with cache memory in traditional paging disk systems? Figure 2 is a diagram showing the entire operation of using a cache memory in a paging disk system based on the control method of the present invention, Figure 3 is a diagram showing an embodiment of the present invention, and Figure 4 is a diagram showing the embodiment of the present invention. , or Figure 6 (A),
(B) is a processing free charge of the 911th embodiment, FIGS. 5 and 7 are processing flowcharts of the conventional example, and FIG. 8 is a diagram showing the relationship between each temporary memory level. 1: Main memory device, 2: Main memory page frame, 3: Main memory page frame table, 4: Central processing unit v, 5 = Disk cache subsystem, 6: Disk cache control device, 7: Cache memory , 8: Cache page frame, 9: Cache page frame table, 10: Paging disk director, 11: Channel control circuit J2: Cache memory control circuit, ■3: Disk control circuit, 14: Disk, 15 Nislot ,A1(1
6) Two pages in, A: Page out, B1: Read hit, B2: Read miss, 0□ Two right hits, 0. Nirite Miss, Do: Cash In, D
: Cache act, F: Read/write frequency. Figure 1 Figure 2 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] In a system that has a cache memory that is placed between a main storage device and a disk device, holds a portion of data stored in the disk device, and manages all data hierarchically in a predetermined management unit, the cache memory The memory does not hold all the same data as the data stored in the main memory, and when the data is no longer needed in the main memory, the data is placed in the cache memory. 'Disk cache control method with four characteristics.