JPS581853Y2 - magnetic recording and playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a magnetic recording and reproducing device, and particularly to a DC bias noise reduction circuit.

The DC bias noise reduction circuit for magnetic recording and playback equipment was the first
It is assumed that the configuration shown in the figure is normal.

That is, in FIG. 1, 1 is a recording amplification circuit, which is connected to a recording head 3 through a bias trap circuit 2, and the connection point between the bias trap 2 and recording head 3 is a capacitor C4 and a variable resistor. The erasing head 4 is connected to one end of the erasing head 4 through a series circuit of the transformer R2, and the erasing head 4 is connected to the transformer T.

A high frequency bias oscillation circuit 5 is connected to the primary side of the transformer T.

This high frequency bias oscillation circuit 5 includes a transistor Tr.
1. Tr2 constitutes a push-pull type conbit oscillator, and a variable resistor R1 is connected to the emitters of transistors Trl and Tr2 so that the waveform can be adjusted.
The variable resistor R1 was adjusted so that the distortion of the high frequency bias current was minimized or the DC bias noise on the magnetic tape was minimized.

However, in this device, even if the distortion is adjusted to the minimum, the noise is not necessarily minimized, and sometimes the adjustment cannot be made within the adjustment range, or it is difficult to minimize the noise. However, since the bias waveform is greatly distorted1, harmonic distortion increases,
This had the disadvantage of increasing leakage current to the external circuit, and at the same time, the efficiency of the oscillator deteriorated.

These drawbacks arise because the canceling DC source is not directly connected to the magnetic head, but is coupled via a transformer or a capacitor, as will be described later.

Furthermore, when recording multiple tracks on a single magnetic tape due to a common high-frequency bias source in conventional equipment, it is impossible to adjust individual channels, and the average value of the DC deviation noise of all channels is Since it is tuned to a minimum, it has the disadvantage of resulting in a noisy overall result.

The above-mentioned drawbacks of conventional devices arise from the idea that noise based on DC bias is caused by distortion of the high-frequency bias current flowing through the erasing head or recording head. Based on the discovery that the cause of the noise is rather due to the material constituting the magnetic head, the present invention provides a DC bias noise reduction device suitable for this phenomenon.

The magnetic DC bias phenomenon caused by the above-mentioned materials is that when an alternating current is passed through a coil wound around a core made of magnetic material, the magnetic flux generated from the gap in the magnetic material core has a slight direct current bias. This phenomenon is thought to be caused by external stress applied to the magnetic material, internal stress remaining inside the magnetic material, etc., and cannot be removed using a bulk eraser or the like.

Hereinafter, one embodiment of the noise reduction device of the present invention using the DC bias phenomenon caused by the above-mentioned magnetic material will be described in detail with reference to FIG. 2 and subsequent figures.

Figure 2 shows the case of a two-channel magnetic recording and reproducing device.
Components that are the same as those in FIG.
L.

2R prevents the high frequency bias from the high frequency bias oscillation circuit 5 from flowing into the recording amplification circuits 1L and 1R, and the capacitor C4RIC4L prevents the recording signal from flowing into the erasing head 4L,
It is for low frequency cutoff to prevent it from flowing into 4R,
Variable resistor ■R2L.

(2) R2R is for adjusting the high frequency bias current applied to the recording heads 3L and 3R.

A resistor 6L is connected between the transformer T and the erase heads 4L and 4R.
, 6R are connected and is further surrounded by a dotted line 7L.

Diode DI L s D2L t DI shown as 7R
R+D2R is connected to variable resistors VR3L and VR2H so that DC bias current can be applied to the erase heads 4L and 4R independently.

The operation of the configuration as described above will be explained.

In a general recording state, if we consider an arbitrary point on a magnetic tape, this point passes over the erasing head to which a high-frequency current is applied, and then passes over the recording head to which the high-frequency current and recording current are superimposed. It is made to pass over the top.

At this time, as mentioned above, the magnetic tape receives a slightly DC-biased magnetic field due to the operating gap between the erasing head and the recording head, and receives DC magnetization, which is a factor that causes large background noise in addition to recording signal magnetization.

As described above, this phenomenon occurs even when the high frequency bias voltage applied to the erasing head and the recording head is completely free of distortion.

In Fig. 2, for example, when measuring the DC bias noise on the L channel side and moving the movable piece of the variable resistor VR3L to one of the fixed ends of the diodes DtL I D2L, there is a minimum point of the noise. do.

Now, if the movable piece of the variable resistor is positioned from the center to the fixed end, that is, toward the diodes D, L, and D2L, the current flowing through one of the diodes D, L, and D2L will flow through the other diode D.
The current flowing in 2L + DIL increases, and the current in the direction of 9L and 8L consumed by the circuit 7L inserted in parallel with 4L increases, equivalently increasing the high frequency bias current of the erase head in 11L and 10L. This means that the DC currents in the indicated direction are superimposed.

Therefore, the DC bias magnetization mentioned above can be substantially canceled out.

Incidentally, in the above explanation, the case of the L channel has been explained, but it is clear that the operation is exactly the same for the R channel.

Next, if the DC bias noise reduction circuits 7L and 7R shown by dotted lines in FIG. 2 are represented by DC current sources, they can be expressed as shown in FIG. 3.

The current ■ generated from the current source 12 in FIG.
The ratio of branching to L and 4R is calculated as follows.

In this equation, 11 = DC current 12 flowing through the erasing head 4L - DC current RH flowing through the erasing head 4R - 2 of the transformer T with the winding resistance of the erasing heads 4L and 4R.
R - the resistance value of the resistors 6L and 6R is approximately equal to the next winding resistance Rj, and this equation calculates the resistance value R of the resistors 6L and 6R connected in series to the erase head 4L and
If it is more than three times the winding resistance RH of 4R, it shows that one adjustment in each channel will not affect other channels. In general, the winding resistance RH of erasing heads 4L and 4R and transformation. Vessel T
The resistance value of the secondary winding is a low value of about 0.2 to 0.3Ω, and the resistors 6L and 6R inserted in series with the erasing heads 4L and 4R are the direct current resistance of the lead wire. Since the value is small enough to be shared, it can be ignored as a load on the high frequency oscillation circuit.

Furthermore, the direct current deviation of the magnetic material of the head is generally very small, and is only the number φ of the effective value of the high-frequency current flowing through the erasing heads 4L and 4R. VR3L t VR3R and diode D1L
+D2L+DIR+The current flowing through D2R only needs to be a few high-frequency current values, and this can also be ignored as a load on the high-frequency oscillation circuit.

Also, the portions 7L and 7R surrounded by dotted lines are variable resistors V R2
The influence on the recording amplification circuits 3L and 2R can be ignored by L t V R2H and the capacitor C4LIC4R.

As described above, according to the present invention, the source of the DC component is directly connected to and inserted into the erasing head, so that the noise component can be canceled out extremely efficiently compared to conventional devices.

In the above case, a diode and a variable resistor are inserted in parallel with the erase head, but they can also be connected in series with the erase head as shown in FIG.

In this case, it goes without saying that the capacitance of the variable resistor and diode must be selected to be large.

[Brief explanation of drawings]

Figure 1 is a conventional DC bias noise reduction circuit, Figure 2 is the DC bias noise reduction circuit of the present invention, Figure 3 is an equivalent circuit diagram of the dotted line in Figure 2, and Figure 4 is another example of the dotted line. FIG. In the figure, 1, IL, 1R are recording amplification circuits, 2゜2
L and 2R are bias traps, 3, 3L and 3R are recording heads, 4L and 4R are erase heads, 5 is a high frequency bias oscillation circuit, 6L and 6R are resistors, and 7L and 7R are DC bias noise reduction circuits.

Claims (1)

[Scope of utility model registration request] In a magnetic recording/reproducing device in which a bias from a high frequency bias circuit is applied to a plurality of recording heads and an erase current is applied to a plurality of erase heads, the erase current from the high frequency bias circuit is applied to a plurality of erase heads via a first resistor. a first DC bias noise reduction circuit comprising a plurality of diodes connected in opposite directions to both ends of a variable resistor in series or in parallel with the first erase head; is connected in such a way that the erasing current is applied to the second erasing head via a second resistor, and a circuit similar to the first DC bias noise reduction circuit is connected in series or in parallel to the second erasing head. A second DC bias noise reduction circuit is connected, and a capacitor is interposed between the high frequency bias circuit and the recording head to prevent the inflow of current from the DC bias noise reduction circuit, and the first and second DC bias noise reduction circuits are connected to each other. A magnetism characterized in that the value of the resistor is set to three times or more the value of the winding resistance of the first and second erasing heads to eliminate the DC bias phenomenon caused by the magnetic material of the magnetic head. Recording and playback device.