JPS58181087A - Picture display system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a screen display method for displaying characters, figures, and graphs by supplying pattern information read from a memory to a screen display device.

In recent years, among devices for displaying characters and graphics, those equipped with a CRT display section have become useful because of their display speed and their ability to display multiple images at once. Conventionally, when displaying characters and graphics on a CRT screen, a dot pattern memory corresponding to character pattern display for one screen of the CRT was provided and dot pattern information of the characters, graphics, and graphs was stored in this memory. Therefore, figures and graphs are also displayed using the dot density of the CRT screen that displays character patterns, so for graphic display purposes, the dot density on the screen is coarse, making it difficult to express accurate figures and graphs. was. The present invention was developed in view of the above points, and its main purpose is to display figures and graphs on the screen with a high display dot density that is more accurate and easy to see, and to support the display of character patterns for one screen. Dot pattern memory
When displaying one figure or graph, store pattern information for one continuous screen in any integer i (i≦n) of the above n memories, and display this on the - screen as a character. Display is performed at a display dot density that is i times that of display.

Another object of the present invention is to enable, in the case of character display, each of the n memories to store character pattern information for one screen independently, so that these can be arbitrarily selected and displayed one screen at a time on the display screen. It's about doing.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. 1st
The figure is a block diagram showing an embodiment of the present invention, in which 1 and 2 each represent a dot pattern memory corresponding to character pattern display for an ordinary CRT screen. 3.4 is a display register for converting the parallel outputs 01 to On of the pattern information read from the dot pattern memory 1.2 into a serial video signal synchronized with the scanning line of the CR7 display section 6. Reference numeral 5 denotes an output selection section for selectively outputting the serial video signal from the display register 3.4 to the CR7 display section 6, and is controlled by a display register selection signal S. 7 is a clock pulse generator that generates a clock pulse for driving the display register 3.4 in synchronization with the scanning line of the CR7 display section 6, and is used to determine the display mode (character or graphic display).
It has a function of changing the repetition rate of clock pulses to 1:2 according to the selection signal M.

Now, the approximate timing when character pattern information for one independent screen is stored in the two dot pattern memories 1 and 2 using one or more configurations, and these are arbitrarily selected and displayed one screen at a time at the normal character display dot density. The 0 display mode selection signal M (negative=
A display register drive clock pulse C having a frequency corresponding to the character display) and a CR clock pulse C in synchronization with the clock pulse C.
7. The timing relationship with the video signal output to the display section 6 is shown in an enlarged manner. Parallel pattern information of characters read from the first read address of the dot pattern memory 1 is stored in the display register 3. The serial video signal from the display register 3 driven by the clock pulse C is sent onto the uppermost horizontal scanning line of the CR7 display section 6 when the display register selection signal S of the output selection section 5 is negative. The clock pulse C has a frequency f such that when one horizontal scanning line on the CRT screen finishes scanning the entire screen, the contents of the display register 3 are all output and become empty. Similarly, the character parallel pattern information read from the second read address of the dot pattern memory l is
displayed on the second horizontal scan line on the screen. Thereafter, the same process is repeated, and the parallel pattern output read from the last read address of the memory I is displayed on the bottom scanning line on the CRT screen, thereby completing the display of one screen sentence. In synchronization with the end of the display for one screen of the dot pattern memory 1, the character pattern information of the dot pattern memory 2 is similarly displayed on one screen of the CR7 display section 6 by setting the display register selection No. 9 S to positive. can be displayed. Figure 2(b) is a schematic timing diagram when figures and graphs are displayed on a CRT screen at a display dot density twice that of the above, which corresponds to the display mode selection signal M (positive = graphic display). a display register driving clock pulse 2C having a frequency 2f;
The relationship with the video signal 2D which is output to the CR7 display section 6 in synchronization with is shown in comparison with FIG. 2a).

Continuous 1s stored in dot pattern memories 1 and 2
The form of the graphic pattern information for the screen is C in Figure 1.
Screen areas A and B shown on the R7 display section 6 are stored in the dot pattern memory 1.2 in correspondence so that they are combined to form one screen. This process will be explained in detail below.

The graphic pattern information read from the first read address of the dot pattern memory 1 is stored in the display register 3. The serial video signal 2D from the display register 3 driven by the clock pulse 2C is sent onto the uppermost horizontal scanning line of the CR7 display section 6 when the display register selection signal S of the output selection section 5 is negative. The graphic pattern information read from the first reading address of the dot pattern memory 2 is stored in the display register 4, but the serial output from the register 4 is suppressed because the negation signal 100 of the display register selection signal S is positive. ing. The contents of the display register 3, which is driven at a frequency 1k2f (7) clock pulse 2C, which is twice the frequency of a constant scanning line speed, is such that the first horizontal scanning line is at the horizontal midpoint on the display screen. At this point, if the display register selection signal S changes from negative to positive, the serial video signal 2 from the display register 4 will be empty.
D is displayed on the remaining scanning line from the midpoint on the first horizontal scanning line. Similarly, the graphic pattern information read out from the second readout addresses of dot pattern memories 1 and 2 is displayed on the second horizontal scanning line on the CRT screen. After that, repeat the same process to
．． The graphic read from the last read address of 2.
By displaying turn information on the scanning line at the bottom of the CRT screen, display areas A and B shown on the CR7 display section 6 in FIG. 1 are continuously combined to display one screen. end. In this way, the pattern information of figures and graphs is CR with a display dot density twice that of text display.
This will be displayed on the T screen.

In this embodiment, we have described a device with two character pattern memories, but if we add two more character pattern memories for a total of four, and add a function to double the density of horizontal scanning lines, we get the following: The contents of the four character pattern memories mentioned above are shown in display areas A, B, and CRT screen on the CRT screen shown in FIG.
It can be easily extended to display corresponding to C and D.

Therefore, according to the present invention, an independent n
By providing a character pattern memory for each screen, for example, if you want to change part of the display data on the screen that is currently being displayed, you can instantly prepare the changed screen information in the empty character pattern memory. It has the advantage of being able to switch screens. Furthermore, the ability to store large groups of character information over multiple screens in advance in multiple character pattern memories and quickly select and display them on the screen at will facilitates information retrieval on the display screen. Furthermore, when displaying figures or graphs, it is possible to provide a screen display method that has the effect of displaying more accurate and easier-to-read graphics by multiplying the display dot pitch on the display screen by an arbitrary integer i (i≦n). .

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 (
a) CR the character pattern with normal character display dot richness
Schematic timing diagram when displaying on the T screen. FIG. 2(b) is a schematic timing diagram when displaying figures and graphs on the screen at twice the display dot density of character display. FIG. 3 is a front view of the CR7 screen showing an example of expansion of this embodiment. Here, 1.2... dot pattern memory, 3°4.
...Display register, 5...Output selection section, 6...CR
T display section, 7... Clock pulse generator.

Claims (1)

[Claims] n memories that store pattern information of a size equivalent to one screen, a display mode that stores independent pattern information of one screen each in the n memories, and arbitrarily selects and displays these one screen at a time; One continuous screen worth of pattern information is stored in an arbitrary number i of n memories, and this is stored once per screen.
A screen display method characterized by having a display mode that displays at twice the display dot density.