JPS5818027B2 - Shingodensouhoushiki - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention samples an analog signal, converts each sampled value into one word of digital value, and obtains a PCM signal in which each word consists of a parallel or series/parallel code string. The present invention relates to a signal transmission method in which the PC''M signal is transmitted through a plurality of transmission paths corresponding to the number of parallel code strings.

In a tape recording and reproducing device (for example, a magnetic tape recording and reproducing device that handles parallel encoding (i.e., handles parallel pcMm signals)), an analog signal as an input signal is encoded into a parallel pulse signal using a pulse code modulation method, and then recorded and reproduced. Taking the case of playback as an example, we will explain below when recording and playing back signals using this method, dropouts may occur due to defects in the magnetic tape, dust on the tape or in the head, etc. In particular, since there is a high possibility that signals on the same track will be lost consecutively, high-fidelity reproduction becomes difficult.

Recording and reproducing devices using the parallel PCM system have the above-mentioned defects, but to describe their characteristics in more detail: (1) The signal of the same track is continuously lost.

□(2) The probability of code loss due to dropout for each track is equal to .

(3) There is a very low possibility that code errors will occur on two tracks at the same time.

It has the following characteristics.

Such a tendency generally occurs in wired or single-line transmission paths other than recording/reproducing devices.

□Figures 1A and 1B show the conventional parallel P
A signal transmission circuit for a recording system and a reproducing system of this type of recording/reproducing apparatus based on the CM system is shown.

First, to describe the recording operation based on FIG. 1A, an analog signal, which is the original information signal, is supplied to the AD converter 1, and as output signals of the AD converter 1, the output signals of the AD converter 1 and 1 are outputted using signals with different weights, for example, the NRZ system. (parallel 4-bit) PCM signal is obtained.

This parallel PCM signal is transmitted to the DM modulation circuit 2 a y2b,
2c and 2d, the signal is DM modulated and the recording amplifier 3
After being amplified in widths a, 3b, 3c and 3d, the recording heads 4a, 4b, 4c and 4d record on the respective tracks of the magnetic tape.

DM modulation<Delay Modnlation)
means that the pulse signal is inverted at the center of the bit cell for a code "1", the state of the previous bit cell is continued for a code "0", and the clock is reversed for two or more consecutive codes "0". This is a modulation method that inverts the pulse signal for each pulse.

Next, to describe the reproduction operation based on FIG. 1B, the reproduction head 5a, sb,
The parallel PCM signals regenerated by 5c and 5d, respectively, are transmitted to regeneration amplifiers 6a and 6b.

After being amplified in 6c and 6d, the DM demodulation circuit 7a
, 7b, 7c and 7dVc, respectively, into parallel PCM signals before DM modulation, and then converted into analog signals by the DA converter 8.

In a signal transmission system configured in this way, if the signal of a specific bit drops out continuously, the reproduced analog signal will be significantly different from the original signal, making it difficult to record and reproduce with high fidelity. is impossible.

In order to correct the above-mentioned defects, a patent application filed in Showa 48 describes a signal transmission system that converts analog signals into parallel PCM signals and transmits these parallel PCM signals through a plurality of corresponding transmission lines. - As in No. 130405 (see Japanese Patent Laid-Open No. 50-82920), the transmission line is sequentially switched for each word of the clock signal, and each bit signal constituting the parallel PCM signal is sequentially switched and transmitted. can be considered.

This makes it possible to prevent weight boundary signals in parallel PCM signals from continuously dropping out, thereby reducing code errors caused by dropouts, and making it easier to correct or interpolate signal loss caused by dropouts. can be done.

However, when using an M-modulated signal as described above with reference to FIG. 1A as the parallel PCM signal in this signal transmission system, if the above-mentioned switching transmission is performed, the above-mentioned law as a DM modulation signal will be applied. Furthermore, the maximum repetition frequency of the signal to be transmitted is twice that of normal transmission without switching transmission, so the recording density is reduced to 1/2.

That is, the information signal converted into the NRZ parallel PCM signal as shown in FIG. 2A by the AD converter 1 shown in FIG. 1A is then sent to the DM modulation circuits 2a, 2b, 2b, and
2c and 2d, and converted into a DM parallel PCM signal as shown in FIG. 2B.

The code arrangement of this DM type PCM signal is switched by a code arrangement switching circuit 10 as shown in FIG. 3A, which will be described later.

The obtained signal is a parallel PCM signal shown in FIG. 2C, and this PCM signal has been converted into a code that is neither NRZ nor DM.

The highest repetition frequency of the DM parallel PCM signal shown in Fig. 2B is fo/2 (where fo is the repetition frequency of clock pulses T, ~T), but after the code arrangement switching shown in Fig. 2C, The parallel PCM signal loses the regularity of DM modulation, and furthermore, its highest repetition frequency becomes fo.

This indicates that the latter is the former 2@, as described above, and therefore, by switching the code arrangement, the recording density is reduced to 1/2.

The present invention has been devised to correct the above-mentioned deficiencies by sampling an analog signal, converting each sampled value into one word of digital value, and converting each word into a parallel or series-parallel digital value. In a signal transmission method in which a PCM signal consisting of a code string is obtained and the PCM signal is transmitted via a plurality of transmission paths corresponding to the number of parallel code strings, the code arrangement of each bit of the PCM signal is switched. The first code modulation method (for example, NRZ) does not lose the regularity of code modulation before and after switching.

After converting the analog signal into a PCM signal using PE or RZ modulation method, the code arrangement of each bit of this PCM signal is switched for each bit of one sampling so that adjacent bits of the same weight are connected to the same transmission path. After that, while the pulse inversion interval is being varied, the first
This PCM signal is converted into another type of PCM signal using a second code modulation method (for example, DM modulation method) which is smaller than the code modulation method and in which the pulse is inverted in the middle of the bit cell. It is designed to be supplied to the transmission line.

By configuring as follows, 1 due to noise etc.
Dropouts in one transmission line are prevented from occurring concentrated only in one information signal to be transmitted, and are dispersed as much as possible in a plurality of information signals, and the maximum repetition rate of the PCM signal is This makes it possible to prevent the frequency from increasing due to arrangement switching.

Next, an example in which the present invention is applied to a parallel PCM type tape recorder will be described with reference to FIGS. 3 to 6.

In this example, parts common to those in FIGS. 1 and 2 are given the same reference numerals.

In the recording system signal transmission circuit shown in FIG. 3A, the analog signal that is the original information signal is supplied to the AD converter 1, and the NR
It is converted into a parallel PCM signal of Z, RZ or PE modulation scheme (in the illustrated embodiment <NRZ scheme as shown in FIG. 4A).

In this FIG. 3A, MSB, 2SB, 3SB and L
The SB is a classification of each bit signal into the order of greatest weight, and the listed order directly represents the order of magnitude, so the MSB is the signal with the greatest weight.

Further, the clock pulse shown in FIG. 4A is a pulse supplied to a shift register as described later.

Also, the signals shown in FIG. 4A are substantially the same as the signals shown in FIG. 2A.

The NRZ parallel PCM signal shown in FIG. 4A has its code arrangement converted by the code arrangement switching circuit TO as shown in FIG. 4B.

FIG. 5A shows a concrete example of the code arrangement switching circuit 10 shown in FIG. 3A, which includes shift registers 11-14, AND circuits 15-30, and OR circuits 31-30.
It consists of 34.

In FIG. 5A, the codes of the code arrangement shown in FIG. 4A are applied to the MSB, 2SB, 3SB, and LSB terminals in a corresponding manner.

Next, the circuit operation of the code arrangement switching circuit 70 shown in FIG. 5A will be described with reference to FIG. 5B.

The MSB input terminal 45 receives the code A4 t A2 s A3 t A4 of the MSB column in the code array shown in FIG. 4A'.
and A are applied sequentially in synchronization with the clock pulses T, ~T shown in FIG. 5B, and similarly, the 28B input terminal 46
are B1 to B, and furthermore, D is to the LSB input terminal 48.
1 to D5 are sequentially applied in synchronization with clock pulses T1 to T shown in FIG. 3B, respectively.

In this state, the clock pulses T1 to T are /4
When the timing pulses T, / and T2' obtained by dividing the frequency of T
The outputs "1" are sequentially generated at the output terminals A, B, C and D of the shift registers 1 to 14 in cycles of clock pulses consisting of -T.

Note that when "1" is applied from the output terminal A of the shift register 11 to one input terminal of the AND circuit 15, a signal corresponding to the code AI is applied from the MSB input terminal 45 to the other input terminal of the AND circuit 15. Therefore, when this sign is "1", the output of the AND circuit 15 is "1", and therefore the output of the OR circuit 31 is also "1".

That is, the symbol A1 appears as the output of the OR circuit 31, and similarly, the symbol B1. C1 and Dl appear respectively.

Furthermore, when the output terminals B to 11 of the shift register 11 are applied to one input terminal of the AND circuit 15 in synchronization with the next lock pulse, the 28B input is applied to the other input terminal of the AND circuit 15. Since a signal corresponding to the symbol B2 is applied from the terminal 4'6, when this signal is "1", the output of the AND circuit 16 is "1", and therefore the OR circuit 31
The output of is also "1".

That is, the symbol B2 appears as the output of the OR circuit 31, and similarly, the symbols C2' and D2 appear as the outputs of the OR circuits 32 to 34.
and A2 are respectively displayed.

Since similar operations are performed thereafter, the code arrangement shown in FIG. 4B is obtained as the outputs of the OR circuits 31-34.

These outputs are sent to corresponding DM modulation circuits 2a and 2b.
, 2c and 2d, respectively.

Note that when the next timing pulse T1' is applied to the other shift registers 11 to 14, outputs similar to those in the above case are again sequentially obtained at the output terminals A to D of these shift registers.

The above-mentioned parallel PCM supplied to the DM modulation circuits 2a to 2d
The signal is DM-modulated by this X and converted into a DM-type parallel PCM signal as shown in FIG.
After being amplified by signals 4b, 3c and 3d, the signals are recorded on respective tracks of the magnetic tape by recording heads 4a=4b, 4c and 4d together with clock pulses.

Note that the maximum repetition frequency of the parallel PCM signal of the DM system shown in FIG. 4C is fo/2, similar to the maximum repetition frequency of the N'RZ system shown in FIG. 4A.

Therefore, even after code arrangement switching and DM modulation, parallel PCM
The signal does not lose the law of code modulation, and furthermore, its maximum repetition frequency does not increase.

Therefore, the frequency band can be compressed compared to the cases shown in FIGS. 2A to 2C, and there is no fear that the recording density will decrease.

Furthermore, since it is a parallel PCM signal based on the DM system, it is possible to extract clock pulses from this signal (so-called self-clocking is possible).

It is.

Next, the case of reproducing parallel PCM signals recorded as described above will be described with reference to FIGS. 3B and 6.

Although the code arrangement of the reproduced signal reproduced by the reproducing heads 5a, 5b, 5c, and 5d is substantially the same as the code arrangement shown in FIG. 4C, signal loss may occur due to dropout in this case.

This regenerated parallel PCM signal is transmitted to regenerated amplifiers 6a and 6.
b, 6c and 6d, and then demodulated into parallel PCM signals before DM modulation shown in FIG. 4B in DM demodulation circuits 7a, 7b, 7c and 7d, and the demodulated parallel PCM signals The PCM signal is converted into its original state (i.e.,
4A).

Next, the operation of the code array demodulation circuit 71 shown in FIG. 6A will be described with reference to FIG. 6B.

Since this code array demodulation circuit 71 has a circuit configuration similar to that of the code array switching circuit 70 shown in FIG. 3A, corresponding parts are given the same reference numerals.

The first track input terminal 45 receives the codes A1 s B2 rC3,
B4. A, and B6 are sequentially applied in synchronization with the clock pulses T1 to T, and similarly, B, , , C2, Da, A4, and B are applied to the second track input terminal 46, and the third track The input terminal 47 has C, , B2 . A3.
Bj and C6 are also connected to the fourth track input terminal 48, A2. B3. C.

Assume that , and are sequentially applied in synchronization with clock pulses T1 to T shown in FIG. 6B.

In this state, clock pulses T, ~T, clock pulse input terminal 41, and clock pulses T, ~T
Timing pulse T obtained by dividing 5 to 1/4 frequency
When 1/ and T2' are respectively applied to timing pulse input terminal 42, an operation similar to that of FIG. 5A occurs.

Therefore, the MSH column in the code array of FIG. 4A appears as the output of the OR circuit 31, and similarly, the 2SB, 3SB, and L columns in the code array of FIG.
Each column of SB is displayed.

Note that signal loss due to dropout (for example, code B
Even if a set of codes C2 and C3 and a set of codes C4 and C3 occur, they are distributed in columns with different weights in the code array of FIG. 4A.

Therefore, codes with large weights do not have consecutive signal loss, and therefore, the operation for correcting or interpolating the signal loss can be performed easily and accurately.

That is, in the code arrangement of FIG. 4A, even if the code B2 is missing, for example, it can be corrected by the codes B1 and B3, so when the analog signal is converted by the DA converter 8, the analog signal will have a very large error. It becomes less.

In this case, as a method of correcting the signal loss, it is possible to maintain the value between the signals in this section at the value before or after the signal loss section. For example, when B1 and B3 have values as shown in the following table,
B2 can be determined as shown in the following table.

In addition, in the PE modulation method described above, for code "1", the pulse is inverted to positive at the center of the bit cell concerned, and in this case, if the pulse is already positive at the end of the bit cell immediately before it ( For example, if the code "1" is consecutive), it is inverted negatively at the starting edge side boundary of the bit cell, and then inverted positively at the center of the pit cell,
In addition, for code "0", if the pulse inverts to negative at the center of the bit cell, and at this time, it has already become negative at the end of the pit cell immediately before that (for example, when code "0" continues) This is a modulation method in which the bit cell is first inverted positively at the boundary on the terminal side of the bit cell, and then inverted negatively at the center of the bit cell.

As described above, the present invention prevents as much as possible the dropout caused by noise or other factors in one transmission path from concentrating on only one information signal to be transmitted, and dispersing it among multiple information signals as much as possible. Therefore, it is possible to easily and accurately correct or interpolate the signal of the dropout portion.

Since no signal is generated, relatively precise transmission can be achieved even if the frequency band is constant, and the recording density can be improved, for example, when the transmitted signal is recorded on a magnetic tape or the like.

[Brief explanation of drawings]

Figure 1A is a block diagram of the signal transmission circuit of the recording system of a recording/reproducing device using the conventional parallel PCM system.
The figure is a block diagram of the signal transmission circuit of the same reproduction system as above, and Figure 28 shows the AD converter shown in Figure 1A.
Figure 2B is a code arrangement diagram in which the modified NRZ system parallel PCM signal is encoded and arranged for each weight, and the code arrangement shown in Figure 2A is converted into a DM system signal by the DM modulation circuit shown in Figure 1A. FIG. 2C is a code arrangement diagram of a parallel PCM signal whose code arrangement has been switched from the code arrangement shown in FIG. 2B to another code arrangement. Further, FIGS. 3 to 6 show →0 in which the present invention is applied to a parallel PCM tape recorder.
Figure A is a block diagram of a signal transmission circuit in the recording system of the tape recorder, Figure 3B is a block diagram of a signal transmission circuit in the reproduction system of the same, and Figure 4A is an NRZ signal that has been AD converted by the AD converter shown in Figure 3A. Parallel P of the scheme
FIG. 4B is a code arrangement diagram in which CM signals are encoded and arranged for each weight. FIG. 4B is a diagram of a parallel PCM signal that has been switched from the code arrangement shown in FIG. 4A to another code arrangement by the code arrangement switching circuit shown in FIG. 3A. A code arrangement diagram, FIG. 4C is a code arrangement diagram of a parallel PCM signal converted from the code arrangement shown in FIG. 4B to a DM system signal by the DM modulation circuit shown in FIG. 3A, and FIG. 5A is shown in FIG. 3A. A block diagram of the code array switching circuit; FIG. 5B is a waveform diagram of clock pulses and timing pulses used in the code array switching circuit shown in FIG. 5A; FIG. 6A is a block diagram of the code array demodulation circuit shown in FIG. 3B; FIG. 6B is a waveform diagram of clock pulses and timing pulses used in the code array demodulation circuit shown in FIG. 6A. In the symbols used in the drawings, 10 is a code array switching circuit, and 71 is a code array demodulation circuit.

Claims (1)

[Claims] 1. Sample an analog signal, convert this sampled value into a one-word digital value, obtain a PCM signal in which each word consists of a parallel or series/parallel code string, and obtain a PCM signal corresponding to the number of parallel code strings. In a signal transmission method in which the PCM signal is transmitted via a plurality of transmission paths, even if the code arrangement of each bit of the PCM signal is switched, the law of code modulation is not lost before and after the switch. After converting the analog signal into a PCM signal using the code modulation method of 1, the code arrangement for each bit of the PCM signal is switched for each bit of 1 sampling to ensure that adjacent bits of the same weight are on the same transmission path. After that, while the pulse inversion interval is being varied, the first
After converting into another type of PCM signal using a second code modulation method, which is smaller than the code modulation method and in which the pulse may be reversed in the middle of the bit cell, this PCM signal is supplied to the plurality of transmission paths. A signal transmission method characterized by: