JPS58179532U - digital electronic equipment - Google Patents
digital electronic equipmentInfo
- Publication number
- JPS58179532U JPS58179532U JP7392882U JP7392882U JPS58179532U JP S58179532 U JPS58179532 U JP S58179532U JP 7392882 U JP7392882 U JP 7392882U JP 7392882 U JP7392882 U JP 7392882U JP S58179532 U JPS58179532 U JP S58179532U
- Authority
- JP
- Japan
- Prior art keywords
- oscillation
- digital electronic
- circuit
- power supply
- electronic equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はこの考案の一実施例の概略ブロック図である。
第2図は第1図に示すクロック発生器の周波数対電圧特
性を示す図である。第3図は第1図に示すクロック発生
器の概略ブロック図である。
図において、1はCPU、 2はクロック発生器、21
.22.23はインバータ、24はコンデンサ、25は
抵抗、26.27はD型フリップフロップ、28はNO
Rゲート、29はANDゲートを示す。FIG. 1 is a schematic block diagram of an embodiment of this invention. FIG. 2 is a diagram showing the frequency versus voltage characteristics of the clock generator shown in FIG. 1. FIG. 3 is a schematic block diagram of the clock generator shown in FIG. 1. In the figure, 1 is a CPU, 2 is a clock generator, 21
.. 22.23 is an inverter, 24 is a capacitor, 25 is a resistor, 26.27 is a D-type flip-flop, 28 is NO
R gate and 29 indicate an AND gate.
Claims (1)
に基づいて、所定の制御動作を行なう制御回路とを含む
ディジタル電子装置において、前記発振回路はコンデン
サと抵抗とからなる時定数回路を否み、 前記コンデンサは前記電源電圧の変動に応じてその容量
が変化して前記発振回路の発振周波数を変化させ、 それによって電源電圧の変動が生じても前記制御回路が
前記変化した周波数の発振出力に基づいて前記所定の制
御動作を行なうようにしたことを特徴とする、ディジタ
ル電子装置。[Claims for Utility Model Registration] A digital electronic device including a power supply circuit, an oscillation circuit, and a control circuit that performs a predetermined control operation based on the oscillation output from the oscillation circuit, wherein the oscillation circuit includes a capacitor and a resistor. The capacitor changes its capacitance in response to fluctuations in the power supply voltage, thereby changing the oscillation frequency of the oscillation circuit, so that even if fluctuations in the power supply voltage occur, the control circuit The digital electronic device is characterized in that the predetermined control operation is performed based on the oscillation output of the changed frequency.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7392882U JPS58179532U (en) | 1982-05-19 | 1982-05-19 | digital electronic equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7392882U JPS58179532U (en) | 1982-05-19 | 1982-05-19 | digital electronic equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58179532U true JPS58179532U (en) | 1983-12-01 |
Family
ID=30083409
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7392882U Pending JPS58179532U (en) | 1982-05-19 | 1982-05-19 | digital electronic equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58179532U (en) |
-
1982
- 1982-05-19 JP JP7392882U patent/JPS58179532U/en active Pending
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