JPS58179502U - automatic control regulator - Google Patents
automatic control regulatorInfo
- Publication number
- JPS58179502U JPS58179502U JP7412682U JP7412682U JPS58179502U JP S58179502 U JPS58179502 U JP S58179502U JP 7412682 U JP7412682 U JP 7412682U JP 7412682 U JP7412682 U JP 7412682U JP S58179502 U JPS58179502 U JP S58179502U
- Authority
- JP
- Japan
- Prior art keywords
- integral amount
- automatic control
- control regulator
- integral
- storage device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第3図は本考案実施例の構成を示すブロック図、第4図
は第3図め記憶装置5に記憶されているプログラムの示
すフロー手ヤーート、第2図は本考案 ・における制御
対象の温度変化を示すタイム・チャート、第1図は比例
・積分動作のみにより制御された従来法による制御対象
の温度変化を示すタイム・チャートである。
1・・・制御対象、2・・・熱電対、3・・・A−pコ
ンバータ、4・・・CPU、 5・・・記憶装置、6・
・・D−Aコンバータ、7・・・増幅器、8・・・ヒー
タ、10〜22・・・−フローチャートの各ステップ。FIG. 3 is a block diagram showing the configuration of the embodiment of the present invention, FIG. 4 is a flowchart of the program stored in the storage device 5, and FIG. 2 is the temperature of the object to be controlled in the present invention. Time Chart Showing Changes FIG. 1 is a time chart showing changes in temperature of a controlled object according to a conventional method controlled only by proportional and integral operations. DESCRIPTION OF SYMBOLS 1... Controlled object, 2... Thermocouple, 3... A-p converter, 4... CPU, 5... Storage device, 6...
...D-A converter, 7...Amplifier, 8...Heater, 10-22...-Each step of the flowchart.
Claims (1)
1、この変換器の出力を処理するデジタル演算装置と、
このデジタル演算装置の出力により制御対象を操作する
操作部と、上記制御対象の制御目標値並ひに定常状態に
対応する予想積分量Sを記憶させるための記憶装置とを
有し、すでに記憶されている積分量Sに従って操作部を
駆動し、そのとき積分演算からの補助積分量ΔSを上記
積分量Sに加算した値S+ΔSで上記記憶装置の内容を
更新するよる構成された自動制御調節器。an analog-to-digital converter for digitally converting measured values; and a digital arithmetic device for processing the output of this converter.
It has an operation unit for operating the controlled object using the output of the digital arithmetic device, and a storage device for storing the control target value of the controlled object as well as the expected integral amount S corresponding to the steady state. An automatic control regulator configured to drive an operating unit according to an integral amount S that is calculated, and update the contents of the storage device with a value S+ΔS obtained by adding an auxiliary integral amount ΔS from an integral calculation to the integral amount S.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7412682U JPS58179502U (en) | 1982-05-19 | 1982-05-19 | automatic control regulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7412682U JPS58179502U (en) | 1982-05-19 | 1982-05-19 | automatic control regulator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58179502U true JPS58179502U (en) | 1983-12-01 |
Family
ID=30083587
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7412682U Pending JPS58179502U (en) | 1982-05-19 | 1982-05-19 | automatic control regulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58179502U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61156303A (en) * | 1984-12-27 | 1986-07-16 | Toshiba Corp | Process controller |
-
1982
- 1982-05-19 JP JP7412682U patent/JPS58179502U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61156303A (en) * | 1984-12-27 | 1986-07-16 | Toshiba Corp | Process controller |
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