JPS5817671A - Charge transfer device - Google Patents
Charge transfer deviceInfo
- Publication number
- JPS5817671A JPS5817671A JP11607381A JP11607381A JPS5817671A JP S5817671 A JPS5817671 A JP S5817671A JP 11607381 A JP11607381 A JP 11607381A JP 11607381 A JP11607381 A JP 11607381A JP S5817671 A JPS5817671 A JP S5817671A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- charge
- layer
- transfer
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052751 metal Inorganic materials 0.000 claims abstract description 42
- 239000002184 metal Substances 0.000 claims abstract description 42
- 239000004065 semiconductor Substances 0.000 claims abstract description 32
- 239000004020 conductor Substances 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 31
- 229910052710 silicon Inorganic materials 0.000 abstract description 30
- 239000010703 silicon Substances 0.000 abstract description 30
- 239000000758 substrate Substances 0.000 abstract description 17
- 238000000034 method Methods 0.000 abstract description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052782 aluminium Inorganic materials 0.000 abstract description 3
- 238000005530 etching Methods 0.000 abstract description 2
- 230000008020 evaporation Effects 0.000 abstract 2
- 238000001704 evaporation Methods 0.000 abstract 2
- 239000000126 substance Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 70
- 108091006146 Channels Proteins 0.000 description 23
- 238000010586 diagram Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000007740 vapor deposition Methods 0.000 description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 230000002411 adverse Effects 0.000 description 3
- 101000694017 Homo sapiens Sodium channel protein type 5 subunit alpha Proteins 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000001444 catalytic combustion detection Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- MYLBTCQBKAKUTJ-UHFFFAOYSA-N 7-methyl-6,8-bis(methylsulfanyl)pyrrolo[1,2-a]pyrazine Chemical group C1=CN=CC2=C(SC)C(C)=C(SC)N21 MYLBTCQBKAKUTJ-UHFFFAOYSA-N 0.000 description 1
- -1 Mo) Substances 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は電荷結合素子(COD)等の電荷転送素子に関
する。電荷結合された電荷転送素子は、ベルシステム・
テクニカル・ジャーナルの1−70年4月号(第4修巻
第4号)の第ss丁ページKW@8・ボイルとG−D−
スミスにより「電荷結合された半導体素子」として発表
された。これは半導体の表11に形成された電位の井F
”(ポテンシャルウェル)中に電荷を蓄積し、この蓄積
された電荷をパルス電圧を用いて半導体表面に沿って移
動させるものである。素子構成はMO8キャパシタであ
り、これらを多数半導体らの電荷は通常MO8キャパシ
タのシリコン半導体と酸化層(8tOt)との境界面に
蓄積された少数キャリアであり、これらが半導体表面、
したがって酸化層との境界[K沿って運ばれる。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to charge transfer devices such as charge coupled devices (CODs). Charge-coupled charge transfer devices are
Technical Journal, April 1-70 issue (Vol. 4, No. 4), page ss, KW@8 Boyle and G-D-
Smith announced it as a ``charge-coupled semiconductor device.'' This is the potential well F formed in Table 11 of the semiconductor.
``The electric charge is accumulated in a potential well, and the accumulated electric charge is moved along the semiconductor surface using a pulse voltage.The element configuration is an MO8 capacitor, and the electric charge of a large number of semiconductors is Usually, these are minority carriers accumulated at the interface between the silicon semiconductor and the oxide layer (8tOt) of an MO8 capacitor, and these are the
Therefore, it is transported along the boundary [K] with the oxide layer.
このよ5な1電荷転送素子は表面チャンネル形電荷結合
素子(1!IccD)と呼ばれる。この8CCDには1
.境界面の表面準位によるキャリアのトラッピングによ
り転送電荷の損失が極めて大きく、転送効率が悪いとい
5問題がある。Such a 5-1 charge transfer device is called a surface channel charge coupled device (1!IccD). This 8CCD has 1
.. There are five problems in that the loss of transferred charges is extremely large due to the trapping of carriers by the surface states of the interface, and the transfer efficiency is poor.
このような表面チャンネル形CODの従来例を第1図に
示す。このlICCDは、デ形シリコン基板1上k例え
ば、 1lio、 等の酸化層zv形威し、この酸化層
1上に個別に配置された転送電極1が配設された構成と
なっている。各セルの構成はMO1e構造であり、さら
に一般的には金属絶縁半導体のMIII構造とも言われ
ている。A conventional example of such a surface channel type COD is shown in FIG. This ICCD has a structure in which an oxide layer (eg, 1io, etc.) is formed on a de-shaped silicon substrate 1, and transfer electrodes 1 are individually arranged on this oxide layer 1. The structure of each cell is an MO1e structure, which is also generally referred to as a metal-insulated semiconductor MIII structure.
上記転送電極1には金属膜の他にポリシリコン等が使用
される。この転送電極1に正電圧な印加した場合のデバ
イスのバンドモデルを第2図に示す。For the transfer electrode 1, polysilicon or the like is used in addition to a metal film. A band model of the device when a positive voltage is applied to the transfer electrode 1 is shown in FIG.
第3図(1)は電圧v□が転送電極IK印加された直後
の様子を示し、信号電荷または蓄積電荷が存在しない場
合である。シリコン半導体基板lの表面には空乏層、い
わゆるポテンシャル井戸が形成される。このポテンシャ
ル井F’に信号電荷の蓄積が始まると、第19(b)に
示すようKこれらの電荷は電位の低い境界1[K集めら
れる。信号電荷の一部は境界面の準位にとらえられる。FIG. 3(1) shows the state immediately after the voltage v□ is applied to the transfer electrode IK, and is a case where there is no signal charge or accumulated charge. A depletion layer, a so-called potential well, is formed on the surface of the silicon semiconductor substrate l. When signal charges begin to accumulate in this potential well F', these charges are collected at the lower potential boundary 1[K, as shown in FIG. 19(b). A portion of the signal charge is captured by the level at the interface.
一つの転送電極下の信号電荷を次の転送電極へ送る方法
は既知の方法(例えば多相駆動パルス)Kよるが、次の
転送電極下により深いポテンシャル井戸を形成して電荷
な流し込む原Ilv次々に利用する。この電荷転送時に
境界面の深い単位にトラップされた電荷は、転送電極1
に与えらによる電荷のトラッピングにより転送効率が劣
化する。この転送効率は一般に* S、* S%111
Lである。このような欠点v#く方法として、予じめ境
界面の櫟い準位に見合う電荷はバイアス電荷として注入
しておくフ1トゼロ法と呼ばれるものがある。この方法
によれば、転送効率は改善されるが、バイアス電荷には
通常飽和レベルの16−40%11Iltを必要とする
ので、転送電荷の最大量が減少し、従ってダイナミック
レンジが減少する欠点が新たに生ずる。The method of transmitting the signal charge under one transfer electrode to the next transfer electrode is based on a known method (for example, multiphase drive pulse), but it is also possible to form a deeper potential well under the next transfer electrode and pour the charge one after another. Use it for. During this charge transfer, the charges trapped in the deep units of the interface are transferred to the transfer electrode 1.
Transfer efficiency deteriorates due to charge trapping caused by This transfer efficiency is generally *S, *S%111
It is L. As a method to avoid such drawbacks, there is a method called the zero-zero method, in which charges corresponding to the horizontal level of the boundary surface are injected in advance as bias charges. Although this method improves the transfer efficiency, it has the disadvantage that the bias charge typically requires 16-40% 11Ilt of the saturation level, which reduces the maximum amount of transfer charge and therefore reduces the dynamic range. arise anew.
一方、境界1rK怠ける輪間隠t−亀り除< CODと
して、電荷を半導体バルク中で転送する埋込みチャンネ
ル形電荷転送素子(BCOD)が8・H・ワルデy等に
よりベルシステム・テクニカル・ジャーナルの1−テ鵞
年9月号(第51巻第1号)第16$5ページに発表さ
れた。このBCODでは、半導体の表面は基板と反対の
導電形に形成されており、酸化層との境界面から離れた
チャンネルで電荷が運ばれる。しかし、このBCODは
前述した8CCDの間層を解決したものの、一般に転送
電荷t618ccDより少ない欠点がある。電荷量を多
くとると、量込みチャンネル形から表面チャンネル形に
移行し、再び境界面のトラッピングが問題となる。On the other hand, a buried channel charge transfer device (BCOD), which transfers charge in the bulk of a semiconductor, is described in the Bell System Technical Journal by 8. H. Waldey et al. Published in September issue of 1-Tego (Vol. 51, No. 1), page 16, $5. In this BCOD, the surface of the semiconductor is formed to have a conductivity type opposite to that of the substrate, and charges are carried in a channel remote from the interface with the oxide layer. However, although this BCOD solves the problem of the interlayer of the 8CCD described above, it has a drawback that the transfer charge is generally less than t618ccD. When the amount of charge is increased, the channel type transitions from the filled channel type to the surface channel type, and trapping at the interface becomes a problem again.
このよ5な塩込みチャンネル形CODの従来例を第35
IIIIC示す。電子を転送する場合のBCODは前述
した8CCDと同じくr形シリコン基板lを用いて、そ
の表11KN形シリコン層4を形成する。このN形シリ
コン層4の上部に酸化層2を形成した後、転送電極1を
分離配設する構造としている。The 35th conventional example of such a salted channel type COD
IIIC shown. In the case of transferring electrons, the BCOD uses an r-type silicon substrate 1 and forms the N-type silicon layer 4 in the same way as the above-mentioned 8CCD. After forming the oxide layer 2 on top of the N-type silicon layer 4, the transfer electrode 1 is arranged separately.
第4図は上記BCCDの転送電極JVC電圧vOを印加
した場合のバンドモデル図であり、第4図(1)は電圧
印加直後で信号電荷が蓄積されていない状態を示す。信
号電荷があると、第4図(烏)の最小電位部分に集めら
れるので、境界面から離れて信号電荷が蓄積される。こ
の信号電荷の蓄積量が多(なると、第4図(b) K示
す様に電位の平らな部分が広がり、境界面11に電子に
対するバリアが無くなる・この時点からBCCDは前述
の8CCDと同じような動作条件となり、境界面の単位
により信号電荷の損失が起こる。このまため、通常のB
CODでは境界面の単位の影響が無い範囲で電荷が職扱
われており、したがって電荷転送動作では境界面の準位
による損失がないので転送効率は9919%1度になる
。このような条件では、電荷の蓄積賽量として前記11
ccBが酸化層Iまで用いているのに対し、11CCD
″Cは内部チャンネルの容量のみであり、その差が両者
の取扱い電荷量の差としてあられれ、一般的K BCO
Dの方がIIccDより職扱い電荷量は少ない。FIG. 4 is a band model diagram when the transfer electrode JVC voltage vO of the BCCD is applied, and FIG. 4 (1) shows a state where no signal charge is accumulated immediately after the voltage is applied. If there is a signal charge, it is collected at the minimum potential portion in FIG. 4 (crow), so the signal charge is accumulated away from the boundary surface. When the amount of signal charge accumulated is large (as shown in Fig. 4(b) K, the flat part of the potential spreads, and there is no barrier to electrons at the boundary surface 11. From this point on, the BCCD becomes the same as the 8CCD described above. This results in a loss of signal charge depending on the unit of the boundary surface.For this reason, the normal B
In COD, charge is handled within a range where there is no influence from the unit of the boundary surface, and therefore, in the charge transfer operation, there is no loss due to the level of the boundary surface, so the transfer efficiency is 9919% 1 degree. Under such conditions, the amount of charge accumulation is
While ccB uses up to oxide layer I, 11CCD
"C is only the capacitance of the internal channel, and the difference is the difference in the amount of charge handled between the two, and the general K BCO
D has less professional charge than IIccD.
上述した! 5 K 8COD 、 ICCD #iC
塊界[Kおける有害な準位に起因する問題点を有してい
る。As mentioned above! 5K 8COD, ICCD #iC
It has problems due to harmful levels in the lump boundary [K].
本発−は上記の事情に鑑みてなされたもので、転送電極
に対応した位置で、しかも半導体とこの半導体上に形成
された絶縁層との境界i[K分離形成した金属層を配役
するξとKよって、有害な境界面の準位を一カ化して堆
扱い電荷量を増大し、転送電荷の損失を小さくし得る電
荷転送素子を提供することを目的とする。The present invention was made in view of the above-mentioned circumstances, and the metal layer formed at the position corresponding to the transfer electrode and separated from the semiconductor and the insulating layer formed on the semiconductor by ξ Therefore, it is an object of the present invention to provide a charge transfer element that can unify harmful interface levels, increase the amount of charge to be handled, and reduce the loss of transferred charges.
以下、図面を参照して本発明の一実施例な説明する。第
2図は本発明の電荷転送素子を示しており、表面チャン
ネル形CCDに適用した場合を示している。仁の電荷転
送素子では、まずP形シリコン基板lの表面上に、例え
ばアルミ等の金属膜を例えば厚さ意000A@[に全面
蒸着して形成した後、転送電極位置に和尚する部分を残
こし、他の余分な部分をエツチング岬により除去して互
いに分離した複数の金属層Iを形成する。この上に蒸着
やcvn(化学的蒸着)等の方法によって絶縁層Cを形
成し、さらにこの絶縁層C上で、鉤記金属層5に対応し
た位置k例えばポリシリコン等で転送電極Jv配設する
。ζこで、上記絶縁層6とはシリコンを酸化し1酸化層
のみならず、蒸着やCVD等で形成した絶縁用の膜を全
般的に指すものとして用いる。Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 2 shows the charge transfer device of the present invention, which is applied to a surface channel type CCD. In Jin's charge transfer device, first, a metal film such as aluminum is deposited on the entire surface of a P-type silicon substrate l to a thickness of about 000A, and then a portion is left to be placed at the transfer electrode position. Then, other excess portions are removed by etching capes to form a plurality of metal layers I separated from each other. An insulating layer C is formed on this by a method such as vapor deposition or CVN (chemical vapor deposition), and furthermore, on this insulating layer C, a transfer electrode Jv is provided at a position corresponding to the hooked metal layer 5 using polysilicon, etc. do. ζHere, the above-mentioned insulating layer 6 is used not only to oxidize silicon but also to generally refer to an insulating film formed by vapor deposition, CVD, or the like.
上記電荷転送素子の転送電極3に電圧を印加すると、そ
のバンドモデルのポテンシャル分布は第6図に示すよ5
になる。金属層5は外部から電圧を与えられていないの
で浮いた状態にあり、バンドの−がりは前記第意図と同
様の傾向を示す。信号電荷はポテンシャルの最小点に集
められるので、第2図と同じくシリコン基板lの表璽儒
に集ってくるが、この部分には絶縁層−との間に金属層
Sが形成されており、電荷はこの金属層I内に取り込ま
れる。従来、有害な働會をした境界面の深い単位は、本
素子では金属層#により電子的にいわば埋め込まれて信
号電荷に対して補獲や放出の機能を失ってしまい無害化
される。したがって、電荷転送時には電荷を蓄積した金
属層Iから分離された次の金属層Sヘシリコン基板1と
絶縁層−との間の短い境界面を通して通常の表面チャン
ネル形CODと同様に電荷は移動する。When a voltage is applied to the transfer electrode 3 of the charge transfer element, the potential distribution of the band model is as shown in Fig. 6.
become. Since the metal layer 5 is not applied with an external voltage, it is in a floating state, and the band sag exhibits the same tendency as the first intention. Since the signal charges are collected at the minimum point of the potential, they are collected at the surface of the silicon substrate l, as shown in Figure 2, but a metal layer S is formed between this part and the insulating layer. , charges are incorporated into this metal layer I. In the present device, the deep unit at the boundary surface, which has conventionally had a harmful interaction, is electronically buried by the metal layer #, so that it loses the function of capturing and releasing signal charges, and is rendered harmless. Therefore, during charge transfer, the charges move from the metal layer I in which charges are accumulated to the next metal layer S separated from it through a short interface between the silicon substrate 1 and the insulating layer, in the same way as in a normal surface channel type COD.
ここで、金属層Iの7エルミ・レベルとシリコン基板1
の導電帯の関に大きなエネルギーギャップが無(、熱的
に素早く金属層5からシリコン基板1へ電荷が戻れる場
合には、次の転送段には通常の5ccpと同じ様な半導
体内での転送が行なわれ、転送されたセルIにおいて再
び金属層IK集められる。従って、上記素子では境界面
の単位による悪影響は各セル内では殆んど無視できる。Here, 7 Hermi levels of metal layer I and silicon substrate 1
If there is no large energy gap between the conductive bands of is carried out, and the metal layer IK is collected again in the transferred cell I. Therefore, in the above device, the adverse effect due to the unit of the boundary surface can be almost ignored within each cell.
このため、分離した金属層lが占める面積分に比例して
転送電荷の損失は無くなり、転送効率は極めて高くなり
、本素子では従来の8CCDの転送効率をBCODの高
い数値にまで向上で館る。また、バイアス電荷も各セル
間の転送部分の単位に対する量で足りるので、その分だ
け取扱える信号電荷量が増える事になるO
第1図は本発明の第2の実施例に係る電荷転送素子を示
している。この素子では、前記金属層Iがシリコン基板
l中Ell込まれた形で配設されるととに41黴がある
。これは、シリコン基板lの表面上に予じめ薄く凹凸を
つけておくか、あるいは金属を熱工程でシリコン基板l
中に拡散させて図のよ5な分離した形状をシリコン基板
l中に形成する。この素子においても、帥記第1の実施
例と同様の動作をすると共に同様の効果を有する。Therefore, the loss of transferred charges disappears in proportion to the area occupied by the separated metal layer l, and the transfer efficiency becomes extremely high.This device improves the transfer efficiency of the conventional 8CCD to the high value of BCOD. . In addition, since the amount of bias charge per unit of the transfer portion between each cell is sufficient, the amount of signal charge that can be handled increases accordingly. It shows. In this device, when the metal layer I is disposed in the form of being embedded in the silicon substrate I, there is a difference of 41%. This can be done by forming thin irregularities on the surface of the silicon substrate in advance, or by applying metal to the silicon substrate through a heat process.
5 to form a separated shape in the silicon substrate l as shown in the figure. This element also operates in the same way as the first embodiment and has the same effects.
第8図は本発明の第3の実施例に係る電荷転送素子を示
している。この場合は埋込みチャンネル形CCDK適用
した例である。すなわち、まずr形シリコン基板lの表
面にN形シリコン層4を形成する。このN形シリコン層
4上に前述した第1実施例同様に金属膜を蒸着等で一面
K11l威した後、転送電極1の位置に対応した部分を
残し、他の部分を取り除いて分離した金属層lを設ける
。さらに、この上部に絶縁層Cを蒸着やCVD等の方法
によって形成した後、転送電極1を設けるよ5Kしてい
る。FIG. 8 shows a charge transfer device according to a third embodiment of the present invention. This case is an example in which an embedded channel type CCDK is applied. That is, first, an N-type silicon layer 4 is formed on the surface of an R-type silicon substrate l. After applying a metal film over the entire surface of the N-type silicon layer 4 by vapor deposition or the like in the same manner as in the first embodiment described above, the metal layer is separated by leaving a part corresponding to the position of the transfer electrode 1 and removing the other part. Provide l. Furthermore, after forming an insulating layer C on top of this by a method such as vapor deposition or CVD, a transfer electrode 1 is provided for 5K.
第sgは第8図の素子に電圧を印加したバンド状態t*
qするもので、第9 II (a)は転送電極IK正の
電圧vB を印加した直後の様子を示す。sg is the band state t* when a voltage is applied to the element in FIG.
q, and No. 9 II (a) shows the situation immediately after applying the positive voltage vB to the transfer electrode IK.
金属層2は電気的に浮いているので、バンドの自がりは
前述した第4図(1)と同様になる。この状態から信号
電荷な蓄積すると、最初は半導体バルク(シリコン層内
部)内の最小電位に集められ、その部分の電位が平担に
なる。さらに、電荷が蓄積されると、同図伽)のように
埋込みチャンネル形から表面チャンネル形に移行する状
ざ
態に到達する。さ奮に、信号電荷を蓄積すると、電荷は
バルク(半導体内部)内のバリヤ(障Iりが無いために
金属層iに流れ込む。前述した様に、絶縁層−とシリコ
ン層4の間の境界の深い単位はすでに金属層5により置
込まれ無害化されているので、電荷の損失無しに表面チ
ャンネル形CODと同様の動作で信号電荷が蓄積される
。同図(C)は信号電荷がバルクの他に金属層SKも蓄
積された状態を示す。Since the metal layer 2 is electrically floating, the shape of the band is similar to that shown in FIG. 4(1) described above. When signal charges are accumulated from this state, they are initially collected at the minimum potential within the semiconductor bulk (inside the silicon layer), and the potential of that portion becomes flat. Further, as charges are accumulated, a state is reached where the buried channel type transitions to the surface channel type as shown in Figure 3). When the signal charge is accumulated, the charge flows into the metal layer i because there is no barrier (I) in the bulk (inside the semiconductor).As mentioned above, the boundary between the insulating layer and the silicon layer 4 Since the deep unit has already been placed and rendered harmless by the metal layer 5, signal charge is accumulated in the same manner as a surface channel type COD without loss of charge. In addition, the metal layer SK also shows an accumulated state.
素子のセル間での転送は従来のBCODの転送方法がそ
のまま適用できる。この場合、1つの電極では第9図(
e)の状態から印加電圧が負の方向に印加され、電荷が
転送される次の転送電極1は同図(畠)の状態になるの
で、信号電荷の一部は金属層Iから次の金属層lヘセル
間の絶縁層6とシリコン層4との境界を通して転送され
、他の電荷はバルク内を通して通常のBCODと同じ様
に這ばれる。信号電荷が少ない場合にはバルク内を通し
てのみ電荷転送が実施される。The conventional BCOD transfer method can be applied as is to transfer between the cells of the element. In this case, for one electrode, Figure 9 (
From the state of e), the applied voltage is applied in the negative direction, and the next transfer electrode 1 to which the charge is transferred will be in the state shown in the same figure (Hatatake), so a part of the signal charge is transferred from the metal layer I to the next metal layer. The charge is transferred through the boundary between the insulating layer 6 and the silicon layer 4 between the cells in the layer 1, and other charges are propagated through the bulk in the same manner as in a normal BCOD. When the signal charge is small, charge transfer is performed only through the bulk.
上記第3実施例の様にBCODの一部に分離した金属層
Sを配設する事により、塩込みチャンネル動作から表面
チャンネル動作の領域にまで有効に活用する事ができ、
取扱い電荷量を従来より改善する事が可能になり、ダイ
ナミックレンジを拡大することができる。By arranging a separate metal layer S in a part of the BCOD as in the third embodiment, it is possible to effectively utilize the region from the salt channel operation to the surface channel operation.
It becomes possible to improve the amount of charge handled compared to the conventional method, and expand the dynamic range.
なお、第1図の金属層1は、前述した第1図の様にシリ
コン層−内に埋込まれた構造に形成してもよい。また、
第9図では分離した金属層iとN形シリコン層4との間
のコンタクト状態はバリアができないニュートラルとし
て図示しているが、このコンタクト状態はオーミックで
あっても差しつかえない事は勿論である。さらに、シ璽
ットキーパリャが形成されたとしても、バリヤ部分だけ
信号電荷の蓄積に寄与しないのみで、他の動作は第9図
の説明と同じよ5になる。Note that the metal layer 1 shown in FIG. 1 may be formed to have a structure embedded in a silicon layer as shown in FIG. 1 described above. Also,
In FIG. 9, the contact state between the separated metal layer i and the N-type silicon layer 4 is shown as neutral, where no barrier can be formed, but this contact state may of course be ohmic. . Further, even if a shut-off barrier is formed, only the barrier portion does not contribute to the accumulation of signal charges, and the other operations are the same as those described in FIG. 9.
本発明による効果は、金属層5が分離して絶縁層6と半
導体基板lまたはN形シリコン層4との間に介在し、し
かもこれら金属層lが電気的に浮いている事によりあら
れれる。したがって、従来CCDにて問題となっていた
界面の単位の悪影響が本発明の構成の素子により除去で
きる。また、このような界面の単位を金属層Iの働きで
置込む事による他の利点は界面準位に起因する暗電流を
減少できる事である。The effects of the present invention are achieved because the metal layer 5 is separated and interposed between the insulating layer 6 and the semiconductor substrate 1 or the N-type silicon layer 4, and the metal layer 1 is electrically floating. Therefore, the adverse effect of the interface unit, which has been a problem in conventional CCDs, can be eliminated by the element having the structure of the present invention. Further, another advantage of placing such an interface unit by the function of the metal layer I is that the dark current caused by the interface state can be reduced.
このように、電荷の転送損失を殆んど無視できる事と暗
電流を仰えられる事から、例えば第5図の素子の変形と
して第10図に示すような長距離にわたるセル1を形成
する事ができる。In this way, since the charge transfer loss can be almost ignored and the dark current can be considered, it is possible to form a long-distance cell 1 as shown in FIG. 10 as a modification of the device shown in FIG. 5, for example. I can do it.
従来通りの構成で転送ゲート電極を長くすると、その面
積増加分に比例して界面単位の影響があったが、本発明
の構成ではセルを任意の長さと藺積に広げる事ができる
。第10図では、一方向に長く伸ばした例になっている
が、本発明の構成によれば任意の形状なとれるので、従
来困難であった転送方向の変更を容JIK行なえる利点
が生ずる。また、転送amでの他の転送ラインへの接続
や反対方向への転送などが複雑な転送電極を必要とせず
に自由に設計できる。When the transfer gate electrode is lengthened in the conventional configuration, there is an effect on the interface unit in proportion to the increase in area, but in the configuration of the present invention, the cell can be expanded to any length and stack. Although FIG. 10 shows an example in which the wire is elongated in one direction, the structure of the present invention allows it to take any shape, which has the advantage of allowing JIK to change the transfer direction, which was difficult in the past. Furthermore, connections to other transfer lines in the transfer am, transfer in the opposite direction, etc. can be freely designed without requiring complicated transfer electrodes.
なお、前記半導体基板lまたはN形シリコン層−と絶縁
層Cとの界面に分離して配置する金属層Iの材料は、ア
ルミニウム(ム1)のみならず、金(ムU)、#I!(
ムg)、プラチナ(Pi)、タングステン(W)、シリ
コニウム(Zr)、ハフニウム(Hf)、モリブデン(
Mo)、ニッケル(N1)、パラジウム(Pd)など殆
んどの金属材料を用いる事ができる。この金属層5は複
数材料による複合層でもよいし、また半導体としてもシ
リコン(8N)のみならずがリウム砒素(GaAB)や
インジウムアンチモン(In8b)等の材料を初めとし
て、ゲージ電圧により空乏層が発生し、電荷転送動作が
できる材料ならばいずれも用いる事ができる。さらk、
半導体の導電形としては、P形表藺チャンネル、 P−
N構造の埋込みチャンネルヤンネルにも適用できる。ま
た、絶縁層としては、810.の他11c8i0やAJ
IO8中金属酸化膜、さらには引aN4などそれぞれの
製作プロセスに合わせて選択できると共に絶縁層は複数
材料の複合層から形成してもよいし、ステップ酸化にて
形成することができる。また、上記した金属層5は電荷
転送素子のすべての転送電極下に設けても良く、必要な
一部の転送電極下に設けるようにしても良い。Note that the material of the metal layer I, which is arranged separately at the interface between the semiconductor substrate l or the N-type silicon layer and the insulating layer C, is not only aluminum (M1) but also gold (M1), #I! (
Mug), platinum (Pi), tungsten (W), siliconium (Zr), hafnium (Hf), molybdenum (
Most metal materials such as Mo), nickel (N1), and palladium (Pd) can be used. This metal layer 5 may be a composite layer made of multiple materials, or it may be made of materials such as not only silicon (8N) but also lium arsenide (GaAB) and indium antimony (In8b) as a semiconductor. Any material can be used as long as it generates charge and can perform a charge transfer operation. Sarak,
The conductivity types of semiconductors include P-type surface channel, P-
It can also be applied to N-structured buried channel channels. Moreover, as an insulating layer, 810. Others 11c8i0 and AJ
The insulating layer may be formed from a composite layer of a plurality of materials, or may be formed by step oxidation. Further, the metal layer 5 described above may be provided under all the transfer electrodes of the charge transfer element, or may be provided under a necessary part of the transfer electrodes.
以上説明したように本発明によれば、転送電極に対応し
た位置で、しかも半導体とこの半導体上に形成された絶
縁層との間の境界面に分離形成した金属層を設けている
ので、有害な境界面の単位の悪影響を減少し、堆扱い電
荷量を増大し、転送電荷の損失を小さくして転送効率を
向上し得る電荷転送素子を提供することができる。As explained above, according to the present invention, a separate metal layer is provided at a position corresponding to the transfer electrode and at the interface between the semiconductor and the insulating layer formed on the semiconductor, thereby preventing harmful It is possible to provide a charge transfer element that can reduce the adverse effects of boundary surface units, increase the amount of charge that can be handled, reduce loss of transferred charges, and improve transfer efficiency.
第1図は従来のノ表面チャンネル形CODの断面図、第
**は第1図の動作を説明するためのバンドモデル図、
第3図は従来の塩込みチャンネル形CODの断面図、第
4Eは第3図の自作な説明するためのバンドモデル図、
第S図は本発明の第1実施例に係る表面チャンネル形C
ODに連用した電荷転送素子の構造図、第@1I11は
第5図の動作を説明するためのバンドモデル図、第7図
は本発明の第2の実施例に係る電荷転送素子の構造図、
第**は本発明の第3の実施例に係る鳳込みチャンネル
形CODに適用した電荷転送素子の構造図、嬉9図は第
8図の素子の動作を説明するためのバンドモデル図、第
10図は本発明の変形例に係る電荷転送素子の構造図で
ある。
l・・・を形シリコン基板%j”’酸化層、S・・・転
送電極、4・・・N形シ啼コン層、5・・・金属層、6
・・・絶縁層、1・・・セル。
出願人代理人 弁理士 鈴 江 武 彦if!5図
第 7 図
第8図Fig. 1 is a cross-sectional view of a conventional surface channel type COD, and Fig. ** is a band model diagram for explaining the operation of Fig. 1.
Fig. 3 is a cross-sectional view of a conventional salted channel type COD, Fig. 4E is a self-made band model diagram for explanation of Fig. 3,
FIG. S shows a surface channel shape C according to the first embodiment of the present invention.
A structural diagram of a charge transfer element used in conjunction with OD, #1I11 is a band model diagram for explaining the operation of Fig. 5, and Fig. 7 is a structural diagram of a charge transfer element according to a second embodiment of the present invention.
No. ** is a structural diagram of a charge transfer device applied to a built-in channel type COD according to the third embodiment of the present invention, FIG. 9 is a band model diagram for explaining the operation of the device in FIG. FIG. 10 is a structural diagram of a charge transfer element according to a modification of the present invention. l... silicon substrate%j"' oxide layer, S... transfer electrode, 4... N-type silicon layer, 5... metal layer, 6
...Insulating layer, 1...Cell. Applicant's agent Patent attorney Takehiko Suzue If! Figure 5 Figure 7 Figure 8
Claims (1)
に分離形成された複数個の金属層と、これら金属層及び
半導体上に形成された絶縁層と、この絶縁層上で前記各
金属層に対応した位置に配設されそれぞれ電荷転送用の
パルス電圧が印加される転送電極とを具備し、前記半導
体と絶縁層との境界面に発生する電荷転送に有害な単位
を無力化してなることを特徴とする電荷転送素子。 am 前記第1導電形の半導体上に第2導電形の半導
体層を設け、この嬉2導電形の半導体層上に前記金属層
を設けてなるととv41I黴とする特許請求の範囲第1
項記載の電荷転送素子。 @ 前記金属層は前記第1導電形の半導体中あるいは第
3導電形の半導体層中に思込まれて形成されることを特
徴とする特許請求の範囲第1項及び第2項のいずれかに
記載の電荷転送素子。 (41前記第1導電形半導体、第2導電形亭導体層、絶
縁層、金属層及び転送電極で構成される吟単位セルは任
意の方向と長さを有するように設定されてなることな特
徴とする特許請求の範囲第1項乃至第3項のいずれかに
記載の電荷転送素子。[Claims] +1) A semiconductor of a first conductivity type, a plurality of metal layers formed separately on the surface of this semiconductor, an insulating layer formed on these metal layers and the semiconductor, and this insulating layer. and a transfer electrode disposed at a position corresponding to each of the metal layers and to which a pulse voltage for charge transfer is applied, and a unit harmful to charge transfer generated at the interface between the semiconductor and the insulating layer. A charge transfer element characterized by being made ineffective. If a semiconductor layer of a second conductivity type is provided on the semiconductor layer of the first conductivity type, and the metal layer is provided on the semiconductor layer of the second conductivity type, it becomes v41I mold.
The charge transfer device described in Section 1. @ According to any one of claims 1 and 2, wherein the metal layer is formed in the semiconductor layer of the first conductivity type or in the semiconductor layer of the third conductivity type. The charge transfer device described above. (41) The unit cell composed of the first conductivity type semiconductor, the second conductivity type conductor layer, the insulating layer, the metal layer, and the transfer electrode is set to have an arbitrary direction and length. A charge transfer device according to any one of claims 1 to 3.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11607381A JPS5817671A (en) | 1981-07-24 | 1981-07-24 | Charge transfer device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11607381A JPS5817671A (en) | 1981-07-24 | 1981-07-24 | Charge transfer device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5817671A true JPS5817671A (en) | 1983-02-01 |
Family
ID=14678035
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11607381A Pending JPS5817671A (en) | 1981-07-24 | 1981-07-24 | Charge transfer device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5817671A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6226094B1 (en) | 1996-01-05 | 2001-05-01 | King Jim Co., Ltd. | Apparatus and method for processing character information |
-
1981
- 1981-07-24 JP JP11607381A patent/JPS5817671A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6226094B1 (en) | 1996-01-05 | 2001-05-01 | King Jim Co., Ltd. | Apparatus and method for processing character information |
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