JPS58162108A - Gaas monolithic amplifier - Google Patents

Abstract

PURPOSE:To set a resistance value of a load against an AC signal, to a desired value, and also to make a resistance value against DC lower than its value against AC, by connecting in parallel an FET having each operating point in a current saturation area and a linear resistance area. CONSTITUTION:On a semi-insulating GaAs substrate 29, an amplifying FET 25 and loading FETs 26, 27 connected to a signal input terminal 21, a signal output terminal 22, a bias voltage supply terminal 23 and a ground terminal 24 are formed. The FET 26 operates so that the operating point is in a saturation area and voltage and current characteristics become 31, and on the other hand, the FET 27 operates so that the operating point is in a linear resistance area by prolonging the gate length, and the voltage and current characteristics become 32. Also, the loading FET 26 and 27 are connected in parallel so that a characteristic shown by a dotted line 33 is obtained by putting them together. In the linear resistance area, a resistance value can be set to a desired value easily by gate length, and also an AC resistance value in a saturation area is high, therefore, the AC resistance value in case of parallel connection becomes almost equal to a resistance value of the FET 27.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a GaAs (gallium arsenide) monolithic amplifier.

GaAs PET (field effect transistor) is used in various communication devices as an active element that operates even in the microwave region. In recent years, the high speed of ij GaAs FET,
Monolithic IC (integrated) that takes advantage of high frequency properties.

development of circuits) is progressing.

Figure 1 is a configuration pattern diagram of a conventional GaAS monolithic amplifier, and Figure 2 is its equivalent circuit diagram, where l is a signal input terminal, 2 is a signal output terminal, 3 is a bias voltage supply terminal, 4 is a ground terminal, 5 is an amplifying PET, 6 is a load FET, the shaded area 7 is a Fin-type active layer, and 8 is a semi-insulating GBA S substrate.

Figure 3 is a diagram showing the voltage-current characteristics of the load FF1T, where the horizontal axis ■ is the voltage and the vertical axis I is the current. When the current increases, the resistance value initially shows a low value, but after passing the point N, the current saturates and the resistance value starts to show a high value. This is because the velocity of electrons in the active layer becomes saturated when the electric field becomes stronger than a certain level. The operating voltage of PET for load is shown in Figure 3 ■
, and the operating point is P. The resistance value for the AC signal is a high resistance portion of characteristic 11. On the other hand, the isometric resistance value for direct current is the resistance value shown by the third dotted line 12, which is a smaller value than the alternating current resistance.

That is, when an FET is used as a load, the resistance value for alternating current and the resistance value for direct current are different, and the former is always larger. The FBT is used as a load because the higher the resistance value for alternating current, the higher the gain, and the lower the resistance value for direct current, the lower the power consumption.

The AC resistance value of the load FET is extremely high in the case of GaAs, and may exhibit negative resistance in some cases. If the AC resistance value is too high, the gain will be large, but the band will be narrowed. Furthermore, if negative resistance is exhibited, the operating point may become unstable or oscillation may occur. Therefore, the higher the AC resistance value, the better the performance, and it is important to be able to set it to a desired value depending on the design. However, F
It is difficult to manufacture an ET by controlling the resistance value in the saturation region with good reproducibility, and it has been virtually impossible to obtain desired characteristics with conventional amplifiers.

An object of the present invention is to provide a GaAs monolithic amplifier having a load FET that can set the resistance value of the load FET to an AC signal to a desired value, and in which the resistance value to DC signals is always lower than the resistance value to AC signals. There is a particular thing.

According to the present invention, the G aA is characterized in that it is equipped with, as a load, a circuit in which an FET whose operating point is in a current saturation region and an FET whose operating point is in a linear resistance region are connected in parallel.
A monolithic amplifier is obtained.

FIG. 4 is a configuration pattern diagram of an amplifier according to the present invention (ias monolithic), and FIG. 5 is an equivalent circuit diagram thereof, where 21 is a signal input terminal, 22 is a signal output terminal, 23 is a bias voltage supply terminal, and 24 is an equivalent circuit diagram. Ground terminal, 25 is amplification FET, 2
6 and 27 are load FETs, and the gate length of FET 27 is made long so that the operating point is in the linear resistance region (unsaturated region). 28 is an n-type active layer, 29 is a semi-insulating Ga
It is an As substrate.

FIG. 6 is a diagram for explaining the voltage-current characteristic of negative 1 according to the present invention, in which the horizontal axis V represents voltage and the vertical axis {circle around (2)} represents current. If the operating voltage is Vp, the voltage-current characteristic of the negative M PET 26 is as shown in 31 since the operating point is in the saturation region. On the other hand, load F school T27 has an operating point in the linear resistance region, so 32
become that way. In the present invention, since both are connected in parallel, the current is added for the same voltage, and the total is 3 on the dotted line.
The characteristics are shown in 3. As mentioned above, the AC resistance value in the saturation region is extremely high and difficult to control, but in the linear resistance region, the resistance value is proportional to the gate length, so it is easy to set it to the desired value. be.

Furthermore, since the AC resistance value in the saturation region is extremely high, the AC resistance value at the operating point P when connected in parallel is approximately equal to the resistance value of the linear resistor Ti'ET.

FIG. 7 is a structural pattern diagram showing another embodiment of the present invention, in which the same elements as in FIG. 4 are given the same numbers. The difference between Figure 7 and Figure 4 is the load FETs 26' and 27'.
There is no gate electrode.

Therefore, to be precise, 26' and 27' are not FETs but nonlinear resistors exhibiting saturation characteristics, but as is clear from the above explanation, the load Fli! Since T uses the gate and source as a nonlinear resistor by connecting them, the same operation can be achieved even without the gate electrode. However, the characteristics will be slightly different without Goo) 111&, so the design needs to be changed accordingly.

FIG. 8 is a structural pattern diagram showing another embodiment of the present invention, in which the same elements as in FIG. 4 are given the same numbers. The difference between FIG. 8 and FIG. 4 is that the gate of the load FET 5-27" is connected to the bias supply terminal 30. When the gate bias voltage of the load FET 27" is changed, the linear The resistance value in the resistance area changes. Therefore, in the configuration shown in FIG. 8, it is possible to control the AC load resistance of the amplifying 1" ET 25 by an external bias voltage.

As explained in detail using the figures above, the Ga of the present invention
As the As monolithic amplifier uses IT as a load and can obtain an arbitrary AC resistance value, it is highly effective for general use.

[Brief explanation of drawings]

Figure 1 is a configuration pattern diagram of a conventional 0aAs monolithic amplifier, and Figure 2 is its equivalent circuit diagram, where 1 is a signal input terminal, 2 is a signal output terminal, 3 is a bias voltage supply terminal, 4 is a ground terminal, 5 is an amplification FET, and 6 is a load FBT. Figure 3 is a diagram showing the voltage-current characteristics of load PET.
1 is its characteristic. Fig. 4 is a configuration pattern diagram of a GaAs monolithic amplifier according to the present invention, and Fig. 5 is its equivalent circuit diagram, in which 6-21 is a signal input terminal, 22 is a signal output terminal, 23 is a bias voltage supply terminal, and 24 is a grounding terminal. Terminal, 25 is P for amplification
ET, 26 and 27 are load FETs. FIG. 6 is a diagram showing the voltage-current characteristics of the load according to the present invention, and 33 is the characteristic. FIGS. 7 and 8 are diagrams showing other embodiments of the present invention, in which 26' and 27' are Goo!). FE for loads without poles
T, 27'' is a load FET which is set to 5 so that the gate bias voltage can be supplied from the bias supply terminal 30.

Claims (1)

[Claims] A GaAS monolithic amplifier characterized in that it is equipped with, as a load, a circuit in which an FET whose operating point is in a current saturation region and an FET whose operating point is in a linear resistance region are connected in parallel.