JPS58159584A - Reverberator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] The present invention relates to a reverberation device that is particularly effective in combination with electronic musical instruments, etc., and in particular, it is capable of simulating changes in the size of a room by varying the number of stages of the shift register means. It is something.

2. Reverberation devices that utilize wave reflection have been put to practical use in the past, but these devices are generally large and inconvenient to handle. Reverberation devices that use air pipes or magnetic recorders as delay lines have also been announced, but these have the disadvantage that if the system is unstable, they will be accompanied by oscillation and large fluctuations in reverberation time. In particular, when a short delay line is used to increase the time density of reverberation, the above drawbacks are likely to appear.

The present invention provides a digital reverberation device that does not have the above-mentioned drawbacks, and particularly provides a reverberation device that can easily simulate changes in the size of a room and can easily vary the reverberation time. It is. Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.
An analog signal such as a musical tone signal added thereto is sampled by an analog-to-digital converter (hereinafter abbreviated as ADO) 2 and converted into a binary code input signal.

Then, it is added to one input terminal of the two-man-powered full adder 3, and added to the output code of the digital multiplier 6 (
or subtraction) and the sum code (or difference code) is added to the input of the shift register 4. The output code of the shift register 4 becomes one input of the digital multiplier 6, and is multiplied by the constant code output from the constant memory 7. Also, the output code of shift register 4 is digital -
The signal is converted into an analog signal by an analog converter (hereinafter abbreviated as DAC) 8. The constant code output from the constant memory 7 corresponds to the coefficient of reverberation, for example, the sound absorption coefficient of the material of the wall. - By varying the above constant code, changes in the acoustic constants of the room can be simulated. The controller 6 is for varying the number of stages of the shift register 4, and realizes varying the temporal frequency of echoes, that is, varying the size of the room. This variation can also be realized by varying the clock frequency that drives the device shown in FIG. 1, K instead of the controller 6.

In FIG. 1, the full game 3, shift register 4, and digital multiplier 6 form a closed loop to realize room reverberation.

Further, in FIG. 1, if the ADC2 is 8 bits and the output of the constant memory 7 is O08, the output of the full adder 3 may increase up to six times the output of the ADC2.

Therefore, it is sufficient for the full adder 3 to perform full addition of 8 bits and 10 bits. Furthermore, since the output of full adder 3 is 11 bits, shift register 4 is 11 bits.
It is sufficient if the word is 11 bits. In addition, the accuracy of the digital calculation in the embodiment shown in FIG. 1 is the accuracy of the ADC2.
Since shift register 4 cannot be raised to -, shift register 4 is 1.
It is also possible for the word to be 8 bits.

If the output of the constant memory 7 can be kept at a constant value, instead of the digital multiplier 60, use another binary code that is the binary code output from the shift register 4 multiplied by the output of the constant memory 7. A code converter may be used, in which case the code converter becomes a digital multiplication means having exactly the same effect as the digital multiplier 6.

ADC2, full adder 3. Shift register 4. The digital multiplier 6 and the DACe are normally controlled synchronously by pulses output from a clock signal generator.

In the embodiment shown in FIG. 1, the amplitude gain versus frequency characteristic from the input terminal 1 to the output terminal 9 has a comb shape.

Of course, a closed loop can also be constructed by reversing the connection order of the shift register 4 and digital multiplier 6 in FIG.

In addition, the input signal of DACa can be sent to other places in the closed loop, such as the output terminal of the full adder 3 or the digital multiplier 6.
Needless to say, it may be taken from the output terminal of the .

FIG. 2 is a block diagram of another embodiment of the invention. Second
In the figure, an input signal digitized by a person DO is sent from an input terminal 1o to a full adder 3 and a digital multiplier 1.
1 and added to. The full adder 3 adds the human input signal and the output code of the digital multiplier 6, and the sum code is added to another full adder 12 and the digital multiplier 6 via the shift register 4. The digital multiplier 6 uses the constant code output from the constant memo +1-14 and the shift register 4.
Multiply by the output code of On the other hand, digital multiplier 1
1 multiplies the input signal from the input terminal 100 by another constant code output from the constant memory 14, and provides an output code to the full adder 12. The full adder 12 performs an addition operation on the output signals of the shift register 4 and the digital multiplier 11, and outputs a sum code to the output terminal 13.

In the embodiment shown in FIG. 2, by appropriately selecting the values of the two constant codes output by the constant memory 14, the amplitude gain vs. frequency characteristic of the comb shape seen in the embodiment shown in FIG. 1 can be brought close to flat. I can do it. Therefore, even if a plurality of the embodiments shown in FIG. 2 are connected in series, the amplitude gain versus frequency characteristics will not be disturbed.

Of course, even in the embodiment shown in FIG. 2, if the controller 5 similar to that shown in FIG. 1 is provided and the number of stages of the shift register 4 is made variable, it goes without saying that the size of the room can be varied.

It goes without saying that in the embodiment of FIG. 2, if the ADC 2 shown in FIG. 1 is connected to the input terminal 10 and the DAGa is connected to the output terminal 17-13, analog signals can be handled. If the input signal is a digital signal, complete digital processing can be performed without using the DAC 2, and if further digital signal processing is to be performed after adding reverberation, the signal can be processed completely digitally without using the DAGa.

The constant memories 7 and 14 in Figures 1 and 2 may output constant codes that are constant over time, or they may output constant codes that change over time using read-only memory (ROM) or the like. It is also possible to obtain a variable effect by outputting .

As is clear from the above embodiments, the reverberation device of the present invention has the following features:
Since signal processing is performed digitally using full adders, shift register means, digital multiplication means, etc., the following effects can be expected. That is, even if a closed loop is formed by the full adder, shift register means, and digital multiplication means, the loop gain will not exceed 1, so there is no risk of oscillation or howling, and the operation is stable and reliable. Furthermore, since a digital delay element such as a shift register means is used as a delay element, it is possible to realize a delay time that can be lengthened or shortened freely, and the SN
There was no deterioration in the ratio. Therefore, it is possible to continue reverberations at short intervals over a long period of time, which was previously impossible, and it is also possible to freely create reverberations at long intervals, and by combining these, excellent reverberation sound effects can be obtained. becomes possible. Furthermore, according to the present invention, since the number of stages of the shift register means is made variable, changes in the size of the room can be simulated by changing the reverberation time length, making it possible to vary the reverberation time.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the invention, and FIG. 2 is a block diagram of another embodiment of the invention. 3...Full adder, 4...Shift register, 6...Digital multiplier, 7,14...
...Constant memory 0

Claims (1)

[Claims] It is equipped with a full adder, a shift register means, and a digital multiplication means having a multiplication function with a constant, and the full adder, the shift register means, and the digital multiplication means form a closed loop. an input signal is applied, a digital output signal is obtained from a part of the closed loop, and the digital multiplication means is configured to substantially multiply the input code by the constant, and the number of stages of the shift register means is A reverberation device characterized by variable.