JPS58159365A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To obtain a capacitor to be contained in a highly reliable semiconductor integrated circuit by a method wherein the surface of an impurity-free single crystal or polycrystalline semiconductor layer is thermally oxidized into a dielectric film wherethrough impurities are introduced for the formation of a lower electrode. CONSTITUTION:An insulating film 52 is provided on a semiconductor substrate 51 and then a polycrystalline Si film 53 is provided to be the lower electrode of a capacitor. By thermal oxidation, a dielectric film 55 is formed on the surface of the film 53. Ion implantation follows whereby impurities (P, B, As, etc.) are introduced into the film 53 through the dielectric film 55, for the formation of a conductive polycrystalline Si film 54. An upper electrode 59 is provided for the completion of the capacitor. The thickness of the dielectric film is controllable, ensured of uniformity and reproducibility, due to the process wherein a dielectric film is formed and impurities are implanted thereinto for rendering the lower electrode conductive.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for manufacturing semiconductor integrated circuits.

In the conventional manufacturing of semiconductor integrated circuits, the
As a method for manufacturing a capacitor OS built into a circuit! lIl
The method will be explained using FIG. 1, factor 2, and factor 3.

In Figure 1, 11 is a semiconductor substrate, 12 is an insulating coating,
13 is, for example, a conductive polycrystalline silicon film. An insulating film 12 is provided on the #P conductor base 4 on 11, a polycrystalline silicon pot is provided which will become the capacitor's) part electrode, and an impurity (for example, phosphorus, hov-7s#) is added to the gold layer. By doing so, conductive polycrystalline silicon 13 is obtained. The conductive polycrystalline silicon! After using the It al photo and the bird carving technique wheel, it was made into a condenser ROM electric body 4iL class 14 as small as a plane 2IIIli. #6
The electrically conductive polysilicon coating 130 surface is processed by thermal oxidation method or fl CVD (chemical vapor phase Mk).
JL) method.

Next, as if living on a plane Hg, the upper part of the contin
By providing a tensile layer, autometallurgical stone, or an alloy of these metals, etc.), a rich density layer or n314 is created.

The third conventional method ta+ is performed using Figure 14, 5th and 6th steps.

In FIG. 4, 11 is a semiconductor substrate, 16 is an impurity barrier film, and 17 is an impurity diffusion layer that serves as a lower electrode for the content. 9c, impurity mal! is deposited on the semiconductor substrate 11!
After providing 8116, patterning is performed using photolithography technology, and IK impurities (phosphorus, phosphorus, arsenic, antimony, etc.) are introduced into the semiconductor group using the expansion method or the ion column implantation method. As shown in FIG. 5, a dielectric coating 1118 is formed using a thermal oxidation method or a CVD method. After that, as shown in FIG. 6, the capacitor is formed by providing an upper electrode 19 (a full miniluminium layer, a conductive polycrystalline silicon layer, a molybdenum layer, a platinum-1 or metal alloy layer of these metals, etc.). can get.

The conventional method described above has the following 5 drawbacks.When forming the 6-electrode sheath 1IL8 using the thermal oxidation method, a part of the diaphragm polycrystalline silicon sheath, which becomes the lower conductor of the capacitor, is removed. ! s
13, or the dielectric film 18 due to the 6-electrode oxidation rate-limiting reaction caused by the non-uniformity of the surface impurity of the impurity diffusion layer 17.
It is very difficult to control the film thickness. Furthermore, it was difficult to improve reproducibility. On the other hand, dielectric coating 1 was formed using the CVD method.
Even in the case of forming the dielectric film 18, leakage of the capacitor occurred due to the film thickness controllability, reproducibility, and film quality of the dielectric coating 18.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit which eliminates the above-mentioned conventional drawbacks.

According to the present invention, in semiconductor integrated circuit 0Ill construction,
Single crystal or polycrystalline native layer 4I containing no impurities
A dielectric film is formed by thermally oxidizing the dielectric material 11, and impurities are introduced into the iron single crystal or L polycrystalline semiconductor scrap film by ion implantation through the dielectric material 11. A method for manufacturing a semiconductor integrated circuit is obtained in which a top electrode is formed on the a-electrical film Q and then an upper electrode is provided on the a-electrical film Q.

Hereinafter, the present invention will be explained in detail using the drawings.

FIGS. 7, 8, and 9 are rounded diagrams illustrating an embodiment of the present invention, showing cross sections of capacitors in each production 111. As shown in FIG. 1, 51 is a semiconductor substrate, 52 is an insulating film, and 53 is, for example, a non-conductive polycrystalline silicon film.

First, an insulating film 52 is formed on a semiconductor substrate 51, and a polycrystalline silicon film 53 is formed as a lower electrode of a capacitor. At this time, the polycrystalline silicon composite film is subjected to patterning using Shakoshoku B technology in a state that does not contain any impurities. Next, as shown in FIG.

# Impurities (e.g. phosphorus, pone) using oxidation method.

Non-conductive polycrystalline silicon that does not contain arsenic, etc.; 1 Forms a capacitor's current covering BSS on the surface of the coating 530 6
Next, using an ion-implanted tube, the electrically conductive silicon coating 53 is coated with the electric wire I! Impurities (eg, phosphorus, boron, arsenic, carbon dioxide) are introduced via 55. As a result, the non-conductive polycrystalline silicon film 53 becomes a conductive polycrystalline silicon film.

This is shown as 54, and then, as shown in Figure 9, the capacitor's upper capacitor @59 (for example, an aluminum layer, a conductive polycrystalline silicon layer, a molybdenum layer, a platinum layer, or a metal alloy layer 1 of these) is The provision K forms a capacitor.

FIGS. 10, 11, and 12- are ninth views illustrating individual embodiments of the present invention, and show cross-sections of the ronde/su in each production 111. No. 101 5
Cough, 51 is a semiconductor board, 62 is a 4vm for enemy expansion! It is a membrane. A diffusion barrier 62 (for example, dual-layer silicon) is formed on the semiconductor substrate 51.

Next, as shown in FIG. 11, a desired crane and turtle body cover 11168 is formed using a thermal oxidation method. After that, impurities (phosphorus, phosphorus, arsenic) were added using ion implantation.

etc.) is introduced through the semiconductor substrate 51Kliil and the electric sheath 1lIs8 to return the lower part of the capacitor s1. Thereafter, a capacitor is formed by forming an upper electrode Js9 (an aluminum layer, a conductive polycrystalline silicon layer, a molybdenum layer, a platinum layer, a metal alloy layer thereof, etc.) of the capacitor.

According to the present invention, when forming a dielectric film on a capacitor built into a semiconductor integrated circuit, a polycrystalline silicon film or a semiconductor substrate layer, which will become the lower electrode of the capacitor, is coated in advance with a thermal oxidation method to form a desired dielectric film. After forming the body film, impurities are introduced through the electrifying body glands using ion implantation, which eliminates the d-electrification caused by impurities, which is a disadvantage of the conventional method, when rounding the lower electrode of the capacitor to make it conductive. Control of body coating ms, uniformity of film thickness, and reproducibility of film thickness are extremely 1.
! It's easy. In addition, compared to the CVD method, since the film quality of the contact layer is good, it can be electrically imitated and a highly reliable contact layer can be obtained.

[Brief explanation of the drawing]

Figures 1, 2, and 31 are diagrams for explaining the conventional method of tortoise, and Figures 4, 5, and 6 are diagrams for explaining the second conventional method. Fig. 7-1 Fig. 8 is a diagram for explaining an example of the 5th bFi main generator, j@10-1 11th
-For explaining other embodiments of the present invention-
It is. In the figure, 11.51 is the semiconductor a board, 12°52 is the coating, 16.62 Fi expansion protection, 13°18.55.5
8 company dielectric coating, 15.1'l. The upper electrode of the ss#'i capacitor is shown. Pavilion 1

Claims (1)

[Claims] In the production of semiconductor integrated circuits, single crystals containing no impurities, or single-crystalline hemimethomorphic membranes [IIB] are used to produce single-crystal 111 membranes and sell them. -Iron single crystal through an electric coating, or a single crystal &! llIh Ushihiro Body Layer 1
Moxibustion of 4 cow bodies horizontally 11 [111 connections] characterized by enlarging the impurity tube by ion implantation method in 1, forming a lower electrode with cedar, and installing a lower electrode on the above-mentioned crane and turtle body exchange. Construction method.