JPS58159092A - Public-address system incorporating delay circuit - Google Patents

Abstract

PURPOSE:To prevent the occurrence of the echo between speakers and prevent howling, by providing a digital delay circuit between a microphone input part and an amplifying stage of a loudspeaker and delaying an inputted sound signal by a preliminarily set prescribed time. CONSTITUTION:The sound signal inputted from a microphone 1 is converted to a digital signal through an A/D converter 2 by pulses from a sampling pulse generator 4 and is stored in a memory 3 successively. The first-the n-th clock pulses of a reference clock frequency generator 5 are counted through a counter 6 by an address pulse counter 7 and are decoded as the first-the n-th addresses of the memory 3 through an address decoder 8. The value (n) is changed by the output of a repeat frequency determining counter 9 which is set by a delay time designating switch 10. The signal read out from the memory 3 is transferred to the amplifier incorporated in the loundspeaker through a D/A converter 12, thus preventing the occurrence of the echo between speakers and preventing howling.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a loudspeaker device in which a digital delay circuit is newly connected between a microphone input terminal of a loudspeaker and an amplification stage.

(Background Art) A large number of speakers are usually used to transmit audio in large venues such as lectures and sports days. The sound input through the microphone is amplified by the loudspeaker, and the sound is output from speakers throughout the venue. At this time, the following problem arises.

(1) The propagation speed of sound in the air is about 340 m/s, which is much slower than the propagation speed of radio waves. For this reason, if the venue is large and there is some degree of communication between the person speaking through the microphone and the audience, or if two or more speakers are used, the differences in the arrival time of the sound to the listening position may cause It can be heard as a loose echo, giving the audience a hard-to-hear feeling.

(2) Since a public address system forms a closed circuit that includes a sound field, for example, if a microphone and a loudspeaker are placed close to each other and the gain of the amplifier is increased, a type of oscillation phenomenon called so-called no-ring will not occur. .

(Objective of the Invention) In order to solve these problems, the object of the present invention is to newly provide a delay circuit processed by a digital signal between the microphone input terminal of the loudspeaker and the amplifier circuit, and to solve the following problems. Explain in detail.

(Structure and operation of the invention) FIG. 1 is a block diagram showing an embodiment of the invention. In the figure, 2 is an A/D converter which converts an audio signal, which is an analog signal input from the microphone 1, into a digital signal according to sampling pulses. 3 is a memory that stores the digital signal (g) from the A/D converter 2 in sequence according to the sampling pulse. 4 is a sampling pulse generator. The sampling frequency varies depending on the fidelity of the sound to be reproduced. ~50K) Iz. 5
is a reference clock frequency generator, which generates clock pulses. A counter 6 generates an address pulse for the memory 3. An address pulse counter 7 counts the address pulses from the counter 6 from 1 to n. The value of n changes based on the delay time described later. 8
is an address decoder which decodes the address pulses counted from 1 to n as addresses 1 to n of the memory 3.

9 is a repetition frequency determining counter that counts clock pulses for a preset delay time.

Reference numeral 10 denotes a delay time designation switch, which allows the delay time to be designated as desired. Reference numeral 11 denotes an information launch memory for temporarily storing the signals read out from the memory 3.

12 is a D/A converter that converts the audio digital signal from the information latch memo January 1 into an audio analog signal and transmits it to the amplifier built in the loudspeaker.

Next, regarding the read and write operations of the memory 3, the second
This will be explained using the time chart shown in the figure. The repetition frequency determining counter 9 generates pulses 13 and 14 at every predetermined delay time (bl. Address-Pulse counter 7 generates pulses 13 and 14 from the counter 6 within the delay time determined by the pulses 13 and 14). Based on the address pulse, the next clock after the pulses 13 and 14 is set as 1, and the count is sequentially counted up to n.

An address decoder 86 decodes the pulses 1 to n as addresses of the memory 3. This situation is shown in the figure FC)K. In the same figure (C), the pulse 15°1
8 indicates address 1 of memory 3, pulse 16 indicates address 2, 17
indicate address n, respectively.

The contents stored at the address of the memory 3 specified by the address decoder 8 are the address pulses 15 and 16.
, 17 , 18 are read out in synchronization with the read pulses 19 , 20 , 21 , 22 which are generated in synchronization with the next clock pulse of the clock pulses 19 , 20 , 2
A write pulse B is generated in synchronization with the next clock pulse of 1 and 22, A is generated in synchronization with 24, 25, and 26.
A new audio digital signal output from the /D converter 2 is stored.

This situation (di, (shown in el. For example, address 1 (
Address pulse 15)K When paying attention, the audio digital signal written in synchronization with write pulse 23 is read out in synchronization with read pulse O when the same address is specified next time (address pulse 18). Information latte memory 11
is memorized. In other words, the audio digital signal has a delay time predetermined by the repetition frequency determination color/repetition 9.
The output signal is delayed by the time from when pulse 13 is generated until when pulse 14 is generated.

The notched audio digital signal stored in the information latch memory 11 is read out by a sampling pulse, and
The A converter 12 converts the signal into an audio analog signal, which is sent to an amplifier built into the loudspeaker, where it is amplified and then output from the speaker. Note that a shift register may be used to output a plurality of delay times from one memory.

Here, the relationship between the delay time and the required number of pits will be explained. For example, when delaying by 0.1 seconds (equivalent to 36 m), if high quality is required,
616 Kbits/sec with 4-pit A/D conversion and 44 KHz sampling, so 62 in 0.1 seconds
・K bits is sufficient. Also, if A/D conversion is performed using the AI) ■) CM method, 4-bit A/D conversion and sampling at 8KHz will result in 32 bits/sec, so 0.
At 1 second, it is sufficient to have a pit at only 3.2 seconds.

In the first embodiment, the delay time designation switch 10 is set after calculating the delay time in advance. It is also possible to detect the analog signal, convert it into a digital signal using an A/D converter, input the digital signal to a delay circuit via the delay time specifying switch 9, and automatically change the delay time.

(Effects of the Invention) As explained above, according to the present invention, the configuration is such that a digital delay circuit is provided between the microphone input terminal of the loudspeaker and the amplification stage, and an audio analog signal is converted into an audio digital signal. Since the audio digital signal is delayed and outputted to the amplification stage, echoes can be prevented from occurring even when there are two or more speakers, and clear sound can be heard. Furthermore, even when howling occurs in close proximity to the microphone, due to the time delay of the signal, high-pitched oscillations do not occur, causing no discomfort.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a digital delay circuit according to the present invention, and FIG. 2 is a diagram showing a time chart of the block diagram shown in FIG. 1...Microphone 3...Memory 4...Sampling pulse generator 5...
・Reference clock frequency generator 9...Repetition frequency determination counter 10...Delay time designation switch 11...Memory for information latch Patent applicant Oki Electric Industry Co., Ltd. Patent application agent Private patent attorney Megumi Yamamoto −

Claims (2)

[Claims] (1) A delay circuit section is provided between the microphone input section and the amplification stage of the loudspeaker, and the delay circuit section converts an audio analog signal input from the microphone into an audio digital signal; a memory that stores an audio digital signal in synchronization with a write pulse; a frequency determination counter that outputs a pulse at predetermined intervals for determining a delay time given to the audio digital signal; and a frequency determination counter that stores a pulse in synchronization with the output of the frequency determination counter. and a D/A converter that reads an audio digital signal from the memory using a readout pulse generated by the microphone and converts the signal into an audio analog signal. A loudspeaker device with a built-in delay circuit. (2) The device according to claim 1, characterized in that the pulse interval of the frequency determining counter for determining the delay time is based on a signal detected from a temperature sensor.