JPS58158945A - Semiconductor device - Google Patents

Abstract

PURPOSE:To manufacture the highly moisture-resistant IC by a method wherein a polyimido base resin film as a polymer is provided on a semiconductor substrate and the metal wiring layer containing semiconductor or any other metal is laminated to be sealed with resin. CONSTITUTION:The N<+> epitaxial layer on P<-> type Si substrate wherein N<+> layer is embedded is separated by P layer to form a bipolar transistor and the island region providing Al wirings 13-15 through SiO2 film 4 and Al-Si alloy wiring layer 17 is further provided utilizing PIIQ resin (polyimide base resin) 16 as an interlayer insulating film. The layer 17 is again coated with PIIQ 18 to be finished. Said layer 17 may be added with Ni, B and others in addition to Al. The Si addition shall be limited to the range of 0.1-10wt%. The PIIQs 16, 18 as polymer are provided with more elasticity than that of SiO2 absorbing thermal stress in case of sealing not to be exfoliated from wiring layer. Besides, Al crystalization is disturbed by PIIQ and the crystalized particles are prevented from expanding by addition of Si remarkably retarding the corrosion due to water permeation. Through this constitution, the highly moisture resistant IC may be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, particularly a semiconductor integrated circuit device having a two-layer wiring structure (hereinafter, semiconductor integrated circuit device is simply referred to as an IC).
).

In a semiconductor integrated circuit device having two (aluminum) wiring layers, the applicant of the present application has previously proposed an insulating film between the first Al wiring layer and a second Al wiring layer, and a final passivation layer. We have developed a semiconductor integrated circuit device using a polyimide resin film.

This semiconductor integrated circuit device is usually made of thermosetting resin (resin).
It is sealed and used. The first reason for using resin sealing is that the material cost is low, and the second reason is that manufacturing can be easily rationalized and costs can be reduced.

By the way, when the inventor of this application investigated the moisture resistance of the above-mentioned resin-sealed semiconductor integrated circuit device, it was found that
It was found that corrosion of the second Al wiring layer occurred when exposed to high temperature (high temperature atmosphere).

The following may be considered as the reason for the above-mentioned drawbacks.

In a resin-sealed semiconductor integrated circuit device, moisture that has entered from the outside through the resin molding body or water that has entered through the boundary between the external lead and the resin can be absorbed into the bonding pad made of the second layer A/. Corrosion is thought to occur because the metal reacts with the wiring layer connected to the bonding pad.

According to the research of the inventor of the present application, it is possible to transmit IO through the sealing resin.
The time required for water to reach the pellet surface is IO
It is proportional to the square of the resin film thickness on the upper part of the pellet surface and is shorter (
I knew what was going to happen. It was also found that the polyimide resin film does not have the ability to prevent moisture from permeating, and that when moisture reaches the surface of the IO pellet, it simultaneously reaches the kl wiring layer, causing the temperature to drop to .degree. Furthermore, according to the research of the present inventor, the polyimide resin film (1) has no cracks, so there is no intrusion of moisture from the crank;
(2) On the other hand, since it is an organic substance, it has the disadvantage that it inherently contains water inside. The inventor of the present application investigated a semiconductor integrated circuit device using polyimide resin and confirmed that it contains up to 3 weight of water.

The above-mentioned corrosion of AI wiring due to moisture is a major factor in reducing the reliability of resin-sealed semiconductor integrated circuit devices. Therefore, it is especially important to reduce the size and thickness of the package (package thickness is about 2M).
It has been difficult to resin-seal IOs used in camera ICs that require high reliability or in industrial fields that require a high degree of reliability.

An object of the present invention is to improve the moisture resistance of a semiconductor integrated circuit device, thereby achieving a resin-sealed semiconductor integrated circuit device with high reliability! It's about getting.

Another object of the present invention is to improve the moisture resistance of the upper aluminum wiring layer of a resin-sealed semiconductor integrated circuit device in which polyimide resin is conveniently used as an interlayer insulating film between at least two aluminum wiring layers of the semiconductor integrated circuit device. The aim is to improve

According to the present invention, the crystal orientation of a metal wiring layer to which semiconductor or other metal impurities is added is disturbed, and that the metal wiring layer formed on the surface of a polymer film such as polyimide resin becomes even more crystalline. This was done based on the idea that the path of intergranular corrosion caused by moisture is lengthened, and at the same time, the denseness of the grain boundaries is improved based on the phenomenon that the orientation of the grains is disturbed. Therefore, the present invention resides in a semiconductor device or a semiconductor integrated circuit device characterized in that a metal wiring layer containing a semiconductor or other metal impurity is formed on the entire surface of a semiconductor substrate via a polymer film. .

1 and 2 show a semiconductor integrated circuit device formed according to the present invention, FIG. 1 shows a cross-sectional view of an IO pellet, and FIG. 2 shows a structure in which the semiconductor pellet is sealed with resin. 1 is a schematic cross-sectional view of a resin-sealed semiconductor integrated circuit device. The embodiment shown in FIG. 1 is commonly used for bipolar type ICs, and for the sake of simplicity, FIG. 1 specifically shows a bipolar transistor formed in one element formation region. Only the structure of is shown.

In FIG. 1, the IC pellet 21 includes the following configuration. 1 is a P-type single silicon (Si) semiconductor substrate, 2 is an N+ type semiconductor buried layer, 3 is an N- type silicon semiconductor layer formed on the substrate 1 by epitaxial growth technology, and 4 is a semiconductor 4000A covering the main surface of layer 3
2-carbon silicon (sto,) with a thickness of ~8000A
A and 5 are P-type isolation regions formed by diffusion technology in order to electrically isolate the semiconductor layer 3 into a plurality of element formation regions (islands), which surround the element formation regions to be separated. 5) C is formed. 7 is a P-type base region formed by diffusion technology, 9 is an N+ type emitter region, and 10 is an N+ type collector extraction region (contact region).

13. 14 and 15 are first (lower) aluminum wiring layers that are in resistance contact with the ivy, base and collector regions, respectively, and extend over the silicon oxide IX4 soil. This wiring layer has a thickness of, for example, 1.75 μm and a thickness of 3 μm.
Has a fluency of m.

Reference numeral 16 denotes polyimide resin II (polyimide resin film), which has a thickness of, for example, 411 m. The polyimide resin material of this membrane generally has a composition of a dianne compound and an acid anhydride.
-43013 publication, i.e. 4.4
'-Diamino diphenyl ether-3-carbonamide: 5 mol%, 4゜41-diaminophenyl ether:
45 molar, anhydrous pyromellito M: 25 molar, 3.3'
, 4.4'-benzophenonetetracarboxylic dianhydride; 25 moles;
- Melt VC with a solvent consisting of methyl-2-pyrrolidone 50 weight - 1N and N-dimethylacetamide 50 weight to give an appropriate concentration and viscosity. Apply CC and heat cure at a temperature of, for example, 350°C. Can you get membrane? This preferred polyimide resin material is referred to as %K, polyimide-isoindro-quinazolinedione resin.

This resin has superior heat resistance compared to other polyimide resins.

Reference numeral 17 denotes a second wiring layer made of an alloy layer of aluminum and silicon, which electrically connects the elements. This metal layer is mainly composed of aluminum and contains 2 weight parts of silicon. As will be described later, this silicon additive improves the moisture resistance of the second aluminum wiring layer,
That is, it acts to prevent corrosion of aluminum due to moisture. The amount of silicon added is 0.1
It can be selected within the range of 10% by weight. That is, 7Jol of silicon is determined by taking into consideration the conductivity of the wiring layer and the bondability of the wire to the bonding pad portion, which will be described later.

Silicon additives to the aluminum wiring layer are described in 5 below: They prevent the entry of hydrogen atoms, which exist at aluminum grain boundaries and promote intergranular corrosion, and disturb the regular arrangement of aluminum crystals. As a result, it acts to prevent corrosion of aluminum materials due to moisture. Instead of this semiconductor additive such as silicon,
Additions of metals such as nickel or boron can also act in a similar manner to the addition of silicon and, as a result, can prevent corrosion of aluminum materials. According to the present invention, in addition to the aluminum material doped with silicon, it is also possible to use an aluminum material doped with nickel or boron for the second wiring layer.

Two or more types of boron can also be added.

This second aluminum wiring layer containing silicon has a thickness of, for example, 3.5 μm and a ring of 4 μm.

This layer is thicker than the first aluminum wiring layer 13 to prevent an increase in the wiring resistance of the second wiring layer due to the addition of silicon, and also prevents the semiconductor integrated circuit from increasing the thickness of the second wiring layer. The heat dissipation generated from the equipment can be reduced.

A 2111th polyimide resin 18 extends to cover the second wiring layer, and can be made of the same material as the polyimide resin of the first layer. The thickness of this second polyimide resin is, for example, 4 μm. Although not shown, the second layer polyimide resin film exposes a plurality of bonding pads connected to the second layer wiring layer VC. This exposed bonding pad portion has an area of, for example, 130 μm×130 μm.

This semiconductor device is sealed with resin, as shown in FIG. That is, in FIG. 2, 21 is the above-mentioned semiconductor chip, in which KFFF circuits are integrated.

The semiconductor chip 21 has a fixed electrode (tab electrode) 22 with gold.
It is fixed with silicon eutectic alloy or the like, and is electrically connected to other external lead leads 23 by connector wires 24.

The fixing of the semiconductor pellet 21 to the fixed electrode 22 and the connection of a connector wire (for example, made of a full length) between the semiconductor pellet 21 and the external lead-out lead are achieved by well-known techniques. As is well known, the connection between the semiconductor pellet and the connector wire is made in the state of the lead frame. A sealing body 25 is made of epoxy resin and is formed by a known transfer molding technique. This sealing body 25 is formed to surround the semiconductor pellet 21 and the connector wire 24V.

According to the present invention, the thickness of the resin molding body can be reduced. Generally, the thickness of the resin molding body is made thicker in order to reduce the degree of moisture reaching the semiconductor pellet from the outside through the molding body. However, in the present invention, as will be clear from the explanation below, the moisture resistance is improved inside the sealing body.
The thickness of the sealed body can be reduced. For example, in the above example a thickness of 2-3 mm was selected. This is for use in electronic devices with limited mounting space! This is extremely advantageous in terms of ease of use.

In the semiconductor integrated circuit device of the present invention thus completed, the lower surface of the second layer (upper layer) wiring layer 17 is covered with the first layer (single layer) polyimide resin film 16, and Its upper surface is covered with a second layer (upper layer) of polyimide resin 1a18. Of course, the upper wiring layer includes the connection portion of the connector wire 24 shown in FIG. has been done. Then, the second layer polyimide resin film 18
A resin body 25 for sealing is in contact with and surrounded by.

Next, the manufacturing process of the semiconductor integrated circuit device of the present invention will be explained with reference to FIGS. 3A to 3H. Third
Figures A to 3H show cross-sectional views of the semiconductor chip at each step for explaining the process of expanding the semiconductor chip shown in Figure 1.

The semiconductor chip 21 is provided with elements such as transistors, diodes, and resistors, and mutual wiring for obtaining a predetermined circuit, but for ease of understanding, only a cross-sectional view of a transistor forming portion is shown.

A) Prepare a P-type Si substrate 1. The surface is oxidized by heat treatment and photoresist WI1. form a selection. Next, the oxide film is etched to form an N+ type buried layer 2.
Inject phosphorus, which is an impurity. After this, the photoresist film,
! ! The dioxide film is removed and a N-W epitaxial layer 3v is grown. (Figure 3A) B) Oxidize the surface by heat treatment,
A silicon oxide film 4v is formed. A photoresist film is selectively formed and the oxide film 4 is etched and notched. The photoresist film is removed, and a P-type impurity is thermally diffused to form a .degree. C. aisle silicone layer 51. At this time, a silicon oxide film 6 is simultaneously formed. (Figure 3B) C) Photoresist is selectively formed, the oxide film 4 is etched, and the photoresist film is removed. For example, boron is thermally diffused as a P-type impurity to form the base region 7v.

At the same time, silicon 1:/oxide film 8 is formed.

D) Selectively form a photoresist film, etch the oxide film 4, and remove the photoresist film. For example, boron is thermally diffused as an N-type impurity to form the emitter region 9. A collector electrode connection region 10 is formed. At the same time, silicon oxide films 11 and 12 are formed.

(Figure 3D) E) Selective formation of photoresist family. 4000A~80
The oxide film 4 having a thickness of 00A is etched and the photoresist film is removed. For example, 1.75 μm of AI is deposited. A photoresist film is selectively formed, AI# is etched, and the photoresist film is removed to form the electrode and wiring layer 1.
3,14.15'. (Fig. 3E) F) Apply polyimide resin 16 to the entire surface and heat it at 350°C.
, heat treated in N gas atmosphere for 30 minutes to a thickness of 4 μm.
1 fl of a film having mV is formed. (Fig. 3F, 1) G) Selectively form a photoresist film, and using this as a mask, remove the polyimide resin film 141 by etching technology, thereby forming a contact hole corresponding to the first layer AJ wiring layer 13. . After this, the photoresist mask is completely removed. Next, a metal film Y, which will become a second wiring layer, is formed using a vapor deposition technique. At this time, the metal material conveniently used as a vapor deposition source is an aluminum-silicon alloy made of aluminum as the main component and silicon added.

The ratio of silicon added is 2 parts by weight to 98 parts by weight of aluminum - JiIIbx. This vapor deposition yields a silicon-filled aluminum layer with a thickness of approximately 3.5 μm. this! An aluminum wiring layer 17 containing 2:11% silicon is formed by battening. (
Figure 3G) H) Apply a polyimide resin film to the entire surface and apply
C. for 30 minutes in a N gas atmosphere to form a 4 μm polyimide resin film. Thereafter, a photoresist film is selectively formed to form a bonding pad, and the second polyimide resin film 18 is etched to expose the bonding pad portion made of the second aluminum layer. 1 C to be removed (Figure 3H) The first polyimide resin layer and the second polyimide resin film are generally polyimide thread resins composed of a diamine compound and an acid anhydride, and are preferably Examples include polyimide-iso-indoquinazolinedione resins, as mentioned above.

This resin is applied to the surface of the semiconductor pellet while being made into a solution with a solvent, and is heat-treated at a temperature of 350° C. to 400° C. to a hardened state. In forming this polyimide resin film, if it is desired to form a thick polyimide resin film, the polyimide resin film coating step and heat treatment step can be repeated. For example, a polyimide resin film coated in advance may be heated at a temperature below 300°C, for example 200°C, for 30 minutes to bring it into a semi-cured state, and then a second polyimide resin film is applied on top of this film. A thick polyimide resin film can be formed by heat-treating this at a temperature of 350° C. to 400° C. to bring it into a hardened state.

In the above manner, a large number of semiconductor integrated circuits formed on one wafer are divided into individual semiconductor chips 5, which are then sealed with epoxy resin 25 as shown in FIG. Complete the integrated circuit device.

In the above step G, when forming 1'l of ℃ wiring by vapor depositing Kl, AJ was added with 81, but the amount of 8i added was in the range of about 0.1 to 10 d, as mentioned above. selected.

Reliability can be improved as the amount of silicon added is increased by 't' mm.If the power exceeds 9.5 weight esv, the resistance of the wiring layer gradually becomes impossible to ignore, so the amount of silicon added should be 10 weight or less. is appropriate.

The corrosion-resistant effect of the wiring layer obtained by the present invention will be fully understood from the following experiments, experimental results, and consideration of the experimental results.

First, IO pellet vNi resin-sealed samples having the cross-sectional structures shown in FIGS. 4 to 9 by the known transfer molding method were prepared.

(11Sample A (Figure 4): This s amp
For l e 4, a thermal oxide film (8i0.) Y with a thickness of 9.4 Am was formed on the S-th 1con wafer (8i), and K pure aluminum (Pure aluminum) was formed on the thermal oxide film.
kl ), and the wiring layer is made of polyimide-isoindolo-quinazolinedione resin (hereinafter referred to as PIIQ resin) with a thickness of 1.8 μm.
It has been preserved. This wiring layer made of pure AJ was obtained by electron beam evaporation.

(218Hmple B (Figure 5).

This Sample B is different from the above-mentioned Sample A in the material of the wiring layer. That is, Sample
The wiring layer in B is made of aluminum (AJ-8i) containing 2-wet silicon and is obtained by electron beam evaporation.

(3) Sample O (Figure 6): This 8Hmp
LE O differs from the above-mentioned Sample LE in the method of forming the wiring layer. In other words, this wiring layer is pur
e aluminumv was placed in a boron nitride boat and subjected to resistance heating vapor deposition.

According to this wiring layer forming method, boron in the boron nitride boat is scattered and contained in the wiring layer. Therefore, the obtained wiring layer is made of Boron4-containing aluminum (AJ-B).

(41Sample D (Figure 7): This Sample
e D is PII with a thickness of 3.6βm on Si wafer
Qlil fat WII is formed and pure is applied on the resin film.
A wiring layer made of Al was formed, and the wiring layer was protected with PIIQ resin having a thickness of 1.8 μm. This wiring layer made of pure A4 was obtained by electron beam evaporation.

(5) Sample E (Figure 8): This 8Hm
ple E is related to the present invention, and the above Sa
In mple D, the material of the wiring layer is different. In other words, the wiring layer in this 8Hmple E is 2We.
It is made of AI containing tS of 81 (AI-8i) and was obtained by electron beam evaporation.

(618Hmple k” (Figure 9): This Samp
le F is related to the present invention, and the above 8am
The method of forming the wiring layer is different in ple D.

In other words, this wiring layer is pur like SampleO.
e aluminum was put into a boron nitride port and deposited by resistance heating.

Prepare 15 of each of these Samples, and
The samples were left at 21° C. and a vapor pressure of 2 atm, and the number of samples at which corrosion of the wiring layer began was observed. So-called 4 tests were performed on these samples.

The results of the brasure tack test are shown in FIG. In the figure, the horizontal axis indicates the time during which the test piece was left in the above state, and the vertical axis indicates the ratio of the number of corrosion failures Nc to the number of tests N, that is, the corrosion failure rate.

As is clear from FIG.
In sample B and 8ample F, the rate of corrosion of the wiring layer is slow. In Sample B, the corrosion progress rate is extremely slow. That is, Sample E and Sa
Sample F has improved corrosion resistance compared to Samples A, B, O, and D.

As a result of examining the difference in corrosion rate among these Samples, it is believed that the difference is due to the following reasons. Hereinafter, using FIG. 11 to FIG. 14, the samples will be explained in order from the highest corrosion rate.

In addition, @Figure 11 to 141W are especially Samples.
D.

It is a crystalline 1g1v model of the cross section of the wiring layers A, B, and B.

(11Ssimple D: In a pure aluminum layer, the preferential orientation is strong,
In addition, since it has a strong fibrous structure, it has a structure in which crystals having the same tenth order [(100) direction] are arranged in a fibrous form. However, since the underlying insulating film is a polymeric PIIQ resin film, the crystal orientation of AI is somewhat disturbed (see FIG. 11). Therefore, the path of intergranular corrosion due to moisture is a little long (although the PIIQ resin film above and below the wiring layer is an organic substance and essentially contains moisture.
Q Intergranular corrosion of the wiring layer is rapid due to the influence of moisture from the resin itself.

(2) Sample A: Sin whose underlying insulating film has a specific crystal structure.

Since it is a film, the crystal orientation of A4 is aligned in the (111) direction (see FIG. 12). Therefore, the path of intergranular corrosion due to moisture is short. However, since the 8i0° film itself does not contain water and is a dense film, Sample D
Its intergranular corrosion is slow compared to that of .

(318ample B: Since silicon is contained in the AI wiring layer, the preferential orientation of A7 itself is weakened (see Figure 13). In other words, the crystal orientation of AI is K(200), (
220) and (311) are mixed. Therefore, the rate of intergranular corrosion inside the wiring layer is slow.

A41 Sample O: This is because this Sample O has weaker orientation in one preference than Sample B.

(5) Sample F (present invention): This 8am
ple F is essentially not much different from the phenomenon of 8ample E described below. However, Sample
e It is thought that the preferential orientation is stronger than that of B.
Compared to B and O, the preferential orientation of AI is even weaker. In other words, the orientation and arrangement of the crystals are disordered, ii! Insects are crowded and arranged in a disorderly manner.

For this reason, intergranular corrosion of aluminum progresses in a uniform manner along the grain boundaries, so the more the crystals are arranged randomly, the less intergranular corrosion progresses from the surface to the inside. In addition, due to its catalytic action, the added silicon prevents the hydrogen molecules, which are generated by the corrosion reaction between aluminum on the surface and water, from diffusing into the interior along the grain boundaries. Make it into H1 shape. For this reason, the hydrogen atoms H diffused inside along the grain boundaries actively react with each other, resulting in hydrogen molecules H1
It is possible to prevent grain boundaries from widening due to volumetric expansion. Therefore, it becomes difficult for moisture from the outside to penetrate into the inside, and the progress of intergranular corrosion is further reduced.

Therefore, in order to improve the corrosion resistance of the wiring layer, it is extremely effective to contain a semiconductor or metal in the wiring layer as in the present invention and to use a polymer film as the underlying film. be.

Next, the effects of a specific embodiment of the present invention will be described in detail using FIG.

The polyimide resin films 16 and 18 surrounding the second wiring layer 17v have more elasticity than a glass passivation film such as a silicon oxide film, so they are used for sealing when forming the sealing body 25. It acts to absorb thermal stress (strain) generated by heat treatment of the epoxy resin and prevents peeling between the wiring layer and the insulating film. This prevents moisture from penetrating into the interface between the layer 11 and the insulating film, thereby further improving the moisture resistance.

That is, when the sealing body 25 is generally formed using a sealing resin such as an epoxy resin, the sealing body is formed by transfer molding technology, but at this time, the sealing resin is melted in the molding machine. When it cools and hardens, thermal stress or strain occurs due to the difference in thermal expansion coefficient between each part of the resin encapsulation and the semiconductor pellet, and each component of the encapsulation resin undergoes a crosslinking reaction and polymerizes. Stresses are generated when the volume shrinks due to progress, and these stresses are applied to the semiconductor pellet. At this point, due to the mold stress, the wiring layer and the insulating film that is adjacent to it tend to separate.

However, according to the present invention, since polyimide resin is used as the insulating film, it has elasticity against stress, and its b force! absorb. For example, while the elongation rate of a silicon oxide film (SiO2 film) generally used as a padding run is less than Is, the elongation rate of a polyimide resin film is 30% at °C.

On the other hand, since the elongation rate of the insulating film due to mold stress is several -, the mold stress during resin sealing can be absorbed. As a result, separation between the wiring layer and the insulating film can be prevented.

As is clear from the above description, according to the present invention, a highly reliable resin-sealed semiconductor integrated circuit device with improved moisture resistance can be obtained.

The present invention can be modified in various ways without changing its main points.

That is, the present invention is also applicable to a resin-sealed semiconductor device or a resin-sealed semiconductor integrated circuit device configured with a single layer of wiring. In this case, for example, aluminum containing silicon V is used as the first wiring layer, and a polyimide resin, particularly the above-mentioned PIIQ resin film, is used as the underlying insulating film for the first wiring layer. Note that this polyimide resin film is preferably formed not in contact with the surface of the semiconductor substrate, but via a dense badge-base film such as an 8IO1 film formed by thermal oxidation.

Of course, in the semiconductor integrated circuit device having the above-mentioned two-layer wiring structure, the first wiring layer may have the above-described structure.

[Brief explanation of the drawing]

FIG. 1 is a partial sectional view of a semiconductor chip in a semiconductor integrated circuit device according to the present invention, and FIG. 2 is a resin-sealed mold according to the present invention completed by resin-sealing the semiconductor chip shown in FIG. Schematic cross-sectional view of semiconductor integrated circuit device, Figure 3A ~ @
Figure 3H is a cross-sectional view showing the manufacturing process of a semiconductor integrated circuit device according to the present invention, Figures 4 to 9 are schematic cross-sectional views of the semiconductor integration port W and device used in the experiment, and Figure 10 is a diagram showing the corrosion of the wiring layer. Characteristic diagrams showing the occurrence state 11v, and FIGS. 11 to 14, are diagrams each modeling a crystalline WA in a cross section of a wiring layer. Agent Patent Attorney Bo 1) Li Xin Figure 2 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9

Claims (1)

[Claims] 1. Polymer W formed on the entire surface of a semiconductor substrate;
1. A semiconductor device comprising a first film and a metal wiring layer containing semiconductor or other metal impurities formed on the surface of the first film. 2. The semiconductor device according to item 1, wherein the first film is made of polyimide resin. 3. Polymer first layer formed on the entire surface of the semiconductor substrate
a semiconductor device comprising a film, and 11 layers of metal arrangement containing semiconductor or other metal impurities formed on the surface of the first film; a resin body for sealing the semiconductor device;
A resin-sealed semiconductor device consisting of: