JPS58158564A - Wiring testing for printed circuit board - Google Patents

Wiring testing for printed circuit board

Info

Publication number
JPS58158564A
JPS58158564A JP57041069A JP4106982A JPS58158564A JP S58158564 A JPS58158564 A JP S58158564A JP 57041069 A JP57041069 A JP 57041069A JP 4106982 A JP4106982 A JP 4106982A JP S58158564 A JPS58158564 A JP S58158564A
Authority
JP
Japan
Prior art keywords
printed wiring
resistor
printed circuit
common electrode
probe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57041069A
Other languages
Japanese (ja)
Inventor
Yuji Fumino
文野 裕二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57041069A priority Critical patent/JPS58158564A/en
Publication of JPS58158564A publication Critical patent/JPS58158564A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

PURPOSE:To achieve an accurate inspection of wiring of a printed circuit board by measuring the resistance between a point on a printed circuit and a common electrode of a flat resistor after the board is pressurized on the flat resistor where a bar-shaped resistor body is arrayed vertically in a matrix. CONSTITUTION:A printed circuit board 1 is set on the upper portion of a flat resistor 13 where a bar-shaped resistor 14 is arranged and pressurized with a clamping device 16. A probe 10 is positioned with a X- and Y-double axis NC control mechanism and a voltage is applied between the probe 10 and a common electrode plate 15. Consequently, current flows between a land 18 and a circuit 11 and a land 19 and the common electrode plate 15 through a bar-shaped resistor 14 via a through hole 12. The current is measured with a resistance decision section 6 and compared with values of respecting circuits 11 prememorized into a control section 5 to determine the propriety of the circuits 11. According to this method, the condition of the wiring can be detected simply by measuring combined resistance values with only one probe.

Description

【発明の詳細な説明】 本発明は印刷配線板の布線試験方法に関するものである
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a wiring test method for printed wiring boards.

印刷配線板lおける需要の拡大と多品種少量化、高密度
化に伴ってその布線試験を能率良(低コストで実現する
ことは重要な課題である。
With the increasing demand for printed wiring boards, the reduction in the number of different products, and the increase in density, it is an important issue to realize wiring tests efficiently (at low cost).

第1図は、従来一般的に行われている布線試験方法を説
明する図で、印刷配線板lに印刷された回路の両端2点
の検査点総数に対応したスプリンググローブ3をグロー
ブ配列板8に配置し、印刷配線板1どスプリングプロー
ブ3がそれぞれの検査点に接触するよ51fCプロ一ブ
配列板8を位置合わせした上で加圧力2を加えて電気的
接続を得て布線試験を行っていた。即ち、各スプリング
グローブ3をすべてスキャナ4に配線し、制御部5で駆
動されたスキャナ4が内蔵したスキャナ素子(図示せず
)により回路の両端に対応したスプリングプローブ30
2点を順次選択し、電圧を印加してその2点間の抵抗値
を抵抗判定部6で測定して、予め制御部5に記憶させた
正常値と比較判定していた。従って、従来の布線試験方
法は、スキャナ4が印刷配線板1のすべての検査点にわ
たってその2点の組み合わせでスプリンググローブ3を
介して選択しているため、検査点総数に対応した数のス
プリングプロー・プ3とスキャナ4に内蔵したスキャナ
素子が必要である。又、印刷配1IIl板1の品種ごと
に、スプリンググローブ3を配置したグローブ配列板8
を準備する必要があり、その変換と接続に多大の時間が
必要となり多品種少量生産の印刷配線板1の布線試験に
は非常KA価なの高密度化は検査鳶配列ピッチの縮小を
もたらしスプリングプローブ3を対応して配置すること
が困難となり、布m試験が不可能な印刷配線板も出てく
る等の欠点があった。
FIG. 1 is a diagram explaining the conventional wiring test method, in which spring gloves 3 corresponding to the total number of inspection points (two points at both ends of the circuit printed on the printed wiring board L) are placed on the glove array board. After aligning the 51fC probe array plate 8 so that the printed wiring board 1 and the spring probes 3 come into contact with the respective test points, apply pressure 2 to obtain an electrical connection and conduct a wiring test. was going on. That is, all spring globes 3 are wired to the scanner 4, and spring probes 30 corresponding to both ends of the circuit are connected by a scanner element (not shown) built in the scanner 4 driven by the control unit 5.
Two points were selected one after another, a voltage was applied, and the resistance value between the two points was measured by the resistance determination section 6, and the result was compared and determined with a normal value stored in the control section 5 in advance. Therefore, in the conventional wiring test method, since the scanner 4 selects a combination of two points across all inspection points on the printed wiring board 1 via the spring glove 3, the number of springs corresponding to the total number of inspection points is A scanner element built into the probe 3 and scanner 4 is required. In addition, there is a globe arrangement board 8 on which spring gloves 3 are arranged for each type of printing arrangement board 1.
It takes a lot of time to prepare and convert and connect the springs, which is extremely KA value for wiring tests of printed wiring boards 1 produced in high-mix, low-volume production. There were drawbacks such as it became difficult to arrange the probes 3 in a corresponding manner, and some printed wiring boards could not be subjected to cloth m tests.

本発明は印刷配線板の布線試験方法において、以上のよ
うな欠点を解決し、汎用性があり、かつ低コストで製造
できる布線試験方法を提供することを目的としたもので
あり、すなわち薄板状で絶縁性弾性体の中に薄板面と垂
直方向に棒状抵抗体がマトリックス状に配列された平面
抵抗体に印刷配線板を加圧し、前記印刷配線板の同一回
路上の少なくとも一点と、平面抵抗体に接触した共通電
極板との間に電圧を印加し7て、各々2点間の測定抵抗
値を測定することにより前記印刷配線板の布線検査を行
うものである。
The purpose of the present invention is to solve the above-mentioned drawbacks in a wiring testing method for printed wiring boards, and to provide a wiring testing method that is versatile and can be manufactured at low cost. Pressing a printed wiring board against a planar resistor in which rod-shaped resistors are arranged in a matrix in a direction perpendicular to the surface of the thin plate in a thin insulating elastic body, and at least one point on the same circuit on the printed wiring board; The wiring of the printed wiring board is inspected by applying a voltage between the planar resistor and the common electrode plate in contact with it and measuring the resistance value between each two points.

第2図は本発明による布線試験方法を基本的に説明する
ための図であり、薄板状の絶縁性弾性体に薄板面と垂直
方向に棒状抵抗体14がマトリックス状に配列された平
面抵抗体13は印刷配線板1と共通電極15との間にサ
ンドイッチ状に配列されている。印刷配線板1と共、4
電極板15とは平面抵抗こ 体13す間にはさんで締付金具16により加圧され醗い
る。上、上移動かつX、Y2軸にNC制御(図示せず)
され位置決めするプローブ10は印刷配線板1の回路検
査点となるスルーホール12に接触し抵抗値を測定する
。制御部6はその測定結果を判定すると共にグローブ1
00NC制御を行う。さらに印刷配線板1に形成したス
ルーホール12はランド18、回路11およびランド1
9に接続されている。
FIG. 2 is a diagram for basically explaining the wiring test method according to the present invention, and shows a planar resistor in which rod-shaped resistors 14 are arranged in a matrix in a direction perpendicular to the thin plate surface on a thin plate-shaped insulating elastic body. The body 13 is arranged in a sandwich-like manner between the printed wiring board 1 and the common electrode 15. Along with printed wiring board 1, 4
The electrode plate 15 is sandwiched between the planar resistor body 13 and pressurized by a clamping fitting 16. Upward movement and NC control on the X and Y axes (not shown)
The probe 10 that is being positioned comes into contact with a through hole 12 that serves as a circuit inspection point on the printed wiring board 1 and measures the resistance value. The control unit 6 determines the measurement results and also controls the glove 1.
00NC control is performed. Furthermore, the through holes 12 formed in the printed wiring board 1 are connected to the land 18, the circuit 11 and the land 1.
9 is connected.

第3図、第4図は、第2図に示すスルーホール12にプ
ローブ10と共通電極板J5との間に電圧を印加した時
、回路11の面積により測定抵抗値が変化することを説
明するための図であり、第3図は平面抵抗体13に配列
された棒状抵抗体14を小さな円形で表わした時、ラン
ド18と回路11と回路19は、斜線に示す棒状抵抗体
14のみに接触している状態な衣わしている。
3 and 4 explain that when a voltage is applied between the probe 10 and the common electrode plate J5 to the through hole 12 shown in FIG. 2, the measured resistance value changes depending on the area of the circuit 11. Fig. 3 is a diagram for representing the rod-shaped resistors 14 arranged on the planar resistor 13 as small circles, and the lands 18, circuits 11, and circuits 19 contact only the rod-shaped resistors 14 shown with diagonal lines. I am wearing clothes that are in a state of being.

第4図は、第3図の斜線で示す棒状抵抗体14がグロー
ブ10と共通電極板15との間で示す等何回路個数なN
としてI−茗となる。
FIG. 4 shows the number of circuits (N) between the globe 10 and the common electrode plate 15 of the rod-shaped resistor 14 shown by diagonal lines in FIG.
As a result, it becomes I-Mei.

以下に各図を用いて動作を説明すると、印刷配線板lを
棒状抵抗体14が配列された平面抵抗体13の上部に設
置し、締付金具】6にて加圧する。プローブlOをX、
Y2軸のN CI!1IllI機構(図示せず)で位置
決めして下降させスルーホール12に接続させる。次に
プローブ10と共通電極板15との間に寛棒状抵抗体1
4を通じて電流が流れる。
The operation will be explained below with reference to the figures.The printed wiring board 1 is placed on top of the planar resistor 13 on which the rod-shaped resistors 14 are arranged, and pressurized with the clamping fitting 6. probe lO
NCI of Y2 axis! It is positioned and lowered using a 1IllI mechanism (not shown) and connected to the through hole 12. Next, a rod-shaped resistor 1 is inserted between the probe 10 and the common electrode plate 15.
Current flows through 4.

棒状抵抗体14が回路11に接触している個数Nはお゛ 第3図の斜線で示すとTす、回路11の面積に比例して
おり、かつ第4図に示す通りその個数Nにより合成抵抗
値W=−で示される。そしてこのWを抵抗判定部6で測
定し、予め制御部5に記憶した回路11ごとの期待抵抗
値から許容される誤差をプラスした上限値とマイナスし
た下限値との間で比較判断させ各回路llごとの良否の
判定を行う。すなわち測定した抵抗値J(が制御部5に
記憶した上限値と下限値の幅の中にあれば良品と判断し
、上限値上りも測定抵抗値]7か高い場合は回路11に
断線が発生していることを示しており、反対に下限値よ
りも低い場合には回路11と他の回路(図示せず)正の
間に短絡が発生していることを意味している。この方法
により印刷配廁板1に形成されたすべての回路11につ
いて、各回路11を代表する1ケ所のスルーホール12
に順次グローブ10をNC制御機構により移動させて、
電圧を印〃目することによって印刷配線板1の布線試験
を行うことができる。以上説明した通り、本発明によれ
ば1本のプローブで印刷配線板回路の一検査点に電圧を
印加し、かつ次々と各回路上に移動させて合成抵抗値H
/を測定するのみで、各回路の布線状態すなわち断線又
は他回路との短絡を判定することが出来、従来の布線試
験法に見られた膨大な数量のスプリンググローブと、そ
れに対応するスキャナ菓子を必要としないため布線試験
方法の製造費用は大幅にハ1」減でき、多品棟少量生産
の印刷配線板にも極めて能率良く汎用曲線機として適用
できる。又、たとえソルダーレジストがなされている印
刷配置板においても、第3図VCおいてランド18と回
路1.1 K接続されたランド19はソルダーレジスト
がなされていないので、このランド18 、19の面積
部に電圧が印加され同様の方法にて布線試験ができる等
、本発明は極めて大きな効果をもたらすものである。
The number N of rod-shaped resistors 14 in contact with the circuit 11 is proportional to the area of the circuit 11, which is indicated by the diagonal line in FIG. It is indicated by the value W=-. Then, this W is measured by the resistance determination unit 6, and a comparison is made between the upper limit value, which is obtained by adding an allowable error from the expected resistance value for each circuit 11 stored in advance in the control unit 5, and the lower limit value, which is obtained by subtracting it. Judgment is made as to whether each ll is good or bad. In other words, if the measured resistance value J (is within the range between the upper limit value and lower limit value stored in the control unit 5), it is determined to be a good product, and if the upper limit value is higher than the measured resistance value] 7, a disconnection has occurred in the circuit 11. On the other hand, if it is lower than the lower limit value, it means that a short circuit has occurred between the circuit 11 and another circuit (not shown). For all the circuits 11 formed on the distribution board 1, there is one through hole 12 representing each circuit 11.
The globe 10 is sequentially moved by the NC control mechanism,
By marking the voltage, a wiring test of the printed wiring board 1 can be performed. As explained above, according to the present invention, a voltage is applied to one test point of a printed wiring board circuit using one probe, and the probe is moved onto each circuit one after another to obtain a combined resistance value H.
It is possible to determine the wiring condition of each circuit, that is, breakage or short circuit with other circuits, by simply measuring Since the confectionery is not required, the manufacturing cost of the wiring test method can be significantly reduced by 1", and it can be applied extremely efficiently as a general-purpose curve machine to printed wiring boards produced in large quantities and in small quantities. Furthermore, even if the printed layout board is coated with a solder resist, the land 19 connected to the land 18 in VC in FIG. The present invention brings extremely great effects, such as being able to perform a wiring test in a similar manner by applying a voltage to the section.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来の布線試験方法を説明するための図、第
2図は本発明による布線試験方法を基本的[Sa明する
ための図、第3図、第4図はグローブと共通電極板との
間Kit圧を印加1−た時回路の面積により測定抵抗値
が変化することを説明するための図である。 なお、図においてlは印刷配置板、2は加圧力3はスプ
リンググローブ、4はスキャナ郡、5は制御部、6は抵
抗判定部、8はグローブ配列板、10は上下駆動しかつ
X 、、 Y 2軸のNC1111制御により移動する
電圧14〕加用グローブ、11は印刷配線板に形成され
た回路、12 、17はスルーホール、 13は平面抵
抗体、14は棒状抵抗体、15は共通電極板、 16は
締伺金具、18 、19はランド、Kは測定抵抗値、R
は各棒状抵抗体の抵抗値、Nは回路面積内に接触する棒
状抵抗体14の(fill数である。 第1図
Fig. 1 is a diagram for explaining the conventional wiring test method, Fig. 2 is a diagram for explaining the basic wiring test method according to the present invention, and Figs. 3 and 4 are for explaining the wiring test method according to the present invention. FIG. 6 is a diagram for explaining that the measured resistance value changes depending on the area of the circuit when a Kit pressure is applied between the common electrode plate and the circuit. In the figure, l is a printing arrangement board, 2 is a pressurizing force 3 is a spring globe, 4 is a scanner group, 5 is a control section, 6 is a resistance determination section, 8 is a globe arrangement board, 10 is a vertical drive and X. Voltage 14 moved by control of Y two-axis NC1111] Application globe, 11 is a circuit formed on a printed wiring board, 12 and 17 are through holes, 13 is a planar resistor, 14 is a rod-shaped resistor, 15 is a common electrode plate, 16 is the fastening fitting, 18 and 19 are lands, K is the measured resistance value, R
is the resistance value of each rod-shaped resistor, and N is the number of rod-shaped resistors 14 that are in contact within the circuit area.

Claims (1)

【特許請求の範囲】[Claims] 薄板状で絶縁性弾性体の中に薄板面と垂直方向に棒状抵
抗体がマトリックス状に配列された平面抵抗体に印刷配
線板を加圧し、前記印刷配線板の同一回路上の少なくと
も一点と、平面抵抗体に接触した共通電極板との間に電
圧を印加して、各々2点間の測定抵抗値を測定すること
Kより前記印刷配線板の布線検査を行うことを特徴とす
る印刷配線板の布線検査方法。
Pressing a printed wiring board against a planar resistor in which rod-shaped resistors are arranged in a matrix in a direction perpendicular to the surface of the thin plate in a thin insulating elastic body, and at least one point on the same circuit on the printed wiring board; The printed wiring is characterized in that the wiring inspection of the printed wiring board is performed by applying a voltage between the planar resistor and a common electrode plate in contact with each other and measuring the resistance value between each two points. Board wiring inspection method.
JP57041069A 1982-03-16 1982-03-16 Wiring testing for printed circuit board Pending JPS58158564A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57041069A JPS58158564A (en) 1982-03-16 1982-03-16 Wiring testing for printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57041069A JPS58158564A (en) 1982-03-16 1982-03-16 Wiring testing for printed circuit board

Publications (1)

Publication Number Publication Date
JPS58158564A true JPS58158564A (en) 1983-09-20

Family

ID=12598149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57041069A Pending JPS58158564A (en) 1982-03-16 1982-03-16 Wiring testing for printed circuit board

Country Status (1)

Country Link
JP (1) JPS58158564A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61180153A (en) * 1985-02-06 1986-08-12 Kikusui Denshi Kogyo Kk Device and method for testing printed circuit board
CN105372499A (en) * 2015-11-25 2016-03-02 亿和精密工业(苏州)有限公司 Micro-resistance measurement equipment and measurement method
WO2025176538A1 (en) * 2024-02-22 2025-08-28 Philips Goldway (Shenzhen) Industrial Inc. Integrated resistance monitoring for a defibrillator electrode plate
EP4631566A1 (en) * 2024-04-08 2025-10-15 Koninklijke Philips N.V. Integrated resistance monitoring for a defibrillator electrode plate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61180153A (en) * 1985-02-06 1986-08-12 Kikusui Denshi Kogyo Kk Device and method for testing printed circuit board
CN105372499A (en) * 2015-11-25 2016-03-02 亿和精密工业(苏州)有限公司 Micro-resistance measurement equipment and measurement method
WO2025176538A1 (en) * 2024-02-22 2025-08-28 Philips Goldway (Shenzhen) Industrial Inc. Integrated resistance monitoring for a defibrillator electrode plate
EP4631566A1 (en) * 2024-04-08 2025-10-15 Koninklijke Philips N.V. Integrated resistance monitoring for a defibrillator electrode plate

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