JPS58154989A - Digital convergence device - Google Patents

Digital convergence device

Info

Publication number
JPS58154989A
JPS58154989A JP3847382A JP3847382A JPS58154989A JP S58154989 A JPS58154989 A JP S58154989A JP 3847382 A JP3847382 A JP 3847382A JP 3847382 A JP3847382 A JP 3847382A JP S58154989 A JPS58154989 A JP S58154989A
Authority
JP
Japan
Prior art keywords
adjustment point
outermost
address
point
correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3847382A
Other languages
Japanese (ja)
Inventor
Katsumi Morita
森田 克巳
Masanori Hamada
浜田 雅則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3847382A priority Critical patent/JPS58154989A/en
Publication of JPS58154989A publication Critical patent/JPS58154989A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/12Picture reproducers
    • H04N9/16Picture reproducers using cathode ray tubes
    • H04N9/28Arrangements for convergence or focusing

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Video Image Reproduction Devices For Color Tv Systems (AREA)

Abstract

PURPOSE:To attain the adjustment of an inside adjusting point once, by writing the same correcting amount the same as a convergence correcting amount at the inside also to the outermost circumference adjusting point, in adjusting the adjusting point at the immediate inside of the outermost circumference adjusting point of a screen. CONSTITUTION:When the same correcting amount is written in the inside adjusting point (b) and the outermost circumference adjusting point (a), since the same correcting amount is written also in a virtual adjusting point, the correcting amount of the virtual adjusting point overflows and the required correcting amount of the inside adjusting point is written in a 1-frame memory 5 without inversion. In adjusting the adjusting points in the screen other than the outermost circumference and the inside adjusting points, since only the address represented with a cursor counter 10 is applied to the memory 5 via a multiplexer 22 and an address multiplexer 11, the correcting amount is written in the memory 5 by the same operation as conventional examples.

Description

【発明の詳細な説明】 本発明はディジタルコンバーゼンス装置に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital convergence device.

従来のコンバーゼンス補正回路は、水平フライバックパ
ルスおよび垂直偏向波形よ!ll、インダクタンス、容
量および抵抗などの受動素子を用いてアナログ的にコン
バーゼンス補正波形を得るように構成されていた。しか
し、このような従来のコンバーゼンス補正回路はコンバ
ーゼンス補正精度の点で問題かめる。そこで、より精度
の高いコンバーゼンス補正を行うために、近年ディジタ
ル的にコンバーゼンス補正を行うものが提案されている
Conventional convergence correction circuits use horizontal flyback pulses and vertical deflection waveforms! It was configured to obtain a convergence correction waveform in an analog manner using passive elements such as ll, inductance, capacitance, and resistance. However, such conventional convergence correction circuits have problems in terms of convergence correction accuracy. Therefore, in order to perform convergence correction with higher precision, methods that perform convergence correction digitally have been proposed in recent years.

このディジタルコンバーゼンス補正装置は、テレビジョ
ン受像役の画面上に、ドツトパターンまたはクロスバ、
チパターン等のコンバーゼンス補正用パターンを映出し
、その各ドツト点またはクロスハツチの各叉点ごとのコ
ンバーゼンス補正量のデータを、すなわち1m行nりI
J (m 、 nは整数)のコンバーゼンス調整点の個
々のコンバーゼンス補正毎を、ティジタル的に1フレー
ムメモリに書き込み、この情報をテレビジョン受像様の
走査と同期して読出し、IJ/A変換してコンバーゼン
ス補正を行うものである。以下図面を用いて詳しく説明
する。
This digital convergence correction device produces dot patterns or crossbars on the screen of a television receiver.
A convergence correction pattern such as a hatch pattern is projected, and the data of the convergence correction amount for each dot point or each cross-hatch point is recorded, that is, 1 m row n I.
Each convergence correction of J (m, n are integers) convergence adjustment points is digitally written into one frame memory, this information is read out in synchronization with the scanning of television reception, and IJ/A conversion is performed. This is to perform convergence correction. This will be explained in detail below using the drawings.

第1図において、同期信号入力端子19より同期信号が
加えられると、制御回路9により補正用パターン発生回
路16を制御してテレビジョン画面上に例えば鳴2図に
示すような調整点を示す横方向に13点、縦方向に9点
のドツトパターンを映出させる。
In FIG. 1, when a synchronization signal is applied from the synchronization signal input terminal 19, the control circuit 9 controls the correction pattern generation circuit 16 to display a horizontal line indicating adjustment points as shown in FIG. A dot pattern of 13 points in the direction and 9 points in the vertical direction is projected.

コントロールパネル1のカーソルキーで補正を行いたい
調腎点全選択するとこの調整点のアドレスが力1−ツル
カウンタ1oに記憶される。このカーソルカウンタ10
に記憶されたアドレスは、ドツトパターンの各調整点の
アドレスを順次出力する絖出しアドレスカウンタ13の
アドレスとともに一致検出回@12に刃口えられ、仇出
しアドレスカウンタ13の内容と、カーソルカウンタ1
oの内容が一致したときの一致出力によりカーソル発生
回路14からカーソルカウンタ1oの記憶アドレスに対
応するカーソル信号を発生させ、加算回路16により補
正用パターン発生回路15のドツトパターン信号と加算
し、テレビジョン画面の選択した調整点にカーソルを車
畳烙せて映出させる。
When all the kidney adjustment points to be corrected are selected using the cursor keys on the control panel 1, the addresses of these adjustment points are stored in the force 1 - torque counter 1o. This cursor counter 10
The addresses stored in the start address counter 13, which sequentially outputs the address of each adjustment point of the dot pattern, are detected in the match detection step @12, and the contents of the start address counter 13 and the cursor counter 1 are stored.
When the contents of o match, the cursor generation circuit 14 generates a cursor signal corresponding to the memory address of the cursor counter 1o, which is added to the dot pattern signal of the correction pattern generation circuit 15 by the addition circuit 16. Move the cursor to the selected adjustment point on the John screen and display it.

このようにして調整点を選択したのち、補正を行いたい
色、例えばコントロールパネル1に設けられた赤の書き
込みキーで画[I]]を見ながら所望の補正重金可逆カ
ウンタ4にセットし、1逆カウンタ4の内容を水平また
は垂直帰線期間にマルチプレクサ17を介して1フレー
ムメモリ6のカーソルカウンタ10に指定されたアドレ
スに書き込む。
After selecting the adjustment point in this way, set the desired correction weight on the reversible counter 4 while looking at the image [I] with the color you want to correct, for example, the red writing key provided on the control panel 1. The contents of the reverse counter 4 are written to the address designated by the cursor counter 10 of the one frame memory 6 via the multiplexer 17 during the horizontal or vertical retrace period.

この場合、町浄カウンタ4には、カーソルカウンタ10
で指定されたアドレスの1フレームメモリ6の内容が読
み出されており、さらにコンバーゼンス補正室を増加さ
せたい時は、可逆カウンタ4の内容を増加させ、また逆
に減少させたい時には可逆カウンタ4の内容Kl少させ
て所望のデータを1フレームメモリ5に書き込むことに
ょ9書き込み訂正を行う。画面周辺部のコンバーゼンス
補正精度を向上させるために、テレビジョン画向内の最
外周一野点よりさらに、外軸にも上下、左右各1列の仮
想の調整点を設け、この仮想調整点のコンバーゼンス補
正量を、外挿値演算回路18で求め、マルチプレクサ1
7を弁じて1フレームメモリ5に讐き込む。
In this case, the town counter 4 has a cursor counter 10
The contents of the one-frame memory 6 at the address specified by are read out, and if you want to further increase the convergence correction chamber, increase the contents of the reversible counter 4, and vice versa. Write correction is performed by reducing the content Kl and writing desired data into one frame memory 5. In order to improve the accuracy of convergence correction at the periphery of the screen, virtual adjustment points are set up in one row each on the top, bottom, left and right on the outer axis, in addition to one point on the outermost periphery of the television screen, and the convergence of these virtual adjustment points is The amount of correction is obtained by the extrapolation value calculation circuit 18, and the multiplexer 1
7 and stores it in one frame memory 5.

すなわち、合成りに仮想調整点の補正量データを@線近
似で求めるとすると第3図にpいて、破外周調整魚aの
補正毎をA1その1つ内側の調整点すの補正毎をB、仮
想調整点0の補正量CとするとC:2A−bf外挿値演
算回路1゛8で求め、この値を1フレームメモリ6にマ
ルチプレクサ17を介して貴さ込む。
In other words, if the correction amount data of the virtual adjustment point is calculated by @ line approximation, as shown in Fig. 3, each correction of the broken outer circumference adjustment point a is A1, and each correction of the adjustment point one position inside is B. , the correction amount C for the virtual adjustment point 0 is calculated by the C:2A-bf extrapolation value calculation circuit 18, and this value is stored in the 1-frame memory 6 via the multiplexer 17.

つぎに、1フレームメモリ6に曹き込1れているコンバ
ーゼンス補正量の読み出しについて説明−を行う。この
1フレームメモリ6に記憶された各調整点のコンバーゼ
ンス補正賞は、読み出しアドレスカウンタ13より出力
されるアドレス信号により第2凶のドツトパターンと同
期して読み出される。ところが、1フレームメ干す6に
は、仮想調整点も含めて、調整点に対応している場所の
補正音データしかないので、垂直方向の調整点間の走査
線ごとの補正音を求める必要がある。そこで内挿回路6
で第1の調整点のコンバ補正量ス補正童と、第1の調整
点のすぐ下の第2の調整点のコンバーゼンス補正音から
第1と第2の調整点間に含まれる走査線ごとの補正音を
内挿で求め、この内挿回路6の出力信号をD/A変換器
7でアナログ菫に変換する。D/A変換器7の出力信号
波形は階段波状であるので、低域通産フィルタ8で平滑
し、増幅後コンバーゼンスヨーク(図示せず)に供給す
る。以上赤色を例に説明してきたが、緑、青の補正につ
いても同様である。
Next, reading out the convergence correction amount stored in the one-frame memory 6 will be explained. The convergence correction value of each adjustment point stored in the one-frame memory 6 is read out in synchronization with the second worst dot pattern by the address signal output from the read address counter 13. However, in 1-frame image processing 6, there is only corrected sound data for locations corresponding to adjustment points, including virtual adjustment points, so it is necessary to find corrected sound for each scanning line between adjustment points in the vertical direction. be. Therefore, interpolation circuit 6
The convergence correction amount at the first adjustment point and the convergence correction sound at the second adjustment point immediately below the first adjustment point are calculated for each scanning line included between the first and second adjustment points. A corrected sound is obtained by interpolation, and the output signal of this interpolation circuit 6 is converted into analog violet by a D/A converter 7. Since the output signal waveform of the D/A converter 7 has a staircase waveform, it is smoothed by a low-pass filter 8, and after amplification is supplied to a convergence yoke (not shown). Although the explanation has been given above using red as an example, the same applies to the correction of green and blue.

このようなティジタルコンバーゼンス装置では、各調整
点のコンバーゼンス補正が独立に行えるので精度よくコ
ンバーゼンス補世が行なえる。
In such a digital convergence device, since convergence correction can be performed independently for each adjustment point, convergence correction can be performed with high accuracy.

ところが、誓き込み訂正時に可逆カウンタ4がオーバ7
0−をおこし、コンバーゼンスが極端に大きくずれると
いう挽象がおこり、コンバーゼンス調整が非常に行ない
にくいという不都合が生じていた。′tなわち、谷調整
点の重子化数を例えば8ビツトとすると0〜2色6の2
66段階の値をとることが出来る。令弟3図に示するる
最外周のA整点dの補正量Aがハニ200、七の1つ内
側の調整点(内側調整点と呼ぶ)bの補正室BがB=1
60とすると、仮想調整点Cの補正量Cは前述の式C:
2A−klよりC=240となる。しかもこの状態では
コンバーゼンス補正が完全に行なわれ又いないとする。
However, when the oath was corrected, reversible counter 4 exceeded 7.
0-, resulting in an extremely large shift in convergence, resulting in the inconvenience that convergence adjustment is extremely difficult. 't, for example, if the number of multiplexed valley adjustment points is 8 bits, then 2 of 0 to 2 colors and 6
It can take 66 levels of value. The correction amount A at the outermost A adjustment point d shown in Figure 3 is 200, and the correction chamber B at the adjustment point b one position inside (referred to as the inner adjustment point) is B = 1.
60, the correction amount C of the virtual adjustment point C is given by the above formula C:
From 2A-kl, C=240. Moreover, in this state, it is assumed that convergence correction is completely performed or not.

そこで調整点aの補正友人を変化させていくとするとC
≦255のB==1essまでは例ら不都合は生じない
刀1% tM=165より小さくなるとc−=256と
なりオーバフローを起しC−0となりてしまいコンバー
ゼンス補正波形が、あたかも反転したようになってしぼ
り。
So, if we change the correction friend of adjustment point a, then C
Until B = = 1ess of ≦255, no problem will occur.When tM is smaller than 165, c- = 256, overflow occurs and becomes C-0, and the convergence correction waveform becomes as if it was inverted. Teshibori.

この様に仮想調整点の補正量が必安な補正量より惨端に
はずれた状態になるとLPFsの応答性により、コンバ
ーゼンスコイル(図示せず)に実際に流れる屯流は、1
フレームメモリ6に晋き込葦れている補正量と1対1に
対応せず、必安な補正量とは異なった補正量の領で画面
上ではコンバーゼンスがとれてし!う。次に最外周調整
点aを調整し、仮想調整点の補正量が266以内になる
と反転状態が解消されるとLPF8の影響が少なくなり
、内側調整点のコンバーゼンスがずれ、再び内側調整点
を調整しなおすという不便が生じていた。
In this way, when the correction amount at the virtual adjustment point becomes disastrously deviated from the essential correction amount, the torrent current that actually flows through the convergence coil (not shown) due to the responsiveness of the LPFs becomes 1
There is no one-to-one correspondence with the amount of correction stored in the frame memory 6, and convergence is achieved on the screen due to the amount of correction that is different from the cheapest amount of correction! cormorant. Next, adjust the outermost adjustment point a, and when the correction amount of the virtual adjustment point becomes within 266, the inversion state is resolved, the influence of LPF8 is reduced, the convergence of the inner adjustment point is shifted, and the inner adjustment point is adjusted again. This caused the inconvenience of having to repair it.

そこで本発明はこの様な不都合が生じないコンバーゼン
ス装置を提供しようとするものである。
Therefore, the present invention aims to provide a convergence device that does not cause such inconvenience.

以下本発明の1実施例を図面にもとづいて説明する。第
4図において、第1図と同様の動作を行うものは同じ番
号で示し、説明は省略する。
An embodiment of the present invention will be described below based on the drawings. In FIG. 4, parts that perform the same operations as in FIG. 1 are designated by the same numbers, and their explanations will be omitted.

本発明は、画面最外周の補正量として、その内側の補正
量と同じ値を舊キ込むことにより、コンバーゼンス調整
時、必要補正量から極端に違った値を取ることを防止し
ようとするものである。
The present invention attempts to prevent a value that is extremely different from the necessary correction amount during convergence adjustment by setting the same value as the correction amount for the innermost portion of the screen as the correction amount for the outermost periphery of the screen. be.

以下に動作を詳しく説明する。コンバーゼンス補正を行
おうとする調整点をコントロールパネル1を操作して選
ぶと、その調整点のアドレスが。
The operation will be explained in detail below. When you select the adjustment point for convergence correction by operating control panel 1, the address of that adjustment point will be displayed.

カーソルカウンタ10にセットされる。カーソルカウン
タ10の内容は調整点判別回路2oに人力され、選択さ
れた調整点が1画面最外周調整点の1つ内側の調整点(
以外内側調整点と呼ぶ)かどうかを判別し、判別楢号を
出力する。この判別信号により最外周アドレス発生回路
21で最外周調整点のアドレスを発生する。即ち、第2
図において画面左側の例えは内側調整点すをコントコー
ルパネル1を操作して選択したとすると最外周アドレス
発生回路21は最外周調整点aのアドレスを発生する。
It is set in the cursor counter 10. The contents of the cursor counter 10 are input manually to the adjustment point discrimination circuit 2o, and the selected adjustment point is the adjustment point one screen inside the outermost adjustment point (
(referred to as the inner adjustment point) and outputs a determination number. Based on this determination signal, the outermost circumference address generation circuit 21 generates an address for the outermost circumference adjustment point. That is, the second
In the figure, if the inner adjustment point A on the left side of the screen is selected by operating the control panel 1, the outermost circumference address generation circuit 21 generates the address of the outermost circumference adjustment point a.

マルチプレクサ22は、カーソルカウンタ1oよりの内
側調整点すのアドレスと、最外筒アドレス発生回路21
よりの最外周調整点aのアドレスを切換えアドレス用マ
ルチプレクサ11に供給する。
The multiplexer 22 outputs the address of the inner adjustment point from the cursor counter 1o and the outermost cylinder address generation circuit 21.
The address of the outermost adjustment point a is supplied to the switching address multiplexer 11.

可逆カウンタ4は前述したようにカーソルカウンタ10
で指定されたアドレスの1フレームメモリ5の内容が読
み出ざtでおシ、さらにコンバーゼンス補正−を増加又
は減少させたい時は、コントロールパネル1を操作して
、可逆カウンタ4の内容を増加又は減少させる。すると
まずカーソルカウンタ10にセットされている内側調整
点すのアドレスが、マルチプレクサ22.アドレス用マ
ルテフ゛レクサ11を介して刃口えられると1フレーム
メモリ6の内側調整点aに対応する位置が選択され、そ
の位置に可逆カウンタ4の内容が書き込まれる。次に最
外周アドレス発生回路21によって発生させられた最外
周調整点すのアドレスが。
The reversible counter 4 is the cursor counter 10 as described above.
If the contents of the one-frame memory 5 at the address specified by are read out and you wish to further increase or decrease the convergence correction, operate the control panel 1 to increase or decrease the contents of the reversible counter 4. reduce Then, first, the address of the inner adjustment point set in the cursor counter 10 is transferred to the multiplexer 22. When the address multiplexer 11 is used to select the position corresponding to the inner adjustment point a of the one-frame memory 6, the contents of the reversible counter 4 are written to that position. Next, the address of the outermost circumference adjustment point generated by the outermost circumference address generation circuit 21 is obtained.

マルチプレクサ22.アドレス用マルチプレクサ11を
介して加えられ、1フレームメモリ6の最外周調整点す
に対応する位置にも可逆カウンタ4の内容が簀き込まれ
る。即ち、内側調整点すと最外周調整点aとには、同じ
補正量の値が書き込まれる。内1Ill調整点す及び最
外周調整点aに同じ補正量が書き込まれると、前述した
ところで明らかなように、仮想調整点にも同じ値の補正
量が書き込まれるので仮想調整点の補正量がオーバーフ
ロー1−おこし1反転状態になることはなく、内側調整
点の必要補正量が1フレームメモリ6に古き込まれる。
Multiplexer 22. It is added via the address multiplexer 11, and the contents of the reversible counter 4 are also stored in the position corresponding to the outermost adjustment point of the one frame memory 6. That is, the same correction amount value is written to the inner adjustment point and the outermost adjustment point a. When the same correction amount is written to the innermost adjustment point A and the outermost adjustment point a, as is clear from the above, the same correction amount is also written to the virtual adjustment point, so the correction amount of the virtual adjustment point will overflow. The 1-up 1 inversion state does not occur, and the necessary correction amount of the inner adjustment point is stored in the 1-frame memory 6.

最外周調整点又は内1II11調整点以外の画面内の調
整点を調整するときは、カーソルカウンタ107示すア
ドレスのみが、マルチプレクサ22゜ドレス用マルチプ
レクサ11を弁して1フレームメモリ6に加えられるの
で従来例で述べたのと同じ動作を行なって補正量が、1
フレームメモリ6に書き込1れる。
When adjusting the adjustment points on the screen other than the outermost adjustment points or the inner 1II11 adjustment points, only the address indicated by the cursor counter 107 is added to the one frame memory 6 by activating the multiplexer 22 and the address multiplexer 11. Performing the same operation as described in the example, the correction amount is 1
1 is written to the frame memory 6.

以上述べたところで明らかなように1本発明によれば、
最外周調整点より1つ内側の内g411調整点のコンバ
ーゼンス調整時に、可逆カウンタがオーバーフローをお
こし、コンバーゼンス補正波形かめたかも反転したよう
なことはおこらないので、内側調整点の調整が一度でお
こなえ、最外周調整点を調歪し書び、内1jlll調整
点の調整を行うという不都合は生じない。
As is clear from the above description, according to the present invention,
When adjusting the convergence of the inner g411 adjustment point, which is one position inside the outermost circumference adjustment point, the reversible counter will overflow and the convergence correction waveform will not be reversed, so the adjustment of the inner adjustment point can be done at once. , the inconvenience of adjusting and writing the outermost circumferential adjustment points and adjusting the inner 1jllll adjustment points does not occur.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のディジタルコンバーゼンス装置のブロッ
ク線図、第2図はドツトパターンの映出図、第3図は仮
想調整点を説明するための図、第4図は不発り」の一実
施例におけるディジタルコンバーゼンス装置のブロック
線図である。 1−・・・・・コントロールパネル、4・・・・・可逆
カウンタ、6?・・・・・1フレームメモリ、6・・・
・・・内挿演算回路%7・・・・・・IJ/A変換器、
8・・・・・・LPF、9・・・・・・制御回路% 1
0・・・・・・カーソルカウンタ、11・・・・・・ア
ドレス用マルチプレクサ、12・・・・・・一致検出回
路、13・・・・・・読出しアドレスカウンタ、14・
・・・・・カーソル発生回路、15・・・・・・補正用
パターン発生回路、16・・・・・・加算回路、17・
・・・・・マルチプレクサ、18・・・・・・外挿値演
算回路、20・・・・・・調整点判別回路、21・・・
・・・最外周アドレス発生回路、22・・・・・・マル
チプレクサ。
Fig. 1 is a block diagram of a conventional digital convergence device, Fig. 2 is a projected image of a dot pattern, Fig. 3 is a diagram for explaining virtual adjustment points, and Fig. 4 is an example of a "misfire". 1 is a block diagram of a digital convergence device in FIG. 1-... Control panel, 4... Reversible counter, 6? ...1 frame memory, 6...
...Interpolation calculation circuit%7...IJ/A converter,
8...LPF, 9...Control circuit% 1
0... Cursor counter, 11... Address multiplexer, 12... Coincidence detection circuit, 13... Read address counter, 14...
... Cursor generation circuit, 15 ... Correction pattern generation circuit, 16 ... Addition circuit, 17.
...Multiplexer, 18 ... Extrapolation value calculation circuit, 20 ... Adjustment point discrimination circuit, 21 ...
...Outermost address generation circuit, 22...Multiplexer.

Claims (1)

【特許請求の範囲】[Claims] m行n列(m 、 nは整数)の調整点の各々のコンバ
ーゼンス補正量をディジタル的に記憶する1フレームメ
モリを有し、この1フレームメモリの内容をテレビジョ
ン受像慨の走査と同期して読み出してコンバーゼンス補
正を行うよう構成し、画囲最外周の調整点の1つ内側の
調整点であることを判別する調整点判別回路と、この調
整点判別回路よりの判別信号により最外周調整点のアド
レスを発生する最外同アドレス発生回路と、画口最外局
調整点の1つ内側の調整点のアドレスと、前記最外同ア
ドレス発生回路よりのアドレスとを切換える手段とを有
し、画面最外周調聚点の1つ内側の調整点を調整時に、
1つ内側のコンバーゼンス補正賞と同じ補正量を最外周
調整点にも曹き込み可屈なことを特許とするディジタル
コンバーゼンス装置。
It has a one-frame memory that digitally stores the convergence correction amount for each adjustment point in m rows and n columns (m and n are integers), and the contents of this one-frame memory are synchronized with the scanning of the television reception frame. It is configured to read and perform convergence correction, and includes an adjustment point determination circuit that determines whether the adjustment point is one adjustment point inside the adjustment point on the outermost periphery of the image area, and a determination signal from this adjustment point determination circuit to determine the adjustment point on the outermost periphery. an outermost address generation circuit for generating an address, and means for switching between an address of an adjustment point one position inside the outermost adjustment point of the picture aperture, and an address from the outermost address generation circuit; When adjusting the adjustment point one position inside the outermost adjustment point of the screen,
This is a patented digital convergence device that is flexible and applies the same amount of correction to the outermost adjustment point as the one inner convergence correction point.
JP3847382A 1982-03-10 1982-03-10 Digital convergence device Pending JPS58154989A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3847382A JPS58154989A (en) 1982-03-10 1982-03-10 Digital convergence device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3847382A JPS58154989A (en) 1982-03-10 1982-03-10 Digital convergence device

Publications (1)

Publication Number Publication Date
JPS58154989A true JPS58154989A (en) 1983-09-14

Family

ID=12526211

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3847382A Pending JPS58154989A (en) 1982-03-10 1982-03-10 Digital convergence device

Country Status (1)

Country Link
JP (1) JPS58154989A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6110386A (en) * 1984-06-26 1986-01-17 Mitsubishi Electric Corp Extrapolation arithmetic circuit for digital convergence device
JPS61288589A (en) * 1985-06-14 1986-12-18 Sony Corp Digital correcting signal generator
JPS6260391A (en) * 1985-09-10 1987-03-17 Matsushita Electric Ind Co Ltd Digital convergence device
JPS62235891A (en) * 1986-04-07 1987-10-16 Matsushita Electric Ind Co Ltd Convergence device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6110386A (en) * 1984-06-26 1986-01-17 Mitsubishi Electric Corp Extrapolation arithmetic circuit for digital convergence device
JPS61288589A (en) * 1985-06-14 1986-12-18 Sony Corp Digital correcting signal generator
JPS6260391A (en) * 1985-09-10 1987-03-17 Matsushita Electric Ind Co Ltd Digital convergence device
JPS62235891A (en) * 1986-04-07 1987-10-16 Matsushita Electric Ind Co Ltd Convergence device

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