JPS5815472A - Overload protecting device for inverter - Google Patents

Overload protecting device for inverter

Info

Publication number
JPS5815472A
JPS5815472A JP56113490A JP11349081A JPS5815472A JP S5815472 A JPS5815472 A JP S5815472A JP 56113490 A JP56113490 A JP 56113490A JP 11349081 A JP11349081 A JP 11349081A JP S5815472 A JPS5815472 A JP S5815472A
Authority
JP
Japan
Prior art keywords
control circuit
inverter
current
constant
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56113490A
Other languages
Japanese (ja)
Inventor
Yoshiaki Miyazawa
宮沢 芳明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56113490A priority Critical patent/JPS5815472A/en
Publication of JPS5815472A publication Critical patent/JPS5815472A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE:To effectively prevent a shortcircuit trouble without using expensive semiconductor breaker and current limiting resistor by detecting the defect, limiting the output current for the prescribed period of time and then softly starting an inverter. CONSTITUTION:When a shortcircuit defect occurs at the load side, an overcurrent detector 15 operates to input a set signal to a flip-flop 16, and the output of which is applied to a gate control circuit 14, a constant-voltage circuit 11, a constant-current control circuit 12, and a timer 17. As a result, the output current is abruptly reduced to zero, and the timer 17 starts operating. After the prescribed period of time is elapsed, a reset signal is inputted to the filp- flop 16, the output of which releases the OFF signal to the gate control circuit 14, an ON signal is applied to an inverter 2, thereby softly starting the inverter 2.

Description

【発明の詳細な説明】 本発明は、負荷短絡事故などの過電流に対するインバー
タ装置の保護装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protection device for an inverter device against overcurrents such as load short-circuit accidents.

一般に静止形インバータ装置においては、過負荷態量が
比較的小さく、負荷電流が過負荷耐道を越えると、装置
を構成する半導体素子の破壊に主ることが多いというこ
とで、各種の過負荷保護装置が用いられている。
In general, in static inverter devices, the overload quantity is relatively small, and if the load current exceeds the overload tolerance, the semiconductor elements that make up the device are often destroyed. Protective devices are used.

このような保護装置としては、例えば高速しゃ断機能を
有し、インバータ装置uと負荷との間に設けられる半導
体しゃ断器がある。しかるに、半導体しゃ断器の場合、
高価であることと、モーターあるいはトランスなどのよ
うに起動時過犬な電流が流れるような負荷に対して投入
不能となってしまうことなどの問題がある。後者の問題
を解消する装置としては限流抵抗を用いた装置があるが
、これとても負荷電はあるいは作動時間によっては高価
で大型な装置になってしまう。
As such a protection device, for example, there is a semiconductor breaker that has a high-speed breaker function and is provided between the inverter device u and the load. However, in the case of semiconductor circuit breakers,
Problems include that they are expensive and that they cannot be applied to loads such as motors or transformers that draw excessive current at startup. There is a device using a current limiting resistor to solve the latter problem, but this requires a large load and, depending on the operating time, becomes an expensive and large device.

本発明の目的は半導体しゃ断器などの高価な保護装置を
用いずともインバータ装置を確実に保護できるとともに
、モーターあるいはトランスなどのように起動突入電流
が流れる負荷の投入も可能にしたインバータ装置の過負
荷保護装置を提供することにある。
The purpose of the present invention is to reliably protect an inverter device without using an expensive protection device such as a semiconductor circuit breaker, and also to make it possible to apply a load such as a motor or transformer through which a starting inrush current flows. The purpose of the present invention is to provide a load protection device.

以下、本発明の一実施例について第1図に基づき説明す
る。第2図は第1図の実施例の各部の動作を説明するた
めの動作波形図である。第1図において、1は直流電源
、2はインバータ、4は負荷、3は負荷電流を検出する
OT、11はインバータ2の出力電圧を一定に制@1す
る定電圧制御回路、12はインバータ2の出力電流(負
荷電流)を所定の制限電流値以下に抑えるべく定電圧制
御回路11の出力O8のレベルを制限する定電流制御回
路、13は定電圧制御回路11の出力G8のレベルに応
じてインバータ2の点弧位相を決める移相器、14はイ
ンバータ2のオン、オフを制御するゲート制御回路、1
6はRSフリップフロップ、17はT(Sフリップフロ
ップ160)“1′″出力により動作をIfl始するタ
イマー、15はインバータ2の負荷側の短絡事故等によ
り生ずる出力側の過電流を検出して、I:t Sフリッ
プフロップ16へセット信月O8を与える過電流検出回
路である。
An embodiment of the present invention will be described below with reference to FIG. FIG. 2 is an operational waveform diagram for explaining the operation of each part of the embodiment shown in FIG. In FIG. 1, 1 is a DC power supply, 2 is an inverter, 4 is a load, 3 is an OT that detects the load current, 11 is a constant voltage control circuit that controls the output voltage of the inverter 2 to a constant @1, and 12 is the inverter 2 A constant current control circuit 13 limits the level of the output O8 of the constant voltage control circuit 11 in order to suppress the output current (load current) of the constant voltage control circuit 11 to a predetermined limit current value or less; A phase shifter that determines the firing phase of the inverter 2, 14 a gate control circuit that controls on and off of the inverter 2;
6 is an RS flip-flop, 17 is a timer that starts operation by the "1'' output of the T (S flip-flop 160), and 15 is a timer that detects an overcurrent on the output side caused by a short-circuit accident on the load side of the inverter 2, etc. , I:t This is an overcurrent detection circuit that provides a set signal O8 to the S flip-flop 16.

次に、第2図の動作波形図を参照して第1図の実施例の
動作を説明する。第2図においてAS〜H8の記号は第
1図の同一記号に対応する各部の波形を示したものであ
る。定電流制御回路12の制限電流値TH,過電流検出
回路15の検出レベルICはけ何れもインバータ2の過
負荷耐量によって決まるものであり、通常To ) J
nとなるように設定さレル。RSフリップフロップ16
は過電流検出回路15の出力O8をセット信号とし、タ
イマー17の出力1・ISをリセット信号として動作す
るものであり、その出力1)S(“1″出力)はゲート
制御回路14に対してはオフ指令として、定電圧制御回
路11及び定電圧制御回路12に対しては、その出力G
S及びINSを最小レベルまで急速に低下させるリセッ
ト指令として、また、タイマー17に対しては動作開始
指令として与えられるものである。
Next, the operation of the embodiment shown in FIG. 1 will be explained with reference to the operational waveform diagram shown in FIG. In FIG. 2, symbols AS to H8 indicate waveforms of respective parts corresponding to the same symbols in FIG. The limiting current value TH of the constant current control circuit 12 and the detection level IC of the overcurrent detection circuit 15 are both determined by the overload withstand capacity of the inverter 2, and usually To ) J
rel set to be n. RS flip flop 16
operates using the output O8 of the overcurrent detection circuit 15 as a set signal and the output 1/IS of the timer 17 as a reset signal, and its output 1)S (“1” output) is sent to the gate control circuit 14. is an off command, and the output G is sent to the constant voltage control circuit 11 and the constant voltage control circuit 12.
This command is given as a reset command to rapidly lower S and INS to the minimum level, and is given to the timer 17 as an operation start command.

し0えば、時刻t1で負荷fit!+に短絡事故が発生
したj場合、インバータ2の出力電流(第2図03))
が過電流検出回路15の検出レベルIaを越えると直ち
に過電流検出回路]5が動作して、その出力O8(第2
図(C))をRSSフリップフロップ16セット・信号
として与え、RSフリップフロップ16の出力1〕s(
第2図ffJ )は前述のように、ゲート制御回路14
、定電圧制御回路11、定電流制御回路12、タイマー
17に与えられる。これにより時刻t2でインバータ2
はオフ指令(第2図促))が与えられ、出力電圧(第2
図(A))は急、床に低下して零電圧となり、その結果
出力電流も急速に限流し零となり、一方、定電圧制御回
路11及び定−光制御回路12の出力O8及びH8(第
2図(q及び第2図(Fl) )は最小レベルまで、急
速に低下するとともに、タイマー17が動作を開始する
。その後、タイマー17は設定時間Tを経過した時点(
時刻ts)で、出力ES(m2図(均)をRSフリップ
フロップ】6にリセット信号とじて与え、その出力DS
はリセットされて°゛1°′より0″に戻る。RSフリ
ップフロップ16の出力DSが0″”に戻ると、ゲート
制御回路14へのオフ指令は解除されてインバータ2は
オン指令が与えられるとともに、定電圧制御回路11及
び定電流制御回路12へのリセット指令も解除される。
Then, the load fits at time t1! If a short-circuit accident occurs at +, the output current of inverter 2 (Fig. 2 03))
As soon as the overcurrent detection circuit 5 exceeds the detection level Ia of the overcurrent detection circuit 15, the overcurrent detection circuit 5 operates, and its output O8 (second
Figure (C)) is given as the RSS flip-flop 16 set signal, and the output 1]s(
FIG. 2 ffJ) shows the gate control circuit 14 as described above.
, constant voltage control circuit 11, constant current control circuit 12, and timer 17. As a result, at time t2, inverter 2
is given an off command (prompted in Figure 2), and the output voltage (second
Figure (A)) suddenly drops to the floor and becomes zero voltage, and as a result, the output current also rapidly reaches zero, and on the other hand, the outputs O8 and H8 of the constant voltage control circuit 11 and the constant light control circuit 12 (the 2 (q and FIG. 2 (Fl)) rapidly decrease to the minimum level, and the timer 17 starts operating. Thereafter, the timer 17 starts operating at the time when the set time T has elapsed (
At time ts), the output ES (m2 diagram (average) is given as a reset signal to the RS flip-flop) 6, and its output DS
is reset and returns to 0'' from °1°'. When the output DS of the RS flip-flop 16 returns to 0'', the off command to the gate control circuit 14 is released and the inverter 2 is given an on command. At the same time, the reset command to the constant voltage control circuit 11 and constant current control circuit 12 is also canceled.

これにより定電圧制御回路11の出力O8は最小値を初
期値として徐々に上昇し、インバータ2は所謂ソフトス
タートをし出力電圧Asは徐々に上昇する。もし短絡事
故が継続している場合、出力電圧Asが上昇すると、出
力電流BSも増大するが、これが定電流制御回路12の
制限電流値THに達すると、定電流制御回路12の制御
動作により、出力電流BSは制限電流値THに抑えられ
、出力電圧Asも、それ以上上昇しない。(インバータ
のソフトスタートの時定数は定電流制御が作動するに十
分な時間とすべく選定されている。)なお、短絡事故が
解除されている場合は、インバータ2はソフトスタート
後、定電圧制御回路11の制御動作により、定電圧制御
される。また、前述の短絡事故が継続している場合でも
、その後図示されない負荷側のしゃ断器のトリップ等に
より、短絡事故が解除されれば、定電流制御〆tJJ作
より定電圧制御動作に復帰し、インバータ2の出力幅圧
Asは定電圧設定レベルまで回復する。すなわち、何れ
の場合でもインバータ2の出力′i:li流は定電流制
御回路I2の制限′螺流値以下に抑えられ、出力電流(
負荷’m流)のレベルに応じて自動的に定電圧制御動作
、定電流制御動作の選択及び切換動作が行なわれる。
As a result, the output O8 of the constant voltage control circuit 11 gradually increases from the minimum value as an initial value, the inverter 2 performs a so-called soft start, and the output voltage As gradually increases. If the short-circuit accident continues, as the output voltage As increases, the output current BS also increases, but when this reaches the limit current value TH of the constant current control circuit 12, the control operation of the constant current control circuit 12 causes The output current BS is suppressed to the limit current value TH, and the output voltage As does not rise any further. (The time constant of the inverter's soft start is selected to be a sufficient time for constant current control to operate.) If the short-circuit fault has been removed, inverter 2 will perform constant voltage control after soft start. Constant voltage control is performed by the control operation of the circuit 11. Furthermore, even if the aforementioned short-circuit accident continues, if the short-circuit accident is subsequently canceled due to the tripping of the breaker on the load side (not shown), the constant voltage control operation is restored from the constant current control switch. The output width pressure As of the inverter 2 recovers to the constant voltage setting level. That is, in any case, the output 'i:li current of the inverter 2 is suppressed below the limit 'spiral current value of the constant current control circuit I2, and the output current (
The constant voltage control operation and the constant current control operation are automatically selected and switched depending on the level of the load (current).

このようにして動作する前述の如きインバータ左置の過
負荷保護装置によれば、高価な半導体しゃ断器を用いず
とも、インバータ装置直を負荷111]の短絡事故ある
いは過負荷より確実に保護できる。
According to the above-mentioned overload protection device installed to the left of the inverter, which operates in this manner, the inverter directly can be reliably protected from a short-circuit accident or overload of the load 111 without using an expensive semiconductor breaker.

一方、モーターあるいはトランスなどのように起動突入
電流が流れる負荷に対しても、限流抵抗などを用いずと
も前述の如き限流動作及びソフトスタート動作によりス
ムースに投入することが可能になる。
On the other hand, even for a load such as a motor or a transformer in which a starting inrush current flows, it is possible to smoothly turn on the load through the current limiting operation and soft start operation as described above without using a current limiting resistor.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明によるインバータ装置の過負荷保護装置
の一実施例を示すフロック図、第2図は第1図の実施例
の動作を説明する動作波形図である。 ■・・・直流箱;源、   2・・・インバータ3・・
・OT     4・・・負  荷11  ・・定電圧
制御回路、12・・ 定電流制御回路13・・・移 相
 器、14 ・・・ゲート制御回路15・・・過電流検
出回路。 16、−0Rsフリツブフ【コツプ 17・・・ タイマー。 (7317)代理人 弁理士 則 近 庵 佑(はか1
名)第1因 第2図
FIG. 1 is a block diagram showing an embodiment of an overload protection device for an inverter device according to the present invention, and FIG. 2 is an operation waveform diagram illustrating the operation of the embodiment of FIG. 1. ■...DC box; source, 2...inverter 3...
・OT 4... Load 11... Constant voltage control circuit, 12... Constant current control circuit 13... Phase shifter, 14... Gate control circuit 15... Overcurrent detection circuit. 16, -0Rs Fritzbufu [Koppu 17... Timer. (7317) Agent: Patent Attorney Nori Konan Yu (Haka1)
name) 1st cause diagram 2

Claims (1)

【特許請求の範囲】 直流を交流に変換するインパーク、該インバータの出力
電圧を一定に制御する定電圧制御回路、前記インバータ
の出力電流を所定の制限電流値以下に制限する定電流制
御回路を備えたインバータ装置において、該インバータ
装置の負荷側の短絡事故あるいは過負荷により生ずる過
電流を検出する過電流検出回路と、該過電流検出回路が
動作時、前記インバータをオフすることにより負荷電流
を前記定電流制御回路の制限電流値以下に抑制するとと
もに前記定電圧制御回路及び定電流制御回路の出力を最
小値韮でリセットして、その後所定の時間経過した時点
で、前記インバータをオンさせるとともに前記定電圧制
御回路及び定電流制御回路のリセットを解除する機能を
有する制御回路を設け、前記定電圧制御回路あるいは定
電流制御回路の動作により、前記インバータの出力電圧
を徐々(【上昇させて、短絡事故あるいは過負びが解除
されるまで、前記定電流制御回路の制限電流値以下の電
流を負荷に供給するようにしたことを特徴とするインバ
ータ装置の過負荷保護装置。
[Scope of Claims] Impark that converts direct current to alternating current, a constant voltage control circuit that controls the output voltage of the inverter to a constant value, and a constant current control circuit that limits the output current of the inverter to a predetermined current limit value or less. The inverter device includes an overcurrent detection circuit that detects an overcurrent caused by a short circuit accident or overload on the load side of the inverter device, and when the overcurrent detection circuit is in operation, turns off the inverter to reduce the load current. suppressing the current to below the limit current value of the constant current control circuit, resetting the outputs of the constant voltage control circuit and the constant current control circuit to a minimum value, and then turning on the inverter after a predetermined period of time has elapsed; A control circuit having a function of canceling the reset of the constant voltage control circuit and the constant current control circuit is provided, and the output voltage of the inverter is gradually increased by the operation of the constant voltage control circuit or the constant current control circuit. 1. An overload protection device for an inverter device, characterized in that a current less than a current limit value of the constant current control circuit is supplied to the load until a short circuit accident or overload is canceled.
JP56113490A 1981-07-22 1981-07-22 Overload protecting device for inverter Pending JPS5815472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56113490A JPS5815472A (en) 1981-07-22 1981-07-22 Overload protecting device for inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56113490A JPS5815472A (en) 1981-07-22 1981-07-22 Overload protecting device for inverter

Publications (1)

Publication Number Publication Date
JPS5815472A true JPS5815472A (en) 1983-01-28

Family

ID=14613615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56113490A Pending JPS5815472A (en) 1981-07-22 1981-07-22 Overload protecting device for inverter

Country Status (1)

Country Link
JP (1) JPS5815472A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213285A (en) * 1983-05-18 1984-12-03 Sanyo Electric Co Ltd Protecting device of inverter circuit
JPS62202021U (en) * 1986-06-12 1987-12-23

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213285A (en) * 1983-05-18 1984-12-03 Sanyo Electric Co Ltd Protecting device of inverter circuit
JPS62202021U (en) * 1986-06-12 1987-12-23

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