JPS58150383A - Inter-frame coding and decoding device for television - Google Patents

Abstract

PURPOSE:To improve the coding efficiency of an inter-frame coding/decoding device for TV, by transferring a coding stop code in place of a variable length code to suppress the generating quantity of information after an overflow in case an overflow signal of a buffer memory is produced. CONSTITUTION:A TV inter-frame coding/decoding device is provided with an inter-frame predictive coding circuit 100, a coding circuit 200, the 1st buffer memory 300 and a buffer memory overflow circuit 15. The circuit 100 obtains the difference between frames on the basis of the predicted value, i.e., the data of the preceding frame which is stored in a frame memory 6. When an overflow signal of the memory 300 is produced, the differential value of the circuit 100 is forcibly set at 0. At the same time, the coding of a variable length coding circuit 7 is discontinued, and a coding stop code is transferred in place of a variable length code. As a result, the quantity of information obtained after generation of an overflow is set fixedly at 10 bits.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television interframe coding and decoding device for band-compressing and transmitting digital television signals.

The interframe predictive coding method performs coding by focusing on the property that there is generally a large correlation between the preceding and following frames in television signals.The image information of the previous frame is stored in memory, and the difference from the previous frame is It transmits only the value. When the correlation between frames is large, the interframe difference values are concentrated near zero. For this reason, when interframe predictive coding is used, variable length codes are used and shorter codes are assigned to codes that occur more frequently.

The amount of information generated is further compressed by using block codes. Therefore, the amount of information generated in each frame is.

It varies depending on the input image, and when the correlation between two image frames is extremely small, the amount of information generated becomes large, and 1
There may be cases where all the information in a frame cannot be transmitted at the determined transmission pit rate.

Conventionally, in such cases, the amount of information generated within a certain encoding period (for example, the frame period of an image) is monitored, and if the amount exceeds a predetermined amount, the inter-frame difference value is forcibly set to zero. The amount of information generated after that was suppressed.

However, since no control was applied to the subsequent variable-length encoding or block encoding, block codes or variable-length codes are generated even when the inter-frame difference value is set to zero, and the amount of information generated is estimated. Therefore, the inter-frame difference value must be made zero earlier than the actual overflow, which has the disadvantage that the amount of effective pixels (pixels whose inter-frame difference value is not zero) to be sent is reduced.

An object of the present invention is to provide an interframe coding/decoding device that solves the above-mentioned drawbacks and efficiently transmits television signals.

Next, the present invention will be explained in detail with reference to the drawings.

In the following embodiments, the transmitting section and the receiving section will be explained separately.

FIG. 1 is a block diagram showing a transmitting section of an embodiment of a television interframe coding/decoding apparatus according to the present invention. In the figure, 1 (LO is an interframe predictive coding circuit, 20
0 is an encoding circuit, 300 is a first buffer memory, 15
is a buffer memory overflow detection circuit.

First, the interframe predictive coding circuit 100 will be explained. PCM television signal is input to input terminal 1,
For the PCM television signal, a subtracter 2 calculates an interframe difference using the data of the previous frame stored in the frame memory 6 as a predicted value.

FIG. 2 is a diagram showing the input and output of the quantizer and the variable length code and coding stop code of the variable length coding circuit. The difference value generated by the subtracter 2 is quantized by the quantizer 3 into 15 levels as shown in FIG. 2, and is input to the selection circuit 4.

The selection circuit 4 selects and outputs a quantizer output when an overflow signal 15a from a buffer memory overflow detection circuit 15, which will be described later, is not generated, and a difference value of zero when an overflow signal 15a is generated. The output signal 4a selected by the selection circuit 4 is
The adder 5 adds the data of the previous frame and writes it into the frame memory 6 as a predicted value of the next frame, and also inputs it to the variable length encoding circuit 7 and block encoding circuit 8 of the encoding circuit 200.

Next, the encoding circuit 200 will be explained. The variable length encoding circuit 7 allocates variable length codes as shown in FIG. 2, and allocates short codes in descending order of the frequency of 1 occurrence. Further, the variable length encoding circuit 7 stops encoding when an overflow signal 15a from the buffer memory overflow detection circuit 15, which will be described later, is generated, and generates information from then on by sending an encoding stop code shown in FIG. Suppress the amount to zero.

The block encoding circuit 8 configures a block in units of eight consecutive pixels, and if there is a valid pixel (pixel whose difference value is not zero) in the block, the block code is "0", and if there is a valid pixel in the block. If not, block code ``'1''
Output. However, an overflow signal 15a from a buffer memory overflow d-detection circuit 15, which will be described later.
If received, the block code of the first block is set to ``@0'' and no block code is generated thereafter while the overflow signal is generated.Multiplexing circuit 9
Now, after receiving the block code 8a and the variable length code (including the coding stop code) 7a, in the case of a valid block (block code "'O"), a variable length code is added with the block code at the beginning, and an invalid block ( In the case of block code "1"), only the block codes are sequentially multiplexed, and the encoded data 9
a to the first buffer memory 300.

Next, the first buffer memory 300 will be explained. The encoded data 9a is an interframe predictive encoding circuit 100
The information is written alternately to the memories 12 and 13 in units of encoding periods according to the level of the signal 100a indicating the encoding period generated in the encoding period. The data read from the memory 12 or the memory 13 is read out during a time other than the write period, and is outputted to the output terminal 16 via the 2 selection circuit 14.

Buffer memory over 70-detection circuit 15.

The overflow signal 15a is reset at the change point of the signal 100a indicating the encoding period, and the memory 12 or memory 1
3, the amount of data in the memory being written is monitored, and if it exceeds a predetermined amount, an overflow signal 15m is set. Further, the output terminal 17 has a signal 100 indicating the encoding period.
a outputs.

FIG. 3 is a block diagram showing a receiving section of an embodiment of the television interframe coding/decoding apparatus of the present invention. In the figure, 400 is a second buffer memory, 500 is a decoding circuit, and 600 is an interframe predictive decoding circuit.

First, the second buffer memory 400 will be explained.

The encoded data 18a encoded by the transmitter receives a signal 19m indicating the encoding period, and is sent to the memory 20 and the memory 2 in data units of each encoding period according to the level of the signal 19a.
1 alternately. Memory 20 or memory 21
Reading from .

It is read out during a time other than the write period and is output to the decoding circuit 500 via the 2 selection circuit 22.

The decoding circuit 500 receives encoded data 22a from the 2 selection circuit 22, decodes the block code in the block decoding circuit 24, and if the block code 24a is '1', the selection circuit 26 outputs a difference value of zero. .If the block code 24a is @0'', the variable length decoding circuit 23
The variable length code following the block code is decoded and output to the 1 selection circuit 26. The selection circuit 26 selects block code 2.
If 4m is "0#", the difference value from the variable length decoding circuit 23 is selected and output.The variable length decoding circuit 23 also detects a coding stop code at the same time.

When this encoding stop code is detected, a control signal 23a is generated which controls the selection circuit 27 and makes the subsequent difference value zero. This control signal 23a is set upon detection of an encoding stop code, and is reset at a change point of the signal 19a indicating the code period.

The interframe predictive decoding circuit 600 is a decoding circuit 500
The adder 28 receives the decoded difference data 27a from the frame memory 29 and adds the decoded difference data 27a to the prediction data stored in the frame memory 29, thereby decoding the PCM television signal. This decoded PCM television signal is output to the output terminal 30 and is also written into the frame memory 29 as prediction data for the next frame.
As is clear from the above embodiments, the television interframe coding/decoding device of the present invention forces the difference value of the interframe predictive coding circuit to change when an overflow signal of the first buffer memory occurs. In addition to reducing the amount to zero,
Since encoding in the variable length encoding circuit is stopped and an encoding stop code is transferred instead of the variable length code, the amount of information after an overflow occurs is fixedly only about 10 bits. Therefore, a television-side interframe coding/decoding device with extremely high coding efficiency can be obtained, which is highly effective.

Furthermore, it can be easily inferred that in the above embodiments, the interframe predictive coding circuit and the interframe predictive decoding circuit can be replaced with a composite prediction method including an intraframe predictive coding and decoding method. Furthermore, the quantization characteristics shown in FIG. 2, the variable length code, the coding stop code, and the block coding method used in the above embodiments are not limited to these.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a transmitter according to an embodiment of the present invention;
Figure 2 is a diagram showing the input and output of the quantizer in Figure 1, and the variable length code and coding stop code of the variable length encoding circuit.
The figure is a block diagram showing a receiving section according to an embodiment of the present invention. Explanation of symbols: 2 is a subtracter, 3 is a quantizer, 4 is a selection circuit, 5 is an adder, 6 is a frame memory, 7 is a variable length encoding circuit, and 8 is a block encoding circuit. 9 is a multiplexing circuit, 12.13 is a memory, 14 is a selection circuit, 15 is a buffer memory overflow detection circuit, 2
0.21 is a memory, 22 is a selection circuit. 23 is a variable length decoding circuit, 24 is a block decoding circuit,
26.27 is a selection circuit, and 28 is an addition circuit. 29 is a frame memory, 100 is an interframe predictive coding circuit, 200 is an encoding circuit, 300 and 400 are buffer memories, 500 is a decoding circuit, and 600 is an interframe predictive decoding circuit. Figure 2

Claims (1)

[Claims] 1. In a revision interframe coding/decoding device that compresses the band and transmits a digital television signal, the interframe difference value is forcibly set to zero in response to a buffer memory overflow signal. an interframe predictive coding circuit for a digital television signal having a circuit to encode a digital television signal by receiving a difference value between the interframe predictive coding circuit and the interframe predictive coding circuit, and stopping coding in response to a buffer memory overflow signal to perform coding. an encoding circuit having a function of adding a code indicating that encoding has been stopped to an encoded information string; and an encoding circuit having a function of adding a code indicating that encoding has been stopped to an encoded information string; write alternately at
A first buffer memory from which the write information of the memory whose write operation has stopped is read out in response to a request from the transmission line side among the two memories, and a memory where the write operation of the first buffer memory is in progress. a transmitter comprising a buffer memory overflow detection circuit that generates the buffer memory overflow signal when it detects that the buffer memory exceeds a predetermined storage amount; a second buffer memory to which data is written alternately at the same encoding cycle as that of the transmitter in response to the encoded information string; and a memory in which writing operations are stopped from among the two memories. Read information. a decoding circuit that decodes the code and sets the subsequent difference value to zero when it detects a code that indicates that the coding added by the transmitter has stopped; 1. An interframe coding and decoding device for television, comprising: a receiving section having an interframe predictive decoding circuit for decoding into a television signal.