JPS58142706U - Auxiliary controller for multiple loop controllers - Google Patents
Auxiliary controller for multiple loop controllersInfo
- Publication number
- JPS58142706U JPS58142706U JP3842082U JP3842082U JPS58142706U JP S58142706 U JPS58142706 U JP S58142706U JP 3842082 U JP3842082 U JP 3842082U JP 3842082 U JP3842082 U JP 3842082U JP S58142706 U JPS58142706 U JP S58142706U
- Authority
- JP
- Japan
- Prior art keywords
- input
- database
- output
- content
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Feedback Control In General (AREA)
- Control By Computers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は、複数ループ制御装置と本考案実施例の補助制
御装置との接続関係を示す概念的構成図、第2図は、補
助制御装置の表示操作器の一例の正面図、第3図は、複
数ループ制御装置と本考案実施例の補助制御装置との接
続関係の詳細図である。
1・・・複数ループ制御装置、2・・・補助制御装置、
−3・・・通信線、4・・・オペレータ操作装置、F
CA・・・通信制御回路、NPU・・・プロセッサ、N
MU・・・メモリ、MA■0・・・マルチループ・アナ
ログ入出力回路、AIO・・・シングルループ・アナロ
グ入出力回路、LDC・・・インターフェイス回路、D
M・・・表示操作器、DRI、DR2・・・データ・レ
ジスタ、F・・・ファームウェア。FIG. 1 is a conceptual configuration diagram showing the connection relationship between a multiple loop control device and an auxiliary control device according to an embodiment of the present invention, FIG. 2 is a front view of an example of a display/operation device of the auxiliary control device, and FIG. 3 1 is a detailed diagram of the connection relationship between a multiple loop control device and an auxiliary control device according to an embodiment of the present invention; FIG. 1... Multiple loop control device, 2... Auxiliary control device,
-3...Communication line, 4...Operator operating device, F
CA...Communication control circuit, NPU...Processor, N
MU...Memory, MA 0...Multi-loop analog input/output circuit, AIO...Single-loop analog input/output circuit, LDC...Interface circuit, D
M...Display operation device, DRI, DR2...Data register, F...Firmware.
Claims (1)
含むデータ・ベースを有しこのデータ・ベースの入出力
データをアナログ信号の形式で制御対象に対して授受す
る複数ループを対象にした二重化アナログ入出力回路と
が内部データ・バスによって接続されてなる複数ループ
制御装置のための補助制御装置であって、複数ループの
入出力信号に対応したアナログ指示計とオペレータ用の
操作キーとを有する爪操作器、および、複数ループ制御
装置の内部バスに接続され、複数ループの入出力データ
を保持できるデータ・ベースと、このデータ・ベース内
の各ループごとの入出力データをそれぞれアナログ信号
の形式で表示操作器の指示計に与える出力コンディショ
ナと、表示操作器における操作キーの状態を読み取って
データ・ベースに書き込む入力コンディショナと、デー
−タ・ベースに書き込まれた操作キーの状態データに従
って、手動制御状態でないときはデータ・ベースの内容
を前記二重化アナログ入出力回路の実働側のデータ・ベ
ースの内容に一致させ、手動制御状態のときは前記二重
化アナログ入出力回路のデーターベースの内容を自己の
データ・ベースの内容に一致させるファームウェアとを
有するインターフェイス回路を具備する補助制御装置。A dual analog input system for multiple loops that includes a processor, memory, and a data base containing control loop input/output data, and sends/receives the input/output data of this database to and from the control target in the form of analog signals. An auxiliary control device for a multi-loop control device connected to an output circuit by an internal data bus, the claw-operated device having an analog indicator corresponding to input/output signals of the plural loops and operation keys for an operator. A database that is connected to the internal bus of the controller and multiple loop control device and can hold input/output data for multiple loops, and displays the input/output data for each loop in this database in the form of analog signals. An output conditioner feeds the indicator of the controller, an input conditioner reads the state of the operation keys on the display controller and writes it to the database, and a manual When not in the control state, the content of the data base is made to match the content of the database on the active side of the redundant analog input/output circuit, and when in the manual control state, the content of the database of the redundant analog input/output circuit is made to match the content of the database on the active side of the redundant analog input/output circuit. An auxiliary controller comprising an interface circuit with firmware matching the contents of the data base.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3842082U JPS58142706U (en) | 1982-03-18 | 1982-03-18 | Auxiliary controller for multiple loop controllers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3842082U JPS58142706U (en) | 1982-03-18 | 1982-03-18 | Auxiliary controller for multiple loop controllers |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58142706U true JPS58142706U (en) | 1983-09-26 |
Family
ID=30049761
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3842082U Pending JPS58142706U (en) | 1982-03-18 | 1982-03-18 | Auxiliary controller for multiple loop controllers |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58142706U (en) |
-
1982
- 1982-03-18 JP JP3842082U patent/JPS58142706U/en active Pending
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