JPS58142520A - Method of producing condenser - Google Patents

Method of producing condenser

Info

Publication number
JPS58142520A
JPS58142520A JP2577782A JP2577782A JPS58142520A JP S58142520 A JPS58142520 A JP S58142520A JP 2577782 A JP2577782 A JP 2577782A JP 2577782 A JP2577782 A JP 2577782A JP S58142520 A JPS58142520 A JP S58142520A
Authority
JP
Japan
Prior art keywords
capacitor
capacitance
electrodes
parallel strips
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2577782A
Other languages
Japanese (ja)
Inventor
菅野 寛明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2577782A priority Critical patent/JPS58142520A/en
Publication of JPS58142520A publication Critical patent/JPS58142520A/en
Pending legal-status Critical Current

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  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (al  発明の技術分野 本発明は固定コンデンサの製造方法とりわけその容量調
整方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method of manufacturing a fixed capacitor, and particularly to a method of adjusting its capacitance.

(b)  技術の背景 コンデンサは静電容量を提供する素子であり、電気機器
の回路構成におけるインダクタンス、抵抗と共に受動部
品として広く使用されている。
(b) Background of the Technology Capacitors are elements that provide electrostatic capacitance, and are widely used as passive components along with inductance and resistance in circuit configurations of electrical equipment.

9ンデンサは2個の相対向すゐ電極によりて得られる静
電容量を接続線によシ引出して得られ、種々の形態が提
供されている。こ\で発明の対象とする積層形;ンジン
サは他の巻回形あるいは電解形に対し比較的小容量の分
野で使用され、通常耐熱性誘電材料よシなる筒形あるい
は板形の両面に厚膜生成技法による例えば銀電極を形成
して得たコンデンサ素子の本体あるいは板形にありては
該;ンジンナ素子を複数個積層且一体化してそO^電極
に端子付けを施して得られる。
The capacitor is obtained by drawing out the capacitance obtained by two opposing electrodes through a connecting wire, and various forms are provided. The laminated type that is the subject of this invention is used in the field of relatively small capacity compared to other wound types or electrolytic types, and is usually made of a cylindrical or plate type made of heat-resistant dielectric material and thick on both sides. The main body or plate shape of a capacitor element obtained by forming, for example, a silver electrode using a film formation technique can be obtained by laminating and integrating a plurality of such elements, and then attaching terminals to the electrodes.

((+)  従来技術と問題点 従来よシ積層形コンジンナはその構造から弛O誘導・抵
抗成分が巻回形あるいは電解形コンジン?に比較して少
く、壱〇iil形および電解形の主用途であるエネルギ
蓄積、低周波r波および側路用とは別の小容量に適した
比較的高い周波数領域における同調1発振、移相用過に
提供されろ理由から、静電容量精度の高い品質が要求さ
れる傾向が強く、この高精度の要求に対してはそOII
造工1iKThいて静電容量選別★九は静電容量調整と
いう手段によ)対処していた。
((+) Conventional technology and problems Due to its structure, the conventional laminated type condenser has less loose O induction and resistance components than the wound type or electrolytic type condenser, making it the main use of the IIII type and electrolytic type. Due to the high quality of the capacitance precision, it is suitable for energy storage, low frequency R-waves and small capacitance tuning in the relatively high frequency range, phase shifting and other reasons. There is a strong tendency for OII to be required for this high precision requirement.
However, the problem of capacitance selection (★9) was dealt with by means of capacitance adjustment.

第1図は従来および本発明の一実施例における積層形コ
ンデンサの構造を示す断面図である。図においてlは誘
電体、2a、aa* b、bbは電極。
FIG. 1 is a sectional view showing the structure of a conventional multilayer capacitor and an embodiment of the present invention. In the figure, l is a dielectric, and 2a, aa*b, and bb are electrodes.

3は銀塗膜、4はハンダ、5は接続リード線および6は
、防−被覆である。
3 is a silver coating, 4 is solder, 5 is a connecting lead wire, and 6 is an anti-coating.

例えば静電容量調整は第2図の従来における積層形コン
デンサの静電容量調整方法を示す外観斜視図(除防S*
覆6)のように誘電体10両面に鎖ペーストを塗布、焼
成して得九電極2a、 aa、 b。
For example, for capacitance adjustment, Figure 2 is an external perspective view showing a conventional capacitance adjustment method for multilayer capacitors (removal S*
Nine electrodes 2a, aa, b are obtained by applying chain paste on both sides of the dielectric 10 and firing as shown in Figure 6).

bbの内最外面における対向部面積をカートアンドトラ
イによる研削加工によ〕除去部11を設けて縮小し所定
の静電容量に調整する手段によりている。従って最外面
の電極2am、図示はしないが2bbの除去作業に伴い
その除去部11の面積が増える程下地の誘電体にも研削
加工が及んで損傷する機会が増えるので、誘電体1の機
械的強度あるいは絶縁耐力が低下する可能性が増加して
品質が低下するので、他の静電容量選別による方法と共
に製造歩留シが低下してコストが上昇するという欠点を
備えていた。
The area of the facing portion on the innermost outermost surface of bb is reduced by providing a removed portion 11 by grinding by cart-and-try, and the capacitance is adjusted to a predetermined value. Therefore, as the outermost electrodes 2am and 2bb (not shown) are removed, as the area of the removed portion 11 increases, the chance that the underlying dielectric will be damaged due to grinding increases. Since there is an increased possibility that the strength or dielectric strength will decrease, resulting in a decrease in quality, this method, along with other capacitance screening methods, has the disadvantage of decreasing manufacturing yield and increasing costs.

(d)  発明の目的 本発明はこの欠点を除去し従来に比較して静電容量調整
を下地の誘電体の損傷を最小限にとソめて効率のよい電
極の除去縮小作業を実施する手段を提供しようとするも
のである。
(d) Object of the Invention The present invention eliminates this drawback and provides a means for performing capacitance adjustment while minimizing damage to the underlying dielectric material and performing an efficient electrode removal and reduction operation compared to the conventional method. This is what we are trying to provide.

(・)発明の構成 そしてこの目的は本発明による誘電体の相対向する両面
に銀ペースト等の厚膜による電極を焼成した本数のコン
デンサ素子による、または複数の該コンデンサ素子を積
層し一体化して得る積層形コンデンサにおいて、−電体
の外面に設定する単一面または両面の厚膜電極のパター
ンを最小単位幅よりなる、を九は最小単位幅とその整数
倍幅の組合せKよる複数の平行ストリップによって形成
し、コンデンサの静電容量調整を該平行ストリップを切
断して得る削除筒数および/ま九は削除寸法の選択によ
り行うことを特徴とするコンデンサの製造方法を提供す
ることによって達成することが出来る。
(・) The structure and purpose of the invention is to form a plurality of capacitor elements in which electrodes made of a thick film such as silver paste are fired on opposite surfaces of a dielectric body according to the present invention, or to laminate and integrate a plurality of capacitor elements. In the multilayer capacitor obtained, - the pattern of single-sided or double-sided thick film electrodes set on the outer surface of the electric body consists of a minimum unit width, where 9 is a plurality of parallel strips with a combination K of the minimum unit width and its integral multiple width. This is achieved by providing a method for manufacturing a capacitor, characterized in that the capacitance of the capacitor is adjusted by selecting the number of cylinders to be removed and/or the dimension to be removed by cutting the parallel strips. I can do it.

(f)  発明の実施例 以下本発明の一実施例について図面を参照しつ\説明す
る。
(f) Embodiment of the Invention An embodiment of the invention will be described below with reference to the drawings.

第3図は本発明の一実施例における積層形コンデンサの
外観斜視図である0但し第3図では第1図に示す防護被
覆は除いて示しである01は誘電体、4はハンダ、S#
i接続リード−120a、bはストリップ形電極である
0そして最外面の電極20a、bを除いて第1図の電極
2aaebbを除く構成に同等である◎従って図示しな
い酵電体1相互間の電極11a、bは従来と同様である
FIG. 3 is an external perspective view of a multilayer capacitor according to an embodiment of the present invention. However, in FIG. 3, the protective coating shown in FIG. 1 is removed. 01 is a dielectric, 4 is a solder, S#
The connection leads 120a and 120b are strip-shaped electrodes, and except for the outermost electrodes 20a and 20b, the structure is the same as that shown in FIG. 11a and 11b are the same as the conventional one.

第3図のように従来の電極2am、bbはlliの連続
パターンによる銀ペーストの焼付を変えて例えばこ\で
はパターンの最小単位幅よりなる平行ストリップ形状と
した電極20mが10本と5倍パタるIll!1量に従
って研削加工によって切断する各電極20a、bの削除
筒数を九は先端よシの削除寸法を選択すれば従来に比較
して削除する面積を容易に計数出来る。
As shown in Fig. 3, the conventional electrodes 2am and bb are printed in a continuous pattern of lli by changing the baking of the silver paste. Ill! If the number of tubes to be removed from each electrode 20a, b to be cut by grinding according to the amount of 9 is selected, the area to be removed can be easily counted compared to the conventional method by selecting the size to be removed from the tip.

第4図は本発明の他の一実施例における積層形コンデン
サにおける最外面の電極パターン図である0本実施例で
は第3図の電極20a、bに代って更に平行ストリップ
形の電極パターンにパターン幅の狭小な切欠き部をnヶ
例えば4ケ追加して5制の各ブロック部分よりなる電極
21a、bl形成する。このようKすれば研削加工によ
る電極21a+bの切断が更に容易になp1誘電体1の
材料選択によって例えばレーザのようなエネルギー線ビ
ーム照射を使用して効率の良い静電容量の調整作業が出
来る。以上は調整電極面を上面のみとして説明し九が下
面を含め九2面KF&けても喪く、また電極パターン形
状を2種類の組合せとし九が必要によっては何れか1種
類のパターンでも喪い。更にと\では誘電体を矩形板と
したが、円板上にも同様に平行ストリップ形の電極パタ
ーンが形成出来る他、管状でありても外面円筒上の軸方
向に平行ストリデプ形の電極パターンを形成して同様に
静電容量の調整作業を行うことが出来る。
FIG. 4 is a diagram of the outermost electrode pattern in a multilayer capacitor according to another embodiment of the present invention. By adding n (for example, 4) notches having a narrow pattern width, the electrodes 21a and bl each consisting of 5 block portions are formed. With K in this manner, cutting of the electrodes 21a+b by grinding becomes easier, and by selecting the material of the p1 dielectric 1, efficient capacitance adjustment can be performed using energy beam irradiation such as a laser. The above description assumes that the adjustment electrode surface is only the top surface, and the two surfaces including the bottom surface can be used.Also, two types of electrode pattern shapes can be combined, and if necessary, any one pattern can be used. Furthermore, although the dielectric material was made into a rectangular plate in \\, a parallel strip-shaped electrode pattern can be formed on a disk as well, and even if it is tubular, a parallel strip-shaped electrode pattern can be formed in the axial direction on the outer cylinder. After forming the capacitance, the capacitance can be adjusted in the same way.

(x)発明の詳細 な説明したように本発明によれば静電容量の調整作業に
おいて置型体上において削除する電極の面積が容易に計
数的に把握出来るので対向電極の面積に比例する静電容
量の11整を従来のカットアンドトライの繰返しに比較
して迅速且的確に行うことが出来る他電極の除去による
面積縮小を平行ストリップの幅を切断するととKよプ行
うので誘電体に及ぼす機械的・電気的損傷の度合も少く
なシ安定した製品が得られて有用である0
(x) As described in detail, according to the present invention, the area of the electrode to be removed on the stationary mold body can be easily and numerically determined in the capacitance adjustment work, so that the electrostatic charge is proportional to the area of the opposing electrode. Capacitance adjustment can be performed more quickly and accurately than conventional cut-and-try repetitions. Cutting the width of parallel strips reduces the area by removing other electrodes, which reduces the mechanical effect on the dielectric material. It is useful because it provides a stable product with less physical and electrical damage.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来および本発明の一実施例における積層形コ
ンデンサの構造断面図tjgz図は従来における積層形
コンデンサの静電容量調整方法を示す斜視図、第3図は
本発明の一実施例における積層形コンデンサの外観斜視
図および第4図は本発明の他の一実施例における電極の
パターン管示す平面図である。 図において、1は誘電体*  2m、 2mm、 2b
、 2b b、 20 m、 20 b、 21 mお
よび21bは電極である0 笑1m 寧4閃
FIG. 1 is a cross-sectional view of the structure of a multilayer capacitor according to a conventional method and an embodiment of the present invention. FIG. 3 is a perspective view showing a conventional method for adjusting the capacitance of a multilayer capacitor, and FIG. FIG. 4 is a perspective view of the appearance of a multilayer capacitor and a plan view showing an electrode pattern tube in another embodiment of the present invention. In the figure, 1 is dielectric* 2m, 2mm, 2b
, 2b b, 20 m, 20 b, 21 m and 21b are the electrodes 0 lol 1 m Ning 4 flash

Claims (2)

【特許請求の範囲】[Claims] (1)誘電体の相対向する両面Kfliペースト等の厚
膜による電極を焼成した拍数のコンデンサ素子による、
または複数の該コンデンサ素子を積層し一体化して得る
積層形固定コンデンサにおいて、誘電体の外面に設定す
る単一面または両面の厚膜電極のパターンを最小単位幅
よりなる、tたけ最小−位幅とその整数倍幅の組合せに
よる複数の平行ストリップによって形成し、コンデンサ
の静電容量調整を咳平行ストリップを切断して得る削除
筒数および/lたは削除寸法の選択によ勤行うことを特
徴とするコンデンサの製造方法。
(1) By a capacitor element with a number of beats made by firing electrodes made of a thick film such as Kfli paste on both sides of dielectrics facing each other,
Or, in a multilayer fixed capacitor obtained by laminating and integrating a plurality of such capacitor elements, the pattern of single-sided or double-sided thick film electrodes set on the outer surface of the dielectric has a minimum unit width of t. The capacitor is formed by a plurality of parallel strips with a combination of integral multiple widths, and the capacitance of the capacitor is adjusted by cutting the parallel strips and selecting the number of cylinders to be removed and/or the size to be removed. A method for manufacturing capacitors.
(2)−項記載のコンデンサ製造方法において誘電体の
外面に備える平行ストリップによる電極パターン上のm
数箇所に挟小部を設け、静電容量調整
(2) In the capacitor manufacturing method described in paragraph (2)-, m on the electrode pattern formed by parallel strips provided on the outer surface of the dielectric material.
Capacitance can be adjusted by providing small parts in several places.
JP2577782A 1982-02-19 1982-02-19 Method of producing condenser Pending JPS58142520A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2577782A JPS58142520A (en) 1982-02-19 1982-02-19 Method of producing condenser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2577782A JPS58142520A (en) 1982-02-19 1982-02-19 Method of producing condenser

Publications (1)

Publication Number Publication Date
JPS58142520A true JPS58142520A (en) 1983-08-24

Family

ID=12175270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2577782A Pending JPS58142520A (en) 1982-02-19 1982-02-19 Method of producing condenser

Country Status (1)

Country Link
JP (1) JPS58142520A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS648721U (en) * 1987-07-06 1989-01-18

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS648721U (en) * 1987-07-06 1989-01-18

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