JPS58141010A - Am detector - Google Patents

Abstract

PURPOSE:To perform efficient AM detection through simple constitution by detecting the level difference between DC components right before full-wave rectification and controlling the bias voltage to a differential amplifier. CONSTITUTION:The outputs of the differential amplifier 2 are supplied directly to a full-wave rectifying circuit 9 and low-pass filters 70 and 71 corresponding to those outputs are provided on the output side of the differential amplifier 2; those two outputs of the amplifier 2 are converted by those filters 70 and 71 into DC signals, which are amplified by an amplifier 72 and suppled to a capacitor 74 provided on the other input side of the amplifier 2 through a resistor as a constant current source 73 to stabilize the loop, thereby controlling the input bias potential of the differential amplifier 2 so that the DC level difference between two outputs appearing at the output side is eliminated. Consequently, the DC potentials of the two outputs of the differential amplifier 2 are balanced normally, so the full-wave rectifying circuit 9 performs correct full-wave rectification.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a M detection system 11KIl suitable for use in, for example, a signal processing system of a VTR.

Conventionally, this type of inspection #LII, for example, the 1st r17
Something similar to AK has been proposed. That is, at 3I in FIG. 1, (1) is an input terminal to which, for example, a signal in which a carrier signal with a predetermined number of cycles IIIL is subjected to J141 modulation as a video signal is supplied. A differential amplifier with 2 inputs and 2 outputs, (3) and (4) are differential amplifier circuits installed on the output side of the circuit, (5) and (6) are circuits that are installed on the output side of the circuit. DC blocking capacitors are installed on the output sides of (5) and (4), respectively.

The reason why these bias voltages (5) and (6) are inserted is because of the difference between the DC component of the input signal of the differential amplifier (2) and the bias potential. Differential amplifier (2)
This is because there is no direct connection between the output side and the next stage. If you use t, ;ndenna 俤) and (6) for the payment, special K
Inside the IC, it is about 0.3 to 5 times its capacity! parasitic capacitance occurs. During operation, this parasitic capacitance must also be driven, and for this purpose, the load-off circuits (3) and (4) that require a large amount of current are used. (
7> and (8) are the electrical power supply circuits installed on the output sides of the condensers (5) and (6), respectively.
=νDenna (5) and (6) prevent the ramp operation and trench 9 from generating a DC component II. Furthermore, both liquid rectifiers 11j are installed on the output sides of the circuits (7) and (8).
l (9ν is provided here, and the diode square and 4112 are representatively represented here.Then, the diode square and α
The output sides of υ are commonly connected and connected to output terminal azK. Further, (13) represents the bias power supply of the differential amplifier (2) using a typical K11m power supply.

FIG. 2 shows a specific circuit configuration of FIG. 1, and in the same mK, parts corresponding to those in FIG. 1 are given the same reference numerals and will be explained. The differential amplifier (2) has a pair of transistors (21J (2), and F transistors Qυ, (2
), each base has a bias totunji xp(2),
The transistors 3υ, (
Each collector of 2) is connected to a positive power supply terminal +Vcc K via a resistor @, @, respectively, and each collector is commonly connected via a resistor @, @ to a constant current source transistor wire on the back page. through the collector-emitter path of ``cII'' and the resistor (to).

The terminals of transistors (2) and @ are connected to the collectors of constant current source transistors G and (to), respectively, and the terminals of transistors (ELL) and (2) are connected to resistors (
(To) and (B) are grounded. Further, the collectors of the transistors (C) and (I) are connected to the power supply terminal +Vccy, and the bases of each of them are connected to the air terminal KW of [transistor 07] via resistors s@ and C1l, respectively. ) The collector of the Tungister (b) is connected to the power supply terminal +Vcc, the base is connected to the connection point of the bias voltage dividing resistor s@ and (to), and the collector is connected to the collector-emitter path of the constant current source transistor and the resistor I @I).

Further, the base of the transistor (c) is connected to the input terminal (1) K via a capacitor t-. A transistor wire is provided for driving a constant current source, and this transistor (to)
The collector of is connected to the power supply terminal +Vcc K, and the base is connected to the bases of transistors H, clυ, @, @, and (I). In addition, the base of the transistor (transistor) is connected to the power supply terminal +Vcc through a resistor.
) 93/prefter-emitter path of resistor ■ and resistor II
Grounded via @.

＠η and - are transistors that constitute the air-field four-wheel circuits (3) and (4), respectively, and the base of the transistor is the collector Kll of the transistor υ, and the transistor! 1r); Rector is power supply terminal +Vcc
K is connected, and the air terminal is grounded through the letter terminal of the constant current source transistor and the resistor. Also, the base of the transistor is connected to the collector of transistor (2), the collector of the transistor is connected to the power supply terminal +Vcc, and the collector of the transistor is connected to the constant voltage tlLIl.
It is grounded via the collector-emitter path of the transistor 61) and the resistor.

In addition, the transistors 7 and 4 are connected to the industrial 7-4 circuit (7) via capacitors (5) and (6), respectively.
) and (8), respectively, and -
connected to each base. The collector of the transistor (2) is connected to the power supply terminal +Vcc K, and the output terminal is grounded via the collector-emitter path of the transistor (for constant current source) and the resistor -. In addition, the collector of the transistor is connected to the power supply terminal +Vcc, and the collector terminal is grounded via the collector terminal terminal Z terminal of the constant current transistor and the resistor -.

Further, the transistor and - terminals are respectively connected to the bases of the transistor and the ring constituting the double-wave rectifier circuit (9). The collectors of the transistors transponder and am are both connected to the power supply terminal +Vcc K, and after the respective collectors are commonly connected, they are grounded via the collector emitter path of the constant current source transistor and the resistor sI3. Also, each base of the transistor and - has a resistance i! x ring and (
It is connected to the air terminal of the transistor ■ through the material).

The collector of this transistor is the power supply terminal +Vcc K
The output terminal is grounded through the collector-emitter path of the constant current source transistor and the resistor. And the base of the transistor is the bias voltage dividing resistor se
Connected to the e and - connection points. The bases of the constant current transistors and the wheels are also connected to the air terminals of the drive transistors. Then, the output terminal (11) is taken out from the common connection point of each of the transistors and -. In such a configuration, the current flowing through each current path is equal to each constant current 1.
For example, in this circuit,
Transistor import @ and 6? ) is 100 μ
The current flowing through the transistors 1 and 6 is 200 a, and the current flowing through the AF transistors 2 and 6 is 356 μm. Now, the signal supplied from the input terminal (1) is taken out as a differential output (!a5 output) from the differential amplifier (2), and these two output signals are amplified by the emitter follower circuits (3) and (4). After that, through the capacitors (5) and (6), the power supply circuit (power and (8)
) is supplied to the double-wave rectifier circuit (9).

Then, after being full-wave rectified here, it is taken out from output terminal 0 as an AM detection output.

Note that it is preferable that the DC levels of the 2' outputs of the differential amplifier (2) be at the same potential, and for this purpose bias settings are made in advance using the transistor (2) and the like. Each of the transistors on and w; variations in the resistors (c) and @ inserted in the resistors, respectively, and the resistors inserted in each emitter, or variations in the current amplification factor of the transistors @, 94. Due to various factors such as variations in the current of the constant current source, it is difficult to necessarily make the DC levels of the two outputs of the differential amplifier (2) the same. So I erased this.〈Capacitor (5
) and (6) are used to connect with the next stage.If we use this ;ndenna combination, as mentioned above, in the case of the %KIC configuration, ;ndenna (5) and ( 6
) A parasitic capacitance C$ as shown by the broken line in FIG. Since this parasitic capacitance Cs & must be driven, an emitter follower circuit (3
) and (4) exhibit a so-called slew rate phenomenon in which the rate increases linearly during discharge, as shown by the broken line in FIG. 3, and therefore require a large current. Incidentally, since the input/output peak value (gain) of this human M detector is -12 dB at 60-modulation, it is necessary to drive a large amplitude (zVpp). . (Transmission requires a fairly large current.

Also, a double-wave rectifier port j! consisting of transistors 6I and -!
For K to perform full-wave rectification correctly in (9), it is necessary that the bias potentials of the bases of transistors ■ and sgi be at the same level, but in the absence of transistors During a half cycle, the input signal is transmitted through transistors f(5) and (6), respectively.
However, during the negative half cycle, the resistor I
Since current flows through IEI and -, a difference occurs in the bias potentials of the bases of the transistors and -, and as a result, the double-wave rectifier 11WA path (9) operates not as full-wave rectification but as half-wave rectification. In order to prevent this, the transistors and shafts constituting the air filter circuits () and (8), respectively, are used.

In this way, in the case of the conventional circuit, there is a
5) and (6), an emitter follower circuit (3) is used to drive the parasitic capacitance that occurs accompanying this.
) and (4) to balance the base potentials of both transistors of the double-wave rectifier fIL circuit (9). Therefore, if the circuit configuration becomes complicated, the current consumption also increases.

The present invention takes into consideration these points and provides a 5M wave detector which has a simple configuration, has low current consumption, and can also reduce the area occupied by the capacitor in the XC.

Hereinafter, one embodiment of the present invention will be described in detail with reference to FIGS. 4 and 5.

FIG. 4 shows an embodiment of the present invention. In the figure, parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and detailed explanation thereof will be omitted.

In this embodiment, the output of the differential amplifier (2) is directly supplied to the double-wave rectifier circuit (9) K, and low-frequency r wave generators qQ are connected to the output side of the differential amplifier (2) corresponding to the two outputs. and n are provided, and after converting the two outputs from the differential amplifier 11ti into a DC signal with these low-frequency P wave generators 4 and σD, the two outputs from the differential amplifier 11ti are amplified by the amplifier a, and the constant current source (2) shown by the resistor is A capacitor provided at the other input end of the differential amplifier (2) through the capacitor ? 94
K is supplied to the differential amplifier (2) to stabilize the loop.
2 obtained on the output side by controlling the input bias potential of
Make the output DC level difference zero. This maintains a normal balance between the DC potentials of the two outputs of the differential amplifier (2), allowing the double-wave rectifier circuit (9) to perform full-wave rectification correctly.

Figure 5 shows the specific circuit configuration of Figure 4.
In the figure, parts corresponding to those in the circuit of FIG. 2 are given the same reference numerals, and their details 'IIW14' are omitted.

In the figure, the output side of the differential amplifier (2) is directly connected to the input side of the double-wave rectifier circuit (9). That is, the retata of the transistors @I) and (2) are connected to the respective paces of the transistors I and -, respectively. The output terminal Oυ is connected to the connection point between the transistors and the negative terminals in the same way as in FIG. 2 described above.

In this example, the skewer force side of the differential amplification
Amplification I! via wave generator cII and σ1! The resistor of the transistor υ connected to the input side of (2) is grounded via the resistor (c) and capacitor ae that constitute the low-frequency f-wave device, and the resistor (c) and; y denna σQ
Connect the connection point to a pair of F transistors (
to the base of one of the transistors, e.g. Also, the collector of transistor (2) is
[Affl is grounded via the resistor lIn and the capacitor ■, and these resistors 1f+ff! and connect the connection point of the capacitor to the base Km of the transistor (to). After connecting the transistors ■ and n in common, connect the collector of the transistor @υ and the transistor nI) to the positive power supply terminal +Vcc K, and connect the collector of the transistor (c) to the left terminal of the transistor. and connected to the power supply terminal +Vcc via the resistor see.

And Sister Silan's pace connects to its own collector. ') The transistors have a diode connection configuration. With this configuration, the transistors (2) and (3) constitute a so-called current mirror circuit.

Furthermore, the base of the transistor (c) is connected to the base of the transistor that acts as a constant current source, and the current of this transistor (c) is connected to the power supply terminal +V via the resistor.
ccKII is connected, the collector is grounded through the left terminal path of the transistor which acts as a constant current source together with this transistor, and the resistor ■, and the transistor (2) which constitutes the differential amplifier (2) is further connected to the ground Km. be done. A capacitor σ4 is connected between the collectors of F transistors @ and H and the common connection point of the transistor (2) and the ground. Further, the bases of transistors υ and 2 are connected to transistors 4, Q4, and 2 of transistors KII for driving. And here, for example, in transistor (2), the current flowing through the σ field is 50 fim (that is, the current flowing through the transistor is 100 μm), the current flowing through the transistor is 200 μm, and the current flowing through the transistor and - is set to 5OsAK.

Next, the circuit operation of this aS diagram will be explained. Input terminal (1)
The input signal from the transistor 1 of the differential amplifier (2)
0 pace, and differential outputs, that is, two outputs are obtained from the respective collectors of transistors υ and (2). These two outputs are supplied to the bases of the transistors and - of the double-wave rectifier circuit (9). Then, when the DC level difference of the snow mountain force of the differential amplifier (2) is zero, that is, the double wave rectifier circuit (9
) When the pace bias potentials of the transistors and - are equal, the double-wave rectifier circuit (9) repeats the operation of correctly full-wave rectifying the output from the differential amplifier (2), so that the output terminal aυ A desired AM detection output can be obtained.

On the other hand, if a level difference occurs between the DC components of the two outputs of the differential amplifier (2) for some reason, such a state will cause a low frequency Falii.
i) H and fat- are detected by the amplifier σa, and the amount of charge corresponding to the error signal valve is charged to the capacitor 64 so that the DC level difference between the two outputs of the differential amplifier (2) becomes zero. The bias voltage of the differential amplifier (2) is controlled.

For example, when the DC level of the output of transistor 9 becomes higher than the DC level of the output of transistor (2), the voltage across the capacitor of the low-frequency Fa amplifier συ increases according to the level difference, and the transistor σ of the amplification gsσ increases. The base potential of the barrel increases and the current flowing through the transistor increases to 50
Increases from AA. Along with this, the current flowing through (to) the transistor also increases at the same time.

At this time, the transistor and the current are constant current (50μA) t'
Since it acts to maintain the current, the increased amount will flow into the capacitor (for example, if it increases from 5oAA to 60V, the 59 connection will flow to the transistor (c) and the hook, but the remaining 10JIA will flow to the capacitor). t U4
K flows in. As a result, the voltage across the capacitor tCI4) rises and the base potential of the transistor (2) also increases, so a large current flows through the transistor (2) and its collector potential drops, resulting in; Conversely, the voltage is reduced by the increased amount.

Therefore, the DC levels of the two outputs of the differential amplifier (2) are always maintained in a balanced state, and the two-wave rectifier circuit (9)
Since the base bias voltage of the transistors (to) and - can be set to a low potential, the one-wave rectifier circuit (9) can always perform normal full-wave rectification operation.

As mentioned above (according to this invention, the level difference of the DC component immediately before single-wave rectification is detected and the bias voltage of the differential amplifier is controlled, so that efficient AM detection can be performed with a simple configuration. It becomes. And then.

Unlike conventional circuits, there is no need to provide a DC blocking capacitor, so there is no parasitic capacitance that occurs with this process, and the circuitry required to drive this parasitic capacitance is therefore limited. The configuration can be simplified and the current consumption can be reduced. Also, capacitor g
・Since the parasitic capacitance C$ generated in ■ and σ4 as shown by the broken line in Figure 5 takes the form of a ground capacitor, this parasitic capacitance Cs can be used as an additional capacitance, and therefore the number of capacitors themselves is However, the area occupied within the IC can be substantially reduced. Special k) Tunjista (2)
There is an advantage in that the capacitor connected between the base of the capacitor and ground can be reduced by a few pF of the capacitance.

Further, since there is no need to provide a dedicated Niota follower circuit to balance the bias voltage of the double-wave rectifier circuit (9) as in the conventional circuit, the configuration is simplified accordingly.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an example of a conventional AM detector, Fig. 2 is a connection diagram showing an example of a specific circuit configuration of an irises 2m,
Figure 113 is for explaining the operation of Figure 1142! 1 and 4WA are block diagrams showing one embodiment of the present invention, and FIG. 5 is a connection diagram showing an example of the specific circuit configuration of FIG. 4. (2) is a differential amplifier, (9) is a double wave rectifier circuit, fOff
l) is a low-frequency r wave generator, (c) is an amplifier, (to) is a constant current source 1g◆ is a capacitor.

Claims (1)

[Claims] a differential amplifier to which the input signal is supplied; and two of the differential amplifiers.
A double-wave AM circuit that rectifies the output and 2J of the above differential amplifier.
R pinch means for extracting direct me from the fl force, and error detection means for controlling the bias voltage of the differential amplifier according to the difference between the two outputs of the P pinch means, and the xtb force of the differential amplifier is This is a 4I type detector that makes the DC level difference zero.