JPS58139535A - Frequency synthesizer of radio equipment - Google Patents

Frequency synthesizer of radio equipment

Info

Publication number
JPS58139535A
JPS58139535A JP2234582A JP2234582A JPS58139535A JP S58139535 A JPS58139535 A JP S58139535A JP 2234582 A JP2234582 A JP 2234582A JP 2234582 A JP2234582 A JP 2234582A JP S58139535 A JPS58139535 A JP S58139535A
Authority
JP
Japan
Prior art keywords
frequency
variable
oscillating
input terminal
oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2234582A
Other languages
Japanese (ja)
Inventor
Shogo Iizuka
飯塚 捷吾
Eiji Omori
英二 大森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2234582A priority Critical patent/JPS58139535A/en
Publication of JPS58139535A publication Critical patent/JPS58139535A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/02Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
    • H03J5/0245Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
    • H03J5/0272Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Transceivers (AREA)

Abstract

PURPOSE:To decrease the variable frequency range of a VCO compared with a desired band width, by presetting the oscillating frequency at a level near the desired oscillating frequency for transmission and reception. CONSTITUTION:The oscillating frequency of an oscillator 1 is divided by a fixed frequency divider 2 to produce a reference frequency. This reference frequency and the oscillating frequency of a VCO3 are divided by a variable frequency divider 4 based on the frequency that is decided in response to a channel selecting signal supplied to a controller 5 from a control input terminal 8. Thus a comparing frequency is produced. Then a comparison is carried out through a phase comparator 6, and the control voltage proportional to the difference of comparison is obtained. This voltage is fed back to the VCO3 via an input terminal 18 to form a PLL loop. In addition to a variable capacity diode 16 which forms a part of the PLL loop which varies the frequency, an inductance varying means consisting of PIN diodes 21 and 22 is provided to control the inductance of an oscillating coil 24 in response to the polarity of a transmission/reception changeover control signal that is applied to a terminal 25.

Description

【発明の詳細な説明】 本発明は2波シンプレックス方式の無線機に使用する無
線機の周波数シンセサイザーに関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency synthesizer for a two-wave simplex radio.

一般に、一台の周波数シンセサイザーの発振周波数を送
受で切換えて共用する2波シンプレックス通信において
、多チャンネルを確保するには前記周波数シンセサイザ
ーを構成するPLL回路のVCO(電圧制御型可変周波
数発振器)の可変制御範囲が広いことが要求される。し
かし他方、前記可変制御範囲が広ければVCOの変調感
度が大きくなり、まだPLL回路のループ利得を充分大
きく取れないので、動作が不安定になり或いはS/Nが
劣化する欠点があった。
In general, in two-wave simplex communication in which the oscillation frequency of one frequency synthesizer is switched and shared between transmitting and receiving, in order to secure multiple channels, the VCO (voltage-controlled variable frequency oscillator) of the PLL circuit that constitutes the frequency synthesizer is variable. A wide control range is required. On the other hand, however, if the variable control range is wide, the modulation sensitivity of the VCO becomes large, and the loop gain of the PLL circuit cannot yet be made sufficiently large, so that there is a drawback that the operation becomes unstable or the S/N ratio deteriorates.

本発明は」=記入点を除去した無線機の周波数シンセサ
イザーを提供しようとするものであって、以下にその実
施例と共に説明する。
The present invention aims to provide a frequency synthesizer for radio equipment in which the entry point is eliminated, and will be described below along with embodiments thereof.

第1図は本発明の一実施例による周波数シンセサイザー
の概略構成を示すもので、1は基準周波数を発生する発
振器、2は分周比が固定された固定分周器、3はVCO
14は分周比が可変可能な可変分周器、6は可変分周器
の分周比を制御する制御器、6は位相比較器、7は発振
出力が生じる端子、8はチャンネル選択用の制御信号が
加わる入力端子、18は位相比較信号の入力される入力
端子、26は送受1換信翼の加わる入力端子(後述)で
ある。
FIG. 1 shows a schematic configuration of a frequency synthesizer according to an embodiment of the present invention, in which 1 is an oscillator that generates a reference frequency, 2 is a fixed frequency divider with a fixed frequency division ratio, and 3 is a VCO.
14 is a variable frequency divider whose frequency division ratio can be varied, 6 is a controller that controls the frequency division ratio of the variable frequency divider, 6 is a phase comparator, 7 is a terminal where an oscillation output is generated, and 8 is a channel selection terminal. An input terminal to which a control signal is applied, 18 is an input terminal to which a phase comparison signal is input, and 26 is an input terminal to which a transmitter/receiver 1 converter blade is applied (described later).

上記構成で、発振器1の発振周波数を固定分周器2によ
り分周して基準周波数を発生させ、こ7t]。
With the above configuration, the oscillation frequency of the oscillator 1 is divided by the fixed frequency divider 2 to generate a reference frequency.

とVCO3の発振周波数を制御入力端子8から!fil
l仰器6へのチャンネル選択信号に対応し7て電子1、
る分周数で可変分周器4により分周L2て1上軸周波数
を発生させて、位相比較器6で比iiQ l−1比較し
2だ差に比例する制御電圧を得てVCO3に人JJ端子
18を介して帰還することに」:つてPLLループを形
成している。
and the oscillation frequency of VCO3 from control input terminal 8! fil
In response to the channel selection signal to the controller 6, the electronic 1,
The variable frequency divider 4 divides the frequency L2 to generate an upper axis frequency of 1, and the phase comparator 6 compares the ratio iiQl-1 to obtain a control voltage proportional to the difference of 2, which is applied to the VCO 3. The signal is fed back through the JJ terminal 18, forming a PLL loop.

第2図は、前記周波数/ンセザイザーのyc。FIG. 2 shows the yc of the frequency/sensizer.

3の具体構成例を示す回路図であって、11は発振トラ
ンジスタ、12はこのトランジスタ11のコレクタに接
続した高周波チョークコイル、13ハトランジスタ11
のエミッタ抵抗、14.16は同調用のコンデンサ、1
6は可変容喰ダイオード、17は高周波チョーク、19
は結合用のコンデンサ、20は発振コイル、21.22
は発振コイル2oの中間点及び終端点をそわぞt1アー
スするためのPINダイオードである。23は高周波チ
ョークコイル、24は電流制御用の抵抗、26は通話ス
イッチ(図示せず)からの送受に対応した」−又は−の
送受切替信号の入力端子で、この通話スイッチは無線機
のプレストークボクンにより制御される。26,2了は
発振トランジスタ11のベース電圧と設定するだめの分
圧抵抗、2日はトランジスタ11のベースのバイパスコ
ンデンザ、29は電源VBの電源端子である。
3 is a circuit diagram showing a specific configuration example of No. 3, in which 11 is an oscillation transistor, 12 is a high frequency choke coil connected to the collector of this transistor 11, and 13 is a transistor 11.
emitter resistance, 14.16 is the tuning capacitor, 1
6 is a variable capacity diode, 17 is a high frequency choke, 19
is a coupling capacitor, 20 is an oscillation coil, 21.22
is a PIN diode for grounding the intermediate point and terminal point of the oscillation coil 2o to ground t1. 23 is a high frequency choke coil, 24 is a resistor for current control, and 26 is an input terminal for a transmission/reception switching signal corresponding to transmission/reception from a call switch (not shown). Controlled by Talk Bokun. 26, 2 is a voltage dividing resistor for setting the base voltage of the oscillation transistor 11, 2 is a bypass capacitor for the base of the transistor 11, and 29 is a power supply terminal of the power supply VB.

次に一ト記構成のVCOの動作を説明する。電源VBが
電源端子29に加わると、トランジスタ11を含む発振
回路は、タンク回路を構成するコンデンサ14,16,
19.発振コイル20.可変容量ダイオード16の値に
よって発振周波数が定まるようになっている。従って可
変容量ダイオード16に端子18および高周波チョーク
17を介して前記位相比較器6からの制御電圧を印加し
て発振周波数を使用チャンネルに対応して可変にできる
。!、た同時に送受1J換信号を入力端子26がら抵抗
24.高周波チョーク23を介して、PINダイオード
21或いは22に印加すれば、前記送受切換信号の極性
に対応して、PINダイオード21.22のいずれか一
方をONにし7て、発振コイル20のアースとの間のイ
ンダクタンスを等測的に変化させることができる。
Next, the operation of the VCO having the one-to-one configuration will be explained. When the power supply VB is applied to the power supply terminal 29, the oscillation circuit including the transistor 11 is activated by the capacitors 14, 16, and
19. Oscillation coil 20. The oscillation frequency is determined by the value of the variable capacitance diode 16. Therefore, by applying the control voltage from the phase comparator 6 to the variable capacitance diode 16 via the terminal 18 and the high frequency choke 17, the oscillation frequency can be varied in accordance with the channel used. ! , and at the same time transmit/receive the 1J exchange signal through the input terminal 26 and the resistor 24. If the voltage is applied to the PIN diode 21 or 22 via the high frequency choke 23, either one of the PIN diodes 21 and 22 will be turned on depending on the polarity of the transmission/reception switching signal, and the oscillation coil 20 will be connected to the ground. The inductance between can be varied isometrically.

即ち上記構成によれば、周波数を可変にするためのPL
Lループの一部を構成する可変容量ダイオードとは別に
、PINダイオード21.22によるインダクタンス可
変手段が設けられているため、あらかじめ送受による所
要発振周波数の近傍に発振周波数をプリセットして、チ
ャンネル変更による可変周波数範囲を比較的狭く設定で
きるので、従来のVCOの可変範囲が広すぎることに起
因する欠点を除去できる。
That is, according to the above configuration, the PL for making the frequency variable
In addition to the variable capacitance diode that forms part of the L loop, inductance variable means using PIN diodes 21 and 22 is provided, so the oscillation frequency can be preset near the required oscillation frequency for transmission and reception, and the oscillation frequency can be preset in the vicinity of the required oscillation frequency for transmission and reception. Since the variable frequency range can be set relatively narrowly, the drawbacks caused by the too wide variable range of conventional VCOs can be eliminated.

第3図は本発明の他の実施例の構成を示す要部回路図で
あって、第2図でコンデンサ19の右側の回路構成を一
部変更したものである。31 、32はコンデンサ、3
3.36は高周波チョーク、34.37は抵抗、36.
38は送受切換信号の入力端子、他の部品は第1図、第
2図と同一である。
FIG. 3 is a main circuit diagram showing the configuration of another embodiment of the present invention, in which the circuit configuration on the right side of the capacitor 19 in FIG. 2 is partially changed. 31 and 32 are capacitors, 3
3.36 is a high frequency choke, 34.37 is a resistor, 36.
Reference numeral 38 is an input terminal for a transmission/reception switching signal, and other parts are the same as those in FIGS. 1 and 2.

送受切換信号を入力端子35.38に入力し、これらを
抵抗34.37及びチョーク33 、36を介してそれ
ぞれPINダイオード21.22に選択的に印加するこ
とによって、PINダイオード21.22のいずれか一
方をONにして、発振コイル20の等価インダクタンス
を切換える。他の動作は前記実施例の場合と同様である
。上記構成では、送受の切換に対応して、入力端子36
゜38のどちら側に十電圧を加えるかによって発振周波
数を切換えることができる。
By inputting a transmission/reception switching signal to the input terminal 35.38 and selectively applying these to the PIN diode 21.22 via the resistor 34.37 and the chokes 33 and 36, either of the PIN diodes 21.22 By turning on one side, the equivalent inductance of the oscillation coil 20 is switched. Other operations are similar to those in the previous embodiment. In the above configuration, the input terminal 36
The oscillation frequency can be changed depending on which side of 0.38° the voltage is applied.

第4図は、本発明の別の実施例の構成を示す要部回路図
で、44は発振コイル、41.42はコンデンサ、43
は可変容量ダイオードであって、他は第1図、第2図の
構成と同様である。本実施例においては、入力端子2i
に印加される送受切換信号の極性に対応して、直流電圧
を可変容量ダイオード43に印加して、その容量を変化
させることによって、前記発振コイル19のインダクタ
ンスを可変させるものと同様の効果を得ることができる
FIG. 4 is a main circuit diagram showing the configuration of another embodiment of the present invention, in which 44 is an oscillation coil, 41 and 42 are capacitors, and 43
is a variable capacitance diode, and the other structures are the same as those shown in FIGS. 1 and 2. In this embodiment, the input terminal 2i
By applying a DC voltage to the variable capacitance diode 43 and changing its capacitance in accordance with the polarity of the transmission/reception switching signal applied to the oscillator coil 19, an effect similar to that of changing the inductance of the oscillation coil 19 can be obtained. be able to.

以−1−説明したように、本発明はVCOの無線機の周
波数シンセサイザーの発振周波数をチ\、ンネル番号に
対応して変化さぜるためのP L L 、・+−ブの一
部を構成する可変容1汁ダイオードによる第1の周波数
可変手段と、i+Th話スイッチの送受1、ツノ換に対
応して発振周波数を変化させてプリセット−するPLL
ループが含まねない第2の周波数可変手段を備えている
ので、前記VCOの可変周波数範囲を所要帯域[1]に
比較して狭く選べ、従ってPLL回路のループ利得を大
きく維持できると共に、発振周波数を安定に保ち、また
S/Nを良好に改善できるなどの利点が得られ、特にチ
ャンネル変化による周波数可変範囲に比較して、送受周
波数の間隔が大きい場合の周波数シンセサイザーとして
有効である。
As explained below, the present invention uses a part of the PLL, . A first frequency variable means consisting of a variable capacitance diode, a PLL that changes and presets the oscillation frequency in response to the transmission/reception 1 of the i+Th talk switch, and the horn exchange.
Since the second frequency variable means that does not include a loop is provided, the variable frequency range of the VCO can be selected to be narrower than the required band [1], and therefore the loop gain of the PLL circuit can be maintained large and the oscillation frequency can be adjusted. It has advantages such as keeping the frequency stable and improving S/N well, and is particularly effective as a frequency synthesizer when the interval between transmitting and receiving frequencies is large compared to the frequency variable range due to channel changes.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による周波数シンセサイザー
のブ「コック図、第2図は同要部の700部の回路図、
第3図は他の実施例のVCO部の殻の要部回路図である
1、 1・・・−・発振H(,2・・・・・・固定分周器、3
・・・・・VGO14・・・・可変分周器、6・・・・
・位相比較器、16・・−・町変容(jl、ダイオ−ド
、2o・・・・・発振コイル、21.22・・・・PI
Nダイオード、18・・・・・・位相比較信号の入力端
子、26・・・・・送受切換信号の入力端子。
FIG. 1 is a block diagram of a frequency synthesizer according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of 700 parts of the same main part.
FIG. 3 is a circuit diagram of the main parts of the shell of the VCO section of another embodiment.
...VGO14...Variable frequency divider, 6...
・Phase comparator, 16... Town transformation (jl, diode, 2o... Oscillation coil, 21.22... PI
N diode, 18... Input terminal for phase comparison signal, 26... Input terminal for transmission/reception switching signal.

Claims (1)

【特許請求の範囲】[Claims] 基準周波数源と、電圧制御型の発振器と、前記発振器の
発振周波数を無線機のチャンネル周波数に対応させて分
周する可変分周器と、前記分周した周波数と前記基準周
波数との差に応じた電圧を発生する位相比較器と、前記
位相比較器の出力により制御される第1の周波数可変手
段と、前記無線機の送受信いずれか一方の選択動作に連
動して前記発振器の発振周波数をあらかじめ定めた送受
信の周波数間隔分だけ変化させる第2の周波数可変手段
とを設けてなる無線機の周波数シンセサイザー。
a reference frequency source, a voltage-controlled oscillator, a variable frequency divider that divides the oscillation frequency of the oscillator in accordance with the channel frequency of the radio, and a variable frequency divider that divides the oscillation frequency of the oscillator in accordance with the channel frequency of the wireless device; a phase comparator that generates a voltage, a first frequency variable means controlled by the output of the phase comparator; A frequency synthesizer for a radio device, comprising a second frequency variable means for changing the frequency by a predetermined transmission/reception frequency interval.
JP2234582A 1982-02-15 1982-02-15 Frequency synthesizer of radio equipment Pending JPS58139535A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2234582A JPS58139535A (en) 1982-02-15 1982-02-15 Frequency synthesizer of radio equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2234582A JPS58139535A (en) 1982-02-15 1982-02-15 Frequency synthesizer of radio equipment

Publications (1)

Publication Number Publication Date
JPS58139535A true JPS58139535A (en) 1983-08-18

Family

ID=12080082

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2234582A Pending JPS58139535A (en) 1982-02-15 1982-02-15 Frequency synthesizer of radio equipment

Country Status (1)

Country Link
JP (1) JPS58139535A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60158353U (en) * 1984-03-30 1985-10-22 日立電子株式会社 oscillator

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5380109A (en) * 1976-12-25 1978-07-15 Saibanetsuto Kougiyou Kk Tuner for frequency and phase synchronization transmitter*receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5380109A (en) * 1976-12-25 1978-07-15 Saibanetsuto Kougiyou Kk Tuner for frequency and phase synchronization transmitter*receiver

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60158353U (en) * 1984-03-30 1985-10-22 日立電子株式会社 oscillator
JPH033008Y2 (en) * 1984-03-30 1991-01-25

Similar Documents

Publication Publication Date Title
US5424689A (en) Filtering device for use in a phase locked loop controller
US4353038A (en) Wideband, synthesizer switched element voltage controlled oscillator
US6081168A (en) Voltage controlled oscillator for upconverter/downconverter in digital radio communication system
JPS63242030A (en) Broad band frequency synthesizer receiver
KR100290670B1 (en) Fast lock-up circuit of frequency synthesizer using pll
JPS61251313A (en) Electronic tuning type fm receiver
US20020090917A1 (en) Frequency synthesizer and method of generating frequency-divided signal
KR910007706B1 (en) Transmitter having pll circuit
JPS58139535A (en) Frequency synthesizer of radio equipment
US4952888A (en) Phase locked loop for direct modulation
US7205849B2 (en) Phase locked loop including an integrator-free loop filter
US5621362A (en) Cascode oscillator having optimum phase noise and bandwidth performance
US6954626B2 (en) High frequency receiving device
JPS6345088Y2 (en)
JPH0623056Y2 (en) Voltage controlled oscillator
KR100313329B1 (en) Voltage control oscillator for phase lock loop module
JPH0354426Y2 (en)
JP3088182B2 (en) Radio selective call receiver
JPH0611645Y2 (en) High frequency tuning circuit
JPS6230337Y2 (en)
KR860000270B1 (en) Pll circuit
JPH03160801A (en) Voltage controlled oscillator
KR100281111B1 (en) Singal generator
JPH10107545A (en) Voltage controlled oscillator
JP2000022532A (en) Frequency synthesizer