JPS58138058A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS58138058A JPS58138058A JP1991982A JP1991982A JPS58138058A JP S58138058 A JPS58138058 A JP S58138058A JP 1991982 A JP1991982 A JP 1991982A JP 1991982 A JP1991982 A JP 1991982A JP S58138058 A JPS58138058 A JP S58138058A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- terminals
- jig
- measuring jig
- sections
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置、*にフラット型半導体装置に関す
るものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, particularly a flat type semiconductor device.
一般に本体から同一水平面に突出し喪複数個の端子をも
つフラット型の半導体装置の電気的特性。Electrical characteristics of flat semiconductor devices that generally have multiple terminals protruding from the main body on the same horizontal plane.
特に高周波特性を検査する場合、適当な測定用治AK1
1検査半導体装置を装着して、鋏半導体装置の複数個の
端子のねもと部分を絶縁物ででき丸棒状の押え治具で押
えて前記複数個の端子を測定用治具に電気的に接触させ
て、その高周波特性を測定する。そのため、被検査半導
体装置の各端子と測定用治具との接触状態で、検査しよ
うとする高周波特性の測定値に大きな差があられれてく
るのは周知の通りである。In particular, when inspecting high frequency characteristics, use an appropriate measurement tool AK1.
1. Mount the semiconductor device to be inspected, press the base portions of the plurality of terminals of the scissors semiconductor device with a round bar-shaped holding jig made of an insulating material, and electrically attach the plurality of terminals to the measurement jig. and measure its high frequency characteristics. Therefore, as is well known, there are large differences in the measured values of the high frequency characteristics to be tested depending on the contact state between each terminal of the semiconductor device to be tested and the measurement jig.
本発明はこの様な特性測定上の欠点を改善すべく。The present invention aims to improve such drawbacks in measuring characteristics.
半導体装置の複数個の端子のねもと部分に、端子が測定
用治具と接触する面の方向に突出した複数個の小さな凸
部を有した半導体装置を提供するものである。The present invention provides a semiconductor device having a plurality of small protrusions on the base portions of a plurality of terminals of the semiconductor device that protrude in the direction of the surface where the terminals come into contact with a measuring jig.
端子のねもと部分に前述の様な複数個の凸部を有してお
れば半導体装置を測定用治具に装置して。If the base of the terminal has a plurality of protrusions as described above, the semiconductor device can be mounted on a measuring jig.
押え治具で半導体装置の端子を押えた状態で、端子と測
定治具との電気的接触が確実にとれ1%性の正確な測定
値を合現性よく得ることができる様になる。While holding down the terminal of the semiconductor device with the holding jig, electrical contact between the terminal and the measuring jig can be ensured, and accurate measurement values of 1% accuracy can be obtained with high consistency.
本発明の効果を図面を参照して説明する。The effects of the present invention will be explained with reference to the drawings.
第1図は従来のフラットm中導体装置の外形図の1例で
本体1と該本体から同一水平面に放射状に突出した複数
個の端子2から成っている。FIG. 1 is an example of an external view of a conventional flat conductor device, which consists of a main body 1 and a plurality of terminals 2 radially projecting from the main body in the same horizontal plane.
第2図は従来のフラット型半導体装置を測定用治具に装
着した時の状態図である。半導体装置を測定用治具3に
装着し前記半導体装置の端子2を絶縁物ででき丸棒状の
押え治具4で押えて端子2と測定用治具3とを電気的に
接触させて特性を測定するわけであるが、半導体装置の
端子も測定用治具も共にフラットな面をもっているため
に両者の電気的接触がとりづら<、eK高周波特性を測
定する場合、端子と一定用治具との接触位置が一定にな
りづらいために正確な値が再現性よく得られないという
欠点がある。又、:aIA子と測定用治具との電気的接
触を確実にとるKa押え治具4を強く押しつける必要が
ある九めに押え治具の押え機構がはやくまもうしてしま
うという欠点もある。FIG. 2 is a state diagram when a conventional flat type semiconductor device is mounted on a measuring jig. A semiconductor device is mounted on a measuring jig 3, and the terminals 2 of the semiconductor device are held down with a round bar-shaped holding jig 4 made of an insulating material to bring the terminals 2 and the measuring jig 3 into electrical contact to measure the characteristics. However, since both the terminals of the semiconductor device and the measuring jig have flat surfaces, it is difficult to make electrical contact between them. The disadvantage is that accurate values cannot be obtained with good reproducibility because it is difficult to keep the contact position constant. In addition, there is also the disadvantage that the holding mechanism of the holding jig quickly wears out when it is necessary to forcefully press the Ka holding jig 4 to ensure electrical contact between the aIA element and the measuring jig. .
第3図は前述の様な欠点を解決する1本発明による半導
体装置の外形図の1例で端子2のねもと部分に端子が測
定用治具と接触する面の方向に突出し九複数個の小さな
凸部zlt有していることな特徴とする。FIG. 3 is an example of an external view of a semiconductor device according to the present invention that solves the above-mentioned drawbacks. The base of the terminal 2 has nine projecting portions in the direction of the surface where the terminal contacts the measuring jig. It is characterized by having a small convex portion zlt.
第4図は本発明による半導体装置を測定用治具3に装着
した時の状態図である。この場合Kii端子2のねもと
部分に複数個の凸部2′を有しているため、押え治具4
で端子2を押えた時、前記複数個の凸部2′の部分で確
実な電気的接触がとれるために、前述の従来の半導体装
置の場合の様な問題は全くなくなり、測定したい特性の
値を正確に、再現性よく得ることができる様になる。勿
論この凸部Fi測定用以外の実用時に奄有効に使われる
ものである。FIG. 4 is a state diagram when the semiconductor device according to the present invention is mounted on the measuring jig 3. In this case, since the bottom part of the Kii terminal 2 has a plurality of protrusions 2', the presser jig 4
When the terminal 2 is pressed down, reliable electrical contact can be made at the plurality of convex portions 2', so the problems that occur in the conventional semiconductor device mentioned above are completely eliminated, and the value of the characteristic to be measured is can be obtained accurately and with good reproducibility. Of course, it can be effectively used for purposes other than measuring the convex portion Fi.
第1図は従来のフラット型半導体装置の外形図の1例、
第2図は従来のフラット型半導体装置を#1定用治具に
装着した時の状態図
第3図は本発明によるフラットm牛導体装置の外形図の
1例、第4図は本発明によるフラット型半導体装置t−
測定用治具に装着した時の状態図を示す。
第1図、第3図において
!・・・・・・半導体装置の本体、2・・・・・・半導
体装置の1子。
第2図、第4図において
1・・・・・・半導体装置の本体、2・・・・・・半導
体装置の端子、3・・・・・・測定用治具、4・・・・
・・押え治具、第3図、第4図においてFigure 1 is an example of the outline drawing of a conventional flat type semiconductor device.
Fig. 2 is a state diagram of a conventional flat type semiconductor device mounted on a #1 regular jig; Fig. 3 is an example of an external view of a flat conductor device according to the present invention; Fig. 4 is an example of an external view of a flat conductor device according to the invention. flat semiconductor device t-
A state diagram when attached to a measurement jig is shown. In Figures 1 and 3! ... Main body of the semiconductor device, 2... One child of the semiconductor device. In FIGS. 2 and 4, 1... Main body of the semiconductor device, 2... Terminals of the semiconductor device, 3... Measurement jig, 4...
...In the presser jig, Figures 3 and 4
Claims (1)
ラット型の半導体装置において、前記複数個の端子に、
半導体装置か実用される時に端子が実用装置に接する面
の方向に突出した複数個の小さな凸部を有しているとと
t−e微とする半導体装置。In a flat semiconductor device having a plurality of terminals protruding from the main body in the same horizontal plane, the plurality of terminals include:
A semiconductor device having a plurality of small convex portions that protrude in the direction of the surface where the terminal contacts the practical device when the semiconductor device is put into practical use.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1991982A JPS58138058A (en) | 1982-02-10 | 1982-02-10 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1991982A JPS58138058A (en) | 1982-02-10 | 1982-02-10 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58138058A true JPS58138058A (en) | 1983-08-16 |
Family
ID=12012623
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1991982A Pending JPS58138058A (en) | 1982-02-10 | 1982-02-10 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58138058A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5971253A (en) * | 1995-07-31 | 1999-10-26 | Tessera, Inc. | Microelectronic component mounting with deformable shell terminals |
US6972495B2 (en) | 1996-12-12 | 2005-12-06 | Tessera, Inc. | Compliant package with conductive elastomeric posts |
-
1982
- 1982-02-10 JP JP1991982A patent/JPS58138058A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5971253A (en) * | 1995-07-31 | 1999-10-26 | Tessera, Inc. | Microelectronic component mounting with deformable shell terminals |
US6204455B1 (en) | 1995-07-31 | 2001-03-20 | Tessera, Inc. | Microelectronic component mounting with deformable shell terminals |
US6972495B2 (en) | 1996-12-12 | 2005-12-06 | Tessera, Inc. | Compliant package with conductive elastomeric posts |
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