JPS58128873A - Driving device for thermal head - Google Patents

Abstract

PURPOSE:To provide the titled device free from irregularity in recorded density, by controlling the energy impressed on each heating element in a thermal head in accordance with recording period even when the period varies. CONSTITUTION:Each time transmission of data for one line of a shift register 3 is completed, a data transmission completion signal pulse 2a is inputted into an output terminl 5, and a flip-flop 11 is set so that its Q-output (b) is raised to a high level. Then, the terminal voltage of an integrating capacitor (c) is gradually raised, and when an integral output reaches a reference voltage Eref, an output of a comparator 64 is raised to a high level, and a one-shot multivibrator 65 generates a delay latch pulse (d). The delay time of the pulse (d) from a pulse (a) depends on the immediately preceding recording period. When the voltage Eref is set at a voltage corresponding to the optimum recording temperature for each heating element and a time constant for integration of an integrating circuit 63 is set to be equal to the time constant for thermal response of each heating element, generation of irregularity in the recorded density can be prevented even when the recording period is changed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thermal head driving device having a plurality of heating elements, and particularly relates to a thermal head driving device that can perform constant recording even if the sickle pattern in the recording period changes. This invention relates to a head drive device.

In the conventional heat-sensitive type 11M device, when focusing on individual heating elements, if the recording period is different for each heating element, differences in the recording frequency occur, causing uneven shading in the recording, resulting in poor image quality. There are some drawbacks that degrade quality.

In other words, as the recording cycle becomes shorter, the heat generated during the previous recording is stored in the heat generating elements and substrates, and their temperature increases, even though the same energy of recording power is supplied. The recording #I1 degree gradually increases.

Therefore, for example, when recording black-black and when recording white-black, the number 2- in the case of gu-gu is better than the 211th black in the case of white-gu. There is a drawback that the recording AT is noisy.

In order to eliminate defects such as key activation, the energy applied for a black record after a white is made larger than the energy applied for a black record after a black, even when the same problem occurs. b.

In this way, the recording method that adjusts the energy for black recording depending on whether the immediately preceding bit is black or white is a method in which the data is sent intermittently and intermittently. It is valid if recorded.

However, if the recording cycle is irregular, it is obvious that the recorded image will have shading when recording is performed at a cycle different from the reference cycle.

This is a@ with reference to the jll diagram. jll- is a diagram showing an example of the temperature change of the heating element when black is continuously recorded.

In the figure, the horizontal axis shows the time opening, the vertical axis shows the temperature of the heating element, and t6+t is the recording time for supplying recording energy to the thermal head. Also, T1. T...
T is a recording period, TI is a reference period, T is a shorter period, and Ta is a longer period.

According to the above-mentioned method, in the first recording period, standard energy is supplied during the time interval t0, but in the recording periods after the first recording period, the standard energy is supplied for the time 1+(
However, 11<1. ) is supplied to the threshold.

Therefore, in the recording period after the first scan, the increase in temperature of the thermal head by 2 degrees is reduced. As a result, the heat storage effect in the immediately preceding recording period is compensated for, and the
As during the recording period, the recording temperature is kept at an optimal value.

However, if the k2 recording period is shorter than the standard one (the recording period of iv e g v tr @ in Figure 1), the residual heat or heat storage effect left by the previous recording is large. , the recorded temperature will exceed the optimum value. Since then, the recording density has exceeded the standard value.

9. On the other hand, if the starting cycle is longer than the standard T, then the recording period of jlVl, 1111g in Cjlll) will have less residual heat left by the previous recording. Therefore, the le-power level is not suitable for the optimum value.

This rounding results in the record fIk'lL not reaching the standard value.

As #L@ mentioned above, in the method of correcting and controlling the energy applied to the edge of the heating element in the first period I1, depending on whether or not the m-heating element was energized in the immediately preceding recording period, the recording cycle There is a drawback that the recording may become uneven due to fluctuations.

The present invention corrects the above-mentioned nine drawbacks and controls the amount of reduction in the energy applied to the heating element 4 of the thermal head, that is, the amount of reduction in recording energy, in accordance with the recording cycle even when the recording cycle is undefined. An object of the present invention is to provide a thermal head driving device that does not cause uneven recording.

To avoid rounding that defeats the purpose of Additional energy is applied to the heating elements to which recording energy was not applied in order to perform overwriting.

The present invention will be explained in detail below with reference to the drawings.

No. 2111 is a block diagram of an embodiment of the present invention.

In the figure, 1 is a thermal head consisting of a large number of heating elements; 2 is a data batzer driver for applying energy corresponding to reproduced image data to the heating elements;
3t [I is a shift register that supplies one image data to the data buffer driver 2.

4 input terminals for print pulses that determine the activation timing and activation time of each heating element; 5 is an input terminal for the data transfer completion pulse; 6 is the input terminal for the data transfer completion pulse; variable jl! The delay circuit 7 is an OR circuit which receives the data transfer completion pulse and the output of the data transfer completion pulse 11160 and drives the data buffer driver 2 with its output.

In addition, 8 is a main line buffer that stores the artist data of the main line (the twin that is about to be recorded this time), and sFi.
The previous line buffer 1G, which stores part of the twin data recorded immediately before, is a Nant gate that controls the passage of iIi data of the previous line buffer 9.

11 is a pulse aSS<
For example, 13 is an AND circuit that performs logical operation on each data at the corresponding bit position of this twin and 1 line, 13 is the address of previous line buffer 9 & and this twin buffer 8 The address terminal 14 for specifying the address is a pck input terminal.

311 is a detailed block diagram showing an example of the configuration of the WJ variable sound 1 circuit 6 of 1 & 2 WjA. In the same figure, the same reference numerals as in FIG. 1 is a flip-flop that is set by the data transfer completion pulse supplied to terminal 5; 62 is a drive amplifier that receives the Q output of the flip-flop 61; and 63 is an integration circuit that integrates the output of the drive amplifier 62. It is.

Further, 64 is a comparator that compares the output of the integrating circuit 63 (terminal voltage of the integrating capacitor C) with the reference voltage f, and 65 is a one-shot multivibrator triggered by the output of the comparator 64. .

Note that Eli is a bias power supply for the integrating circuit 63, and can be used to correct the influence of ambient temperature, as will be described later.

Next, referring to the time chart in Figure 1E4, the operation of the town transition line Igl path 6 in Figure 3 is 1! I will clarify. Each of the waveforms indicated by symbols (&) to (d) in the diagram Ji4 corresponds to the signal waveform of the portion with the same symbol described in the diagram 1s3.
;1247 minutes of data is in shift register 3 (Rin 2 diagram)
A data transfer completion pulse a is input to the input terminal 5 every time the data transfer is completed. As a result, the flip-flop 61 is set, so that its Q output becomes high level.

The Q output is sent to an integrating circuit 6 via a doped amplifier 62.
3, the integral output, that is, the terminal voltage of the integral capacitor C gradually rises as shown in FIG. 4 (, ).

When the integrated output reaches the reference voltage gr@fK, the output of the ratio converter 64 becomes zero level, and the multivibrator as generates a pulse d such as j14aO(d). This nokurusu d is 7 lip 70
It is input to the reset terminal of Tsug 61 to reset it, and at the same time, Jl! is input to the OR circuit 7! Input as a latch pulse.

Therefore, as can be seen from 11411, the data transfer completion time (transition time from pulse a!) of the soft latch pulse d depends on the immediately preceding recording cycle TK. The longer the recording period T is, the longer the long time T is, and conversely, the smaller the previous recording period ↑, the smaller the long time T.

Here, the reference voltage &@f is set to a potential that corresponds to the optimum recording temperature of the 6 heating elements of the thermal head, and the integral time constant of the 9th integral @ path 63 is the thermal response of each heating element of the thermal head. is set equal to the time constant of

If this is done, as is clear from the above explanation, the maximum output of the integrating circuit will always be a part of the reference voltage @f, so even if the recording cycle changes, the recording depth by the thermal head will vary. No unevenness will occur.

In addition, if the bias voltage is changed, the above-mentioned prolonged open T
It is clear that this will change. Therefore, if the ζ insulator pressure E8 is controlled according to the ambient temperature, it is possible to compensate for the change in recording density caused by the change #hK in the circumferential WALK.

The above-mentioned control according to the ambient temperature can be easily realized by, for example, a voltage dividing resistor circuit including a thermistor as a part.

1151m is a time chart illustrating the operation of an embodiment of the present invention shown in Fig. 2. The combined waveform L1 shown in Fig. 6111it is a signal in the IIe range in Fig. 2, respectively, and has the same sign. The waveform is raining.

Now, due to the widespread hand RK, this Twin Pack 76 includes:
The image data Drl for one fin of the jl(n-1)th fin is stored, and on the other hand, at this time, the previous twin buffer 9
It is assumed that image data Dn-, that is, one fin of J[n-2) data l immediately before Ku, is stored.

A clock is supplied to the input terminal 14 to operate the address counter 13 and read out signals at the same pixel position in the main 2-in buffer 8 and the 1-2 in buffer 9 at the same time.

At this time, since the previous line data calculation pulse is at the L (low) level, the output of the Nant gate 10 is always at the KM() level, regardless of the image data Dn-.

That is, data 8-8 read from the -line buffer 9 is prevented from passing. Therefore, AND circuit 12
is an open state-tonashi, image data D of book 2 inverter S,
, is transferred to the shift register 3.

As described above, when the data transfer for one fin to the shift register 3 is completed, the data transfer completion pulse an-
1 is supplied to terminal 5. This pulse 'n-1 passes through the OR circuit 7 and becomes the latch signal g, which latches the image data Dn- in the shift register 3 into the data buffer driver 2.

At this time, the terminal 4 is supplied with a print pulse fknee of a constant duration.

- The thermal head l is energized based on the data D, 1, and the corresponding line is energized.

The data transfer completion pulse 'n-1 is also applied to the town change extension circuit 6 and the pulse generator 1, as is clear from Series 21A.
1.

Data transfer completion pulse 1n supplied to Machihen delay circuit 6
-1 is delayed by a time determined according to the immediately preceding recording cycle - that is, in this case, Tn, -, as described above with reference to Figures 3 and 4, and becomes a twitch pulse d, . 1. On the other hand, the pulse generator 11 generates a pre-read/data calculation pulse of a constant duration in response to the data transfer completion pulse level -1.

- At almost the same time as the rise of the above-mentioned twin data calculation pulse, the address counter 13 is activated, and on the same aircraft as mentioned above,
Signals at the same pixel position in the main line buffer 8 and the previous line buffer 9 are read out simultaneously.

In this case, since the input/data calculation signal is at the H (no) level, the NAND game F10 outputs the inverted data 6 of the previous line data 2. , is input to the AND circuit 12.Therefore, the output of the AND1gl circuit 12 is the AND of the inverted data D, , of the previous line and the data D,1 of the main line, D!1-1 ・Dfl-, becomes.

The truth table is shown in 1ml. As is clear from the illumination, the logical product output of the AND circuit 12 is 111 only at the pixel position where the data of the previous line is white and the data of the main line is black.
(high level), and at other pixel positions %Ql(
low level). The logical product output, @D,,
is supplied to the shift register 3 and stored.

When the delayed latch pulse d,1 is applied to the data buffer driver 2 via the OR circuit 7, the data Dn-1 and Dn- stored in the shift register 3 at this time are transferred to the data buffer driver 2. Transferred and latched.

Therefore, if the print pulse f supplied to the input terminal 4 continues, thermal recording, ie overwriting, based on the data Dn-1 and Dn- is carried out.

However, in the example shown in Figure 115, 1ili! A latch pulse dn-1 is generated, and the data D of the shift register is
, 1.Dn-, is transferred to and latched by the data buffer 2, the print pulse f has already disappeared, so no writing (overwriting) is performed based on the +11th data.

That is, in this case, the immediately preceding recording period T is sufficiently long, so it is not necessary to compensate for the influence of heat accumulation. Therefore, standard energy is supplied to the self-heating element that records the stupid bit.

When the period of the print pulse f ends, the contents of the main line buffer 18 and the previous line buffer 9 are updated, and the image data D is stored in each of the ☆ buffers.

D, is stored. Continuing, using the same method as mentioned above, (1) 1 of the 8 Twin Bats! Transfer to shift register 3 (2) Transfer to image data by data transfer completion pulse an to data buffer driver 2, latch (3) Record by print pulse f (4) Transfer to main twin image data to previous line image data D,
, Dn-1 (5) Converting the result of the operation to data D, Transfer to the shift register 3 of 1 (6) Transferring the data Dn by II extended chip pulse dn
Transfer from the shift register 3 of Dn-1 to the data buffer driver 2, latching, etc. are performed one after another.

In the timing relationship of FIG. 5, when the delayed latch pulse dn is generated and the data conversion T5n-1 is transferred to the data buffer driver 2 and latched, the print pulse f is still sustained. Therefore, during the my time S, the data conversion/thermal recording by Dn-1 is performed.

That is, in this case, as the recording waste 11Tn= is shorter than the reference value, the thermal recording time for the image data of the present twin is shortened (or cut).

Then, during the time corresponding to the shortened (or cut) thermal recording time S, recording energy is supplied only to the four M elements (corresponding to the pixel positions where the previous line is white and the main line is black). , overwriting is performed.

Next day! Regarding Dn+1, in the example of the ai;s diagram, one half of the recording is done by the main line's image data Dn+1 itself, and the second half is recorded by the main line's image data Dn+1jP and the Koji twin image data. Overwriting with the record is being performed.

Comparing image data conversion and Dn + 10th period sickle time, in the 1st example, the immediately preceding recording period T for both is that of the latter). You can see that the dark battle is longer.

According to an experiment by Akira Motoya et al., 216 entries, 8 dots/-
For a 1-gold 1728-dot thermal head, the shift register transfer rate is 2 MHl, the minimum recording period is 5 ms, and the maximum applied power per dot is o, g.
w, and the recording period is the minimum (5 ms), i.e.
The actual recording time of 1 when the amount of heat storage is maximum is 1. Orm
If the recording cycle is long enough and the amount of heat storage is considered to be 0, the actual recording time can be set to 1.3 msec, and a smooth record with no unevenness in shading can be obtained.

As is clear from the above description, according to the present invention, the time from recording the previous line to recording the main line - that is, the shorter the recording cycle is, the shorter the recording cycle is. Since the energy supplied to the KA thermal element during actual in-recording is reduced, the influence of heat accumulation in the thermal head on performance can be reduced.

Furthermore, for the heating elements that did not receive energy supply in the first line, energy corresponding to the reduction amount described in Section II is additionally supplied to perform overlapping recording, so that the black and white dot pattern is This is achieved by eliminating unevenness in recording density due to changes.

According to the present invention, the above-mentioned two factors combine to produce an extremely stable and uniform thermal recording.

In the six embodiments described above, overwriting was performed only at pixel positions where the previous line was white and the main line was black, taking into account only the dot pattern of the previous line. Also consider the dot pattern,
i recorded as white-ink! Not only is the energy applied to the source element at the pixel position ii greater than that applied to the pixel position ascribed to black-black, but also the energy applied to the pixel position recorded as white-white is made larger. It is also possible to perform compensation control to further increase the energy applied to the heating element.

Such control can be implemented using the following method and configuration.

(1) In addition to the 2nd WA's dismissal Tsuchipulse d, M! has a different continuous kite time! Forming a series of kite latch pulses,
Switch the data buffer driver 2 to the 3R floor 〇(2))-Provide a front-front line buffer outside the twin buffer 9, add a NAND gate and an AND gate, and proceed to logical operation・Outside of Dn-, , taking into account the image data of the line before the previous line, perform nine operations, Dn-1 and Dl-2, seven lines,
Transfer the data, 8-1 and 8-Dl-1, D, to the data back 7 ad twister, latch it, and overwrite it in three stages.

In addition to the above-mentioned circuit, as a means for changing the continuous kite time plater of the continuous kite foot pulse according to the immediately preceding recording period Tn-, -1 with a counter, (1) subtract the count value from the set value and use the difference as the continuous kite time, and (2) use a function generator that inputs the count value. etc. are possible.

[Brief explanation of the drawing]

Part twA is a diagram showing an example of temperature change of a round heating element to explain the operation of a conventional thermal head drive V device.
Figure 112 is a block diagram of an embodiment of the present invention, Figures II & 3 are detailed block diagrams of the variable delay circuit in Figure 2, jI
FIG. 4 is a time chart for explaining the operation of the variable delay circuit shown in FIG. 1I43, and FIG. 6 is a time chart for explaining the operation of the embodiment shown in FIG. 1K2. l... Thermal head, 2... Data buffer, 3... Shift register, 6... Variable delay circuit, 18... Book 9, 7, 7, 9... Previous line buffer , 11... Pulse generation 9! , 61...
・Flip-flop, 64... Comparator, 65... Michihito Hiraki, patent attorney for one-shot i-ruchibai
Outside 1 name fang 2t'4 year old 3 figure

Claims (1)

[Claims] (1) A thermal head driving device that supplies energy corresponding to scanned image data to a plurality of heating elements constituting the thermal head for the print pulse ** time to perform recording line by line. A main line buffer that stores the image data of one scanning line to be recorded, a line buffer that stores the image data of the nine scanning lines recorded immediately before, and inverted data of the contents of the previous line buffer. and a means for calculating the logical product of image data of pixel positions in the respective armpits of the contents of the main line buffer, a means for recording the main line based on the image data stored in the main line buffer, and a means for performing recording of the main line based on the image data stored in the main line buffer. Means for shortening the time of the main line recording based on the nine data stored in a buffer in accordance with the recording cycle from the immediately preceding one line recording to the main line recording, the shorter the recording cycle; 9. A thermal head driving device comprising: means for repeatedly performing recording of the front main line based on the output of the logical product calculation means for a certain period of time.