JPS58128010A - Data separation circuit - Google Patents
Data separation circuitInfo
- Publication number
- JPS58128010A JPS58128010A JP1000982A JP1000982A JPS58128010A JP S58128010 A JPS58128010 A JP S58128010A JP 1000982 A JP1000982 A JP 1000982A JP 1000982 A JP1000982 A JP 1000982A JP S58128010 A JPS58128010 A JP S58128010A
- Authority
- JP
- Japan
- Prior art keywords
- data
- pcm
- pcm data
- reference potential
- separation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10527—Audio or video recording; Data buffering arrangements
Abstract
Description
【発明の詳細な説明】
本発明はビデオ信号からPCMデータを分離するデータ
分離回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data separation circuit that separates PCM data from a video signal.
この種データ分離回路として第1図に示すものかある。An example of this type of data separation circuit is the one shown in FIG.
即ちデータ入力端子1に人力されたデータ(PCM信号
によりて形成されたビデオ信号)t−増幅器2.ホワイ
トビーク除去回路4を介してレベル比較器2の一方の人
力として印mTると共に前記データをダイオード引、コ
ンデンサ32からなる整流回路3に印加し、該回路にて
エンベロープ検波を行い、その出力を抵抗41.42に
て分割し該分割信号を前記レベル比較器の他方の入力と
して印加つまりレベル比較器2の基準電位(第2図のC
)として、前記 人力のレベルをレベル比較器2にて比
較してPCMデータを分離してなるものである。尚3は
ホワイトビーク検出回路であるoしかしデータ分離レベ
ルは使用Tるテープの種類や記録状態によって異なり、
例えば人力データに歪が生じその波形が第2図(5)か
ら第2図(B)に示T如く変わった場合レベル比較器の
基準電位Cが第2図0に示すデータの最適分離レベルp
と一致せず、第2図面のN部のデータを正しく分離でき
ない欠点が生じる。That is, data inputted to the data input terminal 1 (a video signal formed by a PCM signal) is input to the t-amplifier 2. The data is input to one side of the level comparator 2 via the white beak removal circuit 4, and is applied to the rectifier circuit 3 consisting of a diode and a capacitor 32. The circuit performs envelope detection, and the output is The divided signal is divided by resistors 41 and 42 and applied as the other input of the level comparator, that is, the reference potential of level comparator 2 (C in Fig. 2).
), the level of human power is compared by a level comparator 2 and the PCM data is separated. 3 is a white beak detection circuit.However, the data separation level varies depending on the type of tape used and the recording condition.
For example, if distortion occurs in the human input data and its waveform changes as shown in FIG. 2 (5) to T shown in FIG. 2 (B), the reference potential C of the level comparator changes to the optimum separation level p of the data shown in
Therefore, there is a drawback that the data of part N in the second drawing cannot be separated correctly.
本発明の目的は前述した従来技術の欠点を解消し、人力
データ信号の持つデータ分離レベル(スレッシ冒−ルド
レベル)と、テータ分s回路の基準電位レベル(スレッ
シ箇−ルド域圧)を、人力データ信号の歪に関係なく容
易に一致させる事にある。An object of the present invention is to eliminate the drawbacks of the prior art described above, and to manually control the data separation level (threshold threshold level) of the data signal and the reference potential level (threshold range pressure) of the theta circuit. The purpose is to easily match data signals regardless of distortion.
本発明はスレッシ曹−ルド電圧を変えた時ノPCMデー
タ誤り量をカウントし、この両者Q〕量関係らPCMデ
ータ誤り量が最少となるスレッシ璽−ルド電圧を演算に
より求め、このスレッシ冒−ルド電圧をデータ分離回路
の基準電位レベルとしてなるものである0
以下本発明を図面に基づいて説明する0第5図は本発明
の実施例を示すブロック図である。The present invention counts the amount of PCM data errors when changing the threshold voltage, calculates the threshold voltage that minimizes the amount of PCM data errors based on the relationship between the two, and calculates the threshold voltage that minimizes the amount of PCM data errors. The field voltage is used as the reference potential level of the data separation circuit.The present invention will be explained below with reference to the drawings.FIG. 5 is a block diagram showing an embodiment of the present invention.
同図において、7′は入力データ20と後述するデータ
分離基準電位(スレッシロールド電圧)11/を比較し
てPCMデータを分離してなる比較器、8&′L比較器
7′にて分離されたPCMデータを周知態様によりオー
ディオ出力端子15に導<PCMプロセッサを示し、該
プロセッサはPCMデータ誤り量を検出する検出回路8
rt具えているりデータ誤り検出回路81はデータ誤り
が発生した時その誤りの数に応じたパルス信号を発生す
る例えば論理回路で構成されており、これは一般に周知
なので、その詳細説明は省略する。9はデータ練り検出
回路81の出力パルスケカウントTるカウンタ、10は
カウンタ9のカウント出力を検出すると同時にPCMデ
ータ誤り意力i最少となるデータ分離基準電位(スレッ
シ冒−ルド電圧VT)t−演算しその演算結果に対応す
るディジタル信号を出力Tる演算処理手段例えばマイク
ロプロセッサ、11はそのディジタル信号をアナログ信
号即ち比較器7′のスレッシ冒−ルド亀圧vに変換する
ル伍コンバータ、12はプロセッサ1oのディジタル量
を可変するための制御装置を示し、これらはスレッシ冒
−ルド亀圧可変手段14rr:l11成している。ここ
で第4図、第5図に示すようにスレッシwtvy電圧V
iV、からvM まで変えた時のPCMデータ膜り量を
カウント出力、コ’) 両者t Y = A + B
Y + CV ” 02次式で近似しTれば、PCMデ
ータ誤り臘か最少となるスレッシ嘗−ルドIll 圧V
T Cx、B・
V=ニー、cで与えられる。2次式の近似は、最少2乗
法を使えば容易に求められる。In the figure, 7' is a comparator that separates PCM data by comparing input data 20 with a data separation reference potential (threshold voltage) 11/ to be described later, and 8&'L comparator 7' separates the PCM data. The detected PCM data is guided to the audio output terminal 15 in a well-known manner.
The data error detection circuit 81, which is equipped with a data error detection circuit 81, is composed of, for example, a logic circuit that generates a pulse signal according to the number of errors when a data error occurs, and since this is generally well known, a detailed explanation thereof will be omitted. . Reference numeral 9 indicates a counter for counting output pulses T of the data processing detection circuit 81, and reference numeral 10 indicates a data separation reference potential (threshold voltage VT) t-, which at the same time as detecting the count output of the counter 9, minimizes the PCM data error level i. arithmetic processing means, such as a microprocessor, which performs calculations and outputs a digital signal corresponding to the calculation result; 11, a loop converter which converts the digital signal into an analog signal, that is, a threshold voltage V of the comparator 7'; and 12; 1 shows a control device for varying the digital quantity of the processor 1o, which constitutes a threshold voltage pressure varying means 14rr:111. Here, as shown in FIGS. 4 and 5, the threshold wtvy voltage V
Count output the amount of PCM data film when changing from iV to vM, ko') Both t Y = A + B
Y + CV ” 0 If approximated by the quadratic formula, the threshold value that minimizes the PCM data error value is the pressure V.
T Cx, B・V=knee, given by c. Approximation of the quadratic equation can be easily obtained by using the method of least squares.
第6図はマイクロプロセッサ10の70−チャートを示
す図である。FIG. 6 is a diagram showing a 70-chart of the microprocessor 10.
以上述べたように、本発明は人力信号の持りスレッシ習
−ルドレベルを正確に検出し、データ分離しているので
、例え人力信号に歪が生じても常に正しくPCMデータ
を分離できる効果かある0As described above, the present invention accurately detects the threshold level of the human input signal and separates the data, so even if the human input signal is distorted, the PCM data can always be correctly separated. 0
第1図は従来例を示T回路図、第2図はその説明に供T
る人力信号の波形図、第3図は本発明の実施例を示Tブ
ロック図、第4図、第5図はその説明に供する入力信号
の波形図、スレッシ璽−ルド電圧とPCMデータ誤り数
を示す原理図、第6図は本発明のデータ分離回路の70
−チャートである。
20′・・・人力信号端子、 7′・・・比較器、8・
・・PCMプロセッサ、81・・・PCM誤り検出回路
、15−0.出力端子、 9・・・カウンタ、1
1 ・・・D/Aコンバータ、10・・・マイクロプロ
セッサ、化1人弁理士 薄 1)町鼻1
才 1 図
″7 2 図
tA> (E5)
才 3 図Figure 1 is a circuit diagram showing a conventional example, and Figure 2 is an explanation thereof.
A waveform diagram of a human input signal, FIG. 3 is a block diagram showing an embodiment of the present invention, and FIGS. 4 and 5 are waveform diagrams of input signals, threshold voltage and number of PCM data errors for explanation. 6 is a principle diagram showing the data separation circuit 70 of the present invention.
-It is a chart. 20'...Human signal terminal, 7'...Comparator, 8.
...PCM processor, 81...PCM error detection circuit, 15-0. Output terminal, 9...Counter, 1
1...D/A converter, 10...Microprocessor, 1 patent attorney Susuki 1) Machibana 1 year old 1 Figure 7 2 Figure tA> (E5) 3 Figure
Claims (1)
レッシ冒−ルド電圧可変手段とPCMデータ誤り量のカ
ウント手段を持ち、スレッシ璽−ルド亀圧を変えた時の
PCMデータ誤り量から、PCMデータ誤り量が最少と
なるスレッシ冒−ルド電圧を演算処理手段により求め、
この電圧と入力信号を比較Tる事によりPCMデータを
正しく分@Tるデータ分離回路。The circuit that separates PCM data from manual items has a threshold voltage variable means and a means for counting the amount of PCM data errors. The threshold voltage that minimizes the amount of data error is determined by arithmetic processing means,
A data separation circuit that correctly separates PCM data by comparing this voltage with the input signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1000982A JPS58128010A (en) | 1982-01-27 | 1982-01-27 | Data separation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1000982A JPS58128010A (en) | 1982-01-27 | 1982-01-27 | Data separation circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58128010A true JPS58128010A (en) | 1983-07-30 |
Family
ID=11738399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1000982A Pending JPS58128010A (en) | 1982-01-27 | 1982-01-27 | Data separation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58128010A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61255563A (en) * | 1985-05-08 | 1986-11-13 | Matsushita Electric Ind Co Ltd | Data discriminating device |
JPS6446202A (en) * | 1987-08-13 | 1989-02-20 | Omron Tateisi Electronics Co | Magnetic card reader |
-
1982
- 1982-01-27 JP JP1000982A patent/JPS58128010A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61255563A (en) * | 1985-05-08 | 1986-11-13 | Matsushita Electric Ind Co Ltd | Data discriminating device |
JPS6446202A (en) * | 1987-08-13 | 1989-02-20 | Omron Tateisi Electronics Co | Magnetic card reader |
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