JPS58125472U - Jitter suppression device for teletext receivers - Google Patents
Jitter suppression device for teletext receiversInfo
- Publication number
- JPS58125472U JPS58125472U JP11952182U JP11952182U JPS58125472U JP S58125472 U JPS58125472 U JP S58125472U JP 11952182 U JP11952182 U JP 11952182U JP 11952182 U JP11952182 U JP 11952182U JP S58125472 U JPS58125472 U JP S58125472U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- suppression device
- jitter suppression
- multiplying
- clock pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Television Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は文字放送受信機を原理的に表わすブロック図を
示し、第2図は同上におけるクロック発生回路のブロッ
ク図を示し、第3図は本考案の文 ゛字数送受信機
のジッター抑制装置の一実施例の要部であるクロック発
生回路のブロック図を示し、第4図は同上一実施例の動
作を説明する説明図を示している。
3 :20H/4QH検出回路、4.STX検出回路、
5:クロック発生回路、6:色搬送波再生回路、11:
入力ゲート、12:番組一致回路、13:走査線一致回
路、14:バッファメモリ、15:クロックゲート、1
6:書き換ゲート、17:主メモリ、18:クロックゲ
ート、51:8逓倍回路、5□:分周回路、53ニオア
ゲ一ト回路。
1 / ゛
第3図Fig. 1 shows a block diagram showing the principle of a teletext receiver, Fig. 2 shows a block diagram of a clock generation circuit in the above, and Fig. 3 shows a jitter suppression device for a character transceiver according to the present invention. A block diagram of a clock generation circuit which is a main part of one embodiment is shown, and FIG. 4 is an explanatory diagram for explaining the operation of the same embodiment. 3: 20H/4QH detection circuit, 4. STX detection circuit,
5: Clock generation circuit, 6: Color carrier regeneration circuit, 11:
Input gate, 12: Program matching circuit, 13: Scanning line matching circuit, 14: Buffer memory, 15: Clock gate, 1
6: Rewrite gate, 17: Main memory, 18: Clock gate, 51: 8 multiplier circuit, 5□: Frequency divider circuit, 53 NIO gate circuit. 1/゛Figure 3
Claims (1)
文字、図形等の情報をクロックパルスに−応じて再生し
テレビ画面上に映出する文字放送受信機において、テレ
ビジョン映像信号中のバースト信号を基にして再生され
る色副搬送波信号を所定倍(分数も含む)してクロック
パルスを生成スる逓倍・分周手段と、テレビジョン映像
信号中にあって少なくてもテレビ画面上に情報を映出す
る表示期間に対応する水平同期信号に応答するIJ4゜
ット信号と文字信号中に含まれるSTX信号との双方の
信号に基いて前記クロックパルスの位相を制御するクロ
ックパルス位相制御手段とを具備してなる文字放送受信
機のジッター抑制装置。A burst signal in a television video signal is used in a teletext receiver that reproduces information such as characters and graphics inserted in the vertical retrace period of a television video signal in response to clock pulses and displays it on the television screen. Multiplying/dividing means generates clock pulses by multiplying the reproduced color subcarrier signal by a predetermined number (including fractions) based on Clock pulse phase control means for controlling the phase of the clock pulse based on both the IJ4° signal responsive to the horizontal synchronizing signal corresponding to the display period for displaying the image and the STX signal included in the character signal. A jitter suppression device for a teletext receiver, comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11952182U JPS58125472U (en) | 1982-08-05 | 1982-08-05 | Jitter suppression device for teletext receivers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11952182U JPS58125472U (en) | 1982-08-05 | 1982-08-05 | Jitter suppression device for teletext receivers |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58125472U true JPS58125472U (en) | 1983-08-26 |
Family
ID=30101284
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11952182U Pending JPS58125472U (en) | 1982-08-05 | 1982-08-05 | Jitter suppression device for teletext receivers |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58125472U (en) |
-
1982
- 1982-08-05 JP JP11952182U patent/JPS58125472U/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4599611A (en) | Interactive computer-based information display system | |
US4498098A (en) | Apparatus for combining a video signal with graphics and text from a computer | |
EP0103982B2 (en) | Display control device | |
US5301026A (en) | Picture editing apparatus in a digital still video camera system | |
US5534940A (en) | Apparatus and method for driving a liquid crystal display utilizing various television system formats | |
JP2650186B2 (en) | Still image video signal processing device | |
KR890005217B1 (en) | Character signal generator | |
JPS58125472U (en) | Jitter suppression device for teletext receivers | |
JPH06180571A (en) | Image processor | |
JPH01143580A (en) | Teletext receiver | |
KR950008791Y1 (en) | Vertical retrace line period setting circuit of printer | |
JPS60158375U (en) | television receiver | |
JPS6018077A (en) | Processing circuit of field signal | |
SU1312560A1 (en) | Device for providing information output on srceen of cathode-ray tube | |
JPH0334791Y2 (en) | ||
JPS6222317B2 (en) | ||
JPS58132476U (en) | cathode ray tube display device | |
JPS60158374U (en) | television receiver | |
JPS5976167U (en) | CRT display position adjustment device | |
JPS63287276A (en) | Picture storage device | |
JPH051479B2 (en) | ||
JPS59228478A (en) | Printer device of television receiver | |
JPS60142570U (en) | television receiver | |
JPS61255386A (en) | Display unit | |
JPS6025277U (en) | Remote control operation display device |