JPS58124802U - Control device - Google Patents
Control deviceInfo
- Publication number
- JPS58124802U JPS58124802U JP2156782U JP2156782U JPS58124802U JP S58124802 U JPS58124802 U JP S58124802U JP 2156782 U JP2156782 U JP 2156782U JP 2156782 U JP2156782 U JP 2156782U JP S58124802 U JPS58124802 U JP S58124802U
- Authority
- JP
- Japan
- Prior art keywords
- control device
- microprocessor
- speed
- mpt
- mpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control By Computers (AREA)
- Control Of Position Or Direction (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来技術による機械の位置制御方式を示すブロ
ック図、第2図は本考案による機械の位置制御方式を示
すブロック図、第3図は本考案での出力インタフェース
部詳細回路図、第4図は従来方式でのフローチャートを
示す。
1:マイクロプロセッサ、2ニブログラムメモリー、3
:パルスカウンタ回路、4:比較器、5:設定値メモリ
ー、6:′出力信号インターフェース、7:工作機の移
動用モータ、8:パルスジェネレータ、9:工作機、1
0:Dタイプフリップフロップ、11:トラ、イスチー
・トバツファ、12:インバータ、13:アンドゲート
。Fig. 1 is a block diagram showing a machine position control method according to the prior art, Fig. 2 is a block diagram showing a machine position control method according to the present invention, Fig. 3 is a detailed circuit diagram of the output interface section in the present invention, FIG. 4 shows a flowchart in the conventional method. 1: Microprocessor, 2 Niprogram memory, 3
: Pulse counter circuit, 4: Comparator, 5: Setting value memory, 6: Output signal interface, 7: Machine tool movement motor, 8: Pulse generator, 9: Machine tool, 1
0: D type flip-flop, 11: Tora, Isti Tobatsfa, 12: Inverter, 13: AND gate.
Claims (1)
に応じた制御信号を出力する制御装置において、その演
算処理を、マイクロプロセッサ−(以下MPT、Jと略
)で行なう制御装置であり、且つ、その処理速度を向上
させる為に、MPUが行なう演算の一部を付加回路によ
って補足することを特徴とする制御装置。In a control device that inputs high-speed pulses, counts them, and outputs a control signal according to the counted value, the arithmetic processing is performed by a microprocessor (MPT, abbreviated as J hereinafter). Further, in order to improve the processing speed, a control device is characterized in that a part of the calculations performed by the MPU is supplemented by an additional circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2156782U JPS58124802U (en) | 1982-02-19 | 1982-02-19 | Control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2156782U JPS58124802U (en) | 1982-02-19 | 1982-02-19 | Control device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58124802U true JPS58124802U (en) | 1983-08-25 |
Family
ID=30033684
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2156782U Pending JPS58124802U (en) | 1982-02-19 | 1982-02-19 | Control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58124802U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60176117A (en) * | 1984-02-23 | 1985-09-10 | Fuji Kikai Seizo Kk | Controller of servo motor |
JPS6444509A (en) * | 1987-08-12 | 1989-02-16 | Fanuc Ltd | High speed input/output module and plc device |
-
1982
- 1982-02-19 JP JP2156782U patent/JPS58124802U/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60176117A (en) * | 1984-02-23 | 1985-09-10 | Fuji Kikai Seizo Kk | Controller of servo motor |
JPS6444509A (en) * | 1987-08-12 | 1989-02-16 | Fanuc Ltd | High speed input/output module and plc device |
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