JPS58117753A - Reception system for excessive telegraphic message - Google Patents

Abstract

PURPOSE:To prevent inadequate monopoly of a buffer, by discriminating whether or not a received telegraphic message exceeds a preset length, and stopping the write of the messgage of the reception buffer when it exceeds. CONSTITUTION:When the length of the received telegraphic message reaches a length set to a register REG during the reception of message, an output of a comparison circuit CMP changes from logical 0 to logical 1, an AND gate AG is set off, the telegraphic message from a line L is blocked and not given to the buffer. Further, the message is inputted to a synchronizing signal detection circuit FD and a check circuit CHK successively and monitored at the circuits. When a synchronizing signal SF2 is detected and it is discriminated that the message is received correctly or in error at the check circuit, the information is transmitted to a control circuit CONT. When the telegraphic message is finished, a counter CNT stops the count operation and transmits the counter output for the time, in other words, the information of the length of the received telegraphic message to the CONT. Since the output (logical 1) of the comparison circuit is given to the CONT, it is given to a CPU as excessive telegraphic message information.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a system for receiving an excessively large number of messages, and more specifically, a system for receiving an excessively large number of messages, and more specifically, a method for a line control device controlled by a processing device (2) to receive a message and transfer it to another (= two configurations). system (
Regarding reception method C2 of excessive message in 2.

In this type of system (2), a line control device that is compatible with a line receives a message coming from the line, and temporarily stores it in a buffer from the control C2 of the processing device.

Conventionally, in order to make it possible to receive messages of various lengths in succession (2), the reception buffer was set taking into account the most common message length, and several reception buffers were chained together. When the received message becomes long and one side of the receive buffer becomes full, a new receive buffer is chained.When receiving a long message, a large amount of buffer space is required to accommodate the long message E. While the received message is being processed, the buffer area is held and C: is exclusively used for processing the received message.

This type of message has the structure shown in FIG. 2, for example.

Figure 2 (In 2, M indicates a message; the message M consists of message information and check information CH for the message information; Synchronization signals SFI, SF! are added.

When receiving a telegram, first detect the synchronization signal SF,
The information following this is determined to be message M, and then a synchronization signal SF! When it is detected, it is determined that the message M is completed. Therefore, if you perform message reception processing using this conventional method, problems such as abnormalities in the communication partner (sending side) system, errors on the transmission path, etc.
From the second point, if the synchronization signal SF, which informs the completion of the message y, is not correctly received, the completion of the message cannot be determined, resulting in an excessive message. As a result, a large amount of buffer area is unduly occupied due to the reception of a single message in which an error has occurred.

In order to prevent unnecessary charges caused by the above-mentioned excessive message reception, conventionally, a processing device monitors the length of the received message, and when it is determined that the message is excessive, processes such as stopping writing to the buffer are performed. was. This conventional '' method has the drawbacks of a heavy processing load on the processing device and the drawback that it cannot be checked whether the message whose reception has been interrupted is the correct message.

The present invention eliminates the above-mentioned drawbacks of the conventional system, and the line control device (2) determines whether the received message has reached the maximum receivable message length of 62, and sends the message exceeding this to the reception buffer C2. This prevents the reception buffer from being unjustly monopolized by the reception C2 of an excessive message, and also identifies whether or not a message determined to be an excessive message is a correct message, thereby reducing the load on the processing device. The purpose is to

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing an outline of connections in an embodiment of the present invention.

In Figure 2, L is the line, CCU is the line control unit, CP
U is a processing unit, and MM is a storage device.

The line LC transmits messages in the format shown in FIG. 2, which was explained earlier.

CNT is a counter,
(IHK is a check circuit, and C0NT is a control circuit.

The counter CNT, the comparison circuit CMP, and the register REG constitute means for recognizing the length of the received message.

The counter CNT detects the length of the received message, counts the number of bytes of the message, and is reset under normal conditions, and its counting output is 0. Register REG stores the maximum receivable message length (corresponding value, number of bytes of message). Comparison circuit CMP stores counter CNT and register REG.
The contents of counter CNT are compared with register R.
If IG content C does not occur twice, @0# is output, and when it is reached, "1" is output. This output is given by ANDG (AG), and is conductive when it is '0' and non-conductive when it is '1'.

When receiving a message, the processing unit CPU uses the memory device [MM
42 Table for managing received messages, so-called C
CV (Chann@A Command Word)
, set.

CCW (Second is the command code, received message number, start address for storing the received message in the buffer, last address for storing the received message, end information, etc.), and after the received message is stored in the buffer, the contents of this ccw (Managed by 2.

When the line control unit CCU starts receiving the message, the message input from the line is sent to the synchronization signal detection circuit FDC, and when the synchronization signal SF1 is detected here, it is determined to be the start of the message, and the message is output ( B) is sent. This is the control circuit C0
It is sent to the processing unit CPU via NT to notify the start of the message M, and also starts the counter CNT.

The message signal input from the line is sent to ANDGATE AG.
The message passes through the processing device CPU and is stored in the storage device MM (=set buffer ζ2).The starting address for storing the received message in the buffer is specified by the corresponding address set in the CCW.

When the message M is completed, the synchronization signal srs is input, and when the synchronization signal detection circuit FD detects this, it is the same as above (two outputs (
B) is sent. This output (B) 12 transmits the end of the telegram to the control circuit C0NT 12, and this output (B) 2 stops the operation of the counter CNT.

Here, the two-sync signal detection circuit is used as a means to detect the start and end of a message.

The length of this ad hoc message is the length set in the register REG and is not repeated twice, so the output of the comparator circuit CMP does not become @1#, and the AC receives it without becoming non-conductive. All messages are stored in a buffer area in the storage device MM via the processing device CPU.

When the synchronization signal detection circuit FD determines the end of the message as described above, it sends end information to the check circuit CHK.

Upon receiving the above termination information, the check circuit CHK checks whether or not the message has been received correctly, and sends the result to the control circuit C0NT.

Checking whether or not the message has been correctly received can be carried out, for example, as follows (2). In other words, the check circuit CHK receives the above message end information (2 units) from the sending side from the buffer in the check circuit CHK. The check circuit CHK extracts the sent check information CH (Fig. 2).On the other hand, the check circuit CHK calculates the check information from the received message using a certain calculation method determined by check method 12, and when the message ends, sends the above message. It is compared with the check information sent from the side, and if they match, it is determined to be correct, and if they do not match, it is determined that it was received in error.

In the above case, the control circuit C0NT is activated based on the information from the check circuit CHK and the synchronization detection circuit FD when the message is received correctly or incorrectly.
The information is sent to the processing unit CPU (= CCW
i2 memorized. In the above case, the length of the message does not exceed the length set in the register REGl2, so the output of the comparison circuit CMP continues to be 10'', but this output information
0'' is also received by the control circuits Co and NT, and is sent to the processing unit CPU as information that the telegram does not exceed the set length, and is stored in the same <CCW.

Suppose that the received message is too large and exceeds the set length of register REG.

While receiving a message, if the length of the received message is twice the length set in register RIGC2, the output of the comparison circuit CMP will be @
0'' to @1'', so the AND gate AG becomes non-conductive, and the telegram from the line is blocked here, and the buffer (2) is no longer sent. Stop storing the part that exceeds the set length.

However, this received message continues to be sent to the synchronization signal detection circuit F.
D and check circuit CHK i are both powered and monitored here. When the synchronization signal 8F is detected and the check circuit CHK 42 determines that the message has been received correctly or incorrectly, the same information as above is transmitted to the control circuit C0NT (second speed. When the counting operation is finished, the counter CNT stops the counting operation, and the counting output at that time, in other words, the information on the length of the received message is sent to the control circuit C0N.
Send T42. Further, since the output @1'' of the comparison circuit CMP is sent to the control circuit C0NT, this is sent to the ζ2 processing unit CPU as described later as information indicating an excessive message.

The control circuit C0NT receives the above various information and determines whether the message was received correctly or incorrectly and the reception was completed (
information from the synchronization detection port jl conflict FD and check circuit CHK), ``The length of the message exceeds the set value (from the output of the comparison circuit CMP), and the length of the received message counter CN.
(from the output of T) is sent to the processing unit CPU. The processing unit CPU writes the necessary information CCW (=.

If the synchronization signal SF added to the end of the message M disappears for some reason, the synchronization signal 8F! It is possible to check the completion based on the synchronization signal detection circuit FD (= timing (2), and in this case also, the completion information is sent to the processing unit CPU via the control circuit C0NT.
Write to cw.

The processing device CPU processes the received message according to the contents of Ccw. When a message that does not reach the set length is correctly received, it is processed as normal (= For example, for a message C2 that exceeds the set length but is correctly received, the processing unit CPU processes the received message. A length longer than the length of is set in the register REG via the control circuit C0NT,
Sending side (= can request retransmission.

The present invention is not limited to the above-described embodiment C, and various modifications can be made within the technical scope thereof. For example, it is also possible to provide a buffer in the line control device.

The present invention has two configurations as described above, so that the line control device determines whether or not the length of the received message exceeds a preset length, and if the length exceeds the length, stops writing the message to the reception buffer. (2. The above-mentioned excessive message (2) also identifies whether it is a correct message or not, and takes measures against the above-mentioned excessive message without imposing too much load on the processing unit C2. There is a potential effect.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an outline of connections according to an embodiment of the present invention, and FIG. 2 is a diagram showing an example of the structure of a general message. L...Line, CCU...Line control device, CPU...
・Processing device, MM...Storage device, CNT...Counter, CMP...Comparison circuit, AG...AND gate, FD...Synchronization signal detection circuit, CHI...Check circuit, C0NT・...Control circuit, 8F1. Sr1...
Synchronous signal, D...Telegram information of message M, CH...Check information of message information, M...Telegram patent applicant Fujitsu Limited agent Patent attorney Gobe Tamamushi (3 others)

Claims (1)

[Claims] In a system configured such that a line control device controlled by a processing device receives a message and transfers it to another, the line control device has a means for recognizing the length of the received message and a means for recognizing the start and end of the message. and means for detecting the length of the received message, when the means for recognizing the length of the received message recognizes the length of the received message as an excessive message, transmits a signal to prevent the received message from being transferred to the buffer, and also detects completion of the excessive message. A method for receiving an excessive message, characterized in that, when the reception is completed, the processing device is notified of the completion of the reception as an excessive message reception.