JPS58116881A - Image pickup device - Google Patents

Image pickup device

Info

Publication number
JPS58116881A
JPS58116881A JP56215343A JP21534381A JPS58116881A JP S58116881 A JPS58116881 A JP S58116881A JP 56215343 A JP56215343 A JP 56215343A JP 21534381 A JP21534381 A JP 21534381A JP S58116881 A JPS58116881 A JP S58116881A
Authority
JP
Japan
Prior art keywords
circuit
output
mode
image pickup
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56215343A
Other languages
Japanese (ja)
Other versions
JPH0230634B2 (en
Inventor
Tsutomu Takayama
勉 高山
Akihiko Tojo
明彦 東條
Toshio Kaji
敏雄 鍛冶
Nobuyoshi Tanaka
田中 信義
Takao Kinoshita
貴雄 木下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP56215343A priority Critical patent/JPS58116881A/en
Priority to US06/452,500 priority patent/US4599657A/en
Publication of JPS58116881A publication Critical patent/JPS58116881A/en
Priority to US06/860,513 priority patent/US4763204A/en
Priority to US07/274,703 priority patent/US4910606A/en
Priority to US07/459,564 priority patent/US5010418A/en
Publication of JPH0230634B2 publication Critical patent/JPH0230634B2/ja
Priority to US07/654,802 priority patent/US5309247A/en
Priority to US08/073,648 priority patent/US5760830A/en
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7088Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/0035User-machine interface; Control console
    • H04N1/00405Output means
    • H04N1/00408Display of information to the user, e.g. menus
    • H04N1/0044Display of information to the user, e.g. menus for image preview or review, e.g. to help the user position a sheet
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/21Intermediate information storage
    • H04N1/2104Intermediate information storage for one or a few pictures
    • H04N1/2112Intermediate information storage for one or a few pictures using still video cameras
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/21Intermediate information storage
    • H04N1/2104Intermediate information storage for one or a few pictures
    • H04N1/2112Intermediate information storage for one or a few pictures using still video cameras
    • H04N1/212Motion video recording combined with still video recording
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/765Interface circuits between an apparatus for recording and another apparatus
    • H04N5/77Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera
    • H04N5/772Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera the recording apparatus and the television camera being placed in the same enclosure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N2101/00Still video cameras

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To allow one-shot image pickup operation by providing a shutter for inhibiting light incidence to an image pickup element during a charge transfer period in still mode, and then suppressing the generation of a smear and stopping sampling in accompanied with a switching to still mode. CONSTITUTION:An image pickup device is provided with an aperture means AP for measuring object luminance and an optical system provided with a shutter means SHT, storage time setting circuit SE1, storage time indication setting circuit SE2, aperture value setting circuit SE3, etc. Outputs of those respective circuits SE1-SE3 and the output of a light metering means are processed by an arithmetic circuit OP and on the basis of the arithmetic result, an ammeter AM for the means AP and a magnet Mg for the SHT are controlled to control the quantity of light mode incident to the device. Further, successive and still mode switches SW1 and SW2 are provided to switch scans of the image pickup means, and to switch exposure parameters to be inputted to the circuit OP through gates G4 and G5. Then, an AND circuit stops the holding of a sample holding circuit SHC.

Description

【発明の詳細な説明】 本!#IQIj#i連絖撮散とワンショットの撮像との
切換が容易に可能な撮像装置に係る。
[Detailed description of the invention] Book! #IQIj#i The present invention relates to an imaging device that can easily switch between continuous shooting and one-shot shooting.

従来ビデオカメラにおいては連続m像のみが可能であ)
、ワンショットだけのIl會は不可能であった。本発明
はこの様な間聰を解決し得るIt,Illな改善された
撮像装置を提供する拳を目的としているO その為に本発明では連続モードからワンショット撮偉又
はスチルモード撮像へ切換える際、スイッチ手段の操作
によ9、それ迄の走査周期と全く別の新たな蓄積及び走
査を行なう為同期信号発生手段を切換える様にしている
In conventional video cameras, only continuous m images are possible)
, it would have been impossible to have a one-shot show. The present invention aims to provide an improved imaging device capable of resolving such problems. To this end, the present invention provides an improved imaging system that is capable of resolving such problems. By operating the switch means 9, the synchronizing signal generating means is switched in order to perform new accumulation and scanning completely different from the previous scanning period.

又、このスチルモードの間だけII出ハラメータード中
に撮像手段からの映像出力を一時記憶する記憶手段な般
け、この記憶を周期的にリセットすると共に、スチルモ
ードκ切換える事によりこのリセットを中止し、かつ、
前配紀惜手段の内容を篭二タ一手段に導びく禄為してい
るので連続モード中にスチルモードが4Ii峙聞入って
もモニタに乱れが生じない。
Also, in general, the storage means temporarily stores the video output from the imaging means during the II output harammeter only during this still mode, and this memory can be reset periodically and this reset can be done by switching to the still mode κ. Canceled, and
Since the content of the previous episode is transferred to the first mode, even if the still mode enters 4Ii during the continuous mode, the monitor will not be disturbed.

又、本発明では、連続モード中煉像手段の出力の一部を
周期的にサンプルホールドする手段を有し、この出力を
被写体#度情報として利用すると共にスチルモードへの
切換えに伴ってこのナンプリ/!を停止する事により連
続モード中の情報をそのまま利用できる様にした点にあ
る。
In addition, the present invention has a means for periodically sampling and holding a part of the output of the image refining means during the continuous mode, and uses this output as subject number information, and also uses this output when switching to the still mode. /! By stopping the continuous mode, the information in continuous mode can be used as is.

又、スチルモードの少なくとも重両転送期間中はms素
子への光入射を禁止する様シャッタを設けているのでス
ミア発生が抑えられる等の%黴を有するものである。
Furthermore, since a shutter is provided to prohibit light from entering the ms element at least during the double transfer period in the still mode, the occurrence of smear can be suppressed.

以下内面に基づき本発明の詳細な説明する。The present invention will be described in detail below based on the inside.

giav社本発刷本発明装置の構成の一例を示すブロッ
ク図、第2−社同ブロック−の要部タイミングを示す図
、第′5卸は第1図示モードセレクタ及び連続モード指
示回層等の論壇因、第4−は撮像素子の構成模式−であ
る。
Published by Giav Co., Ltd. A block diagram showing an example of the configuration of the device of the present invention, a diagram showing the timing of the main parts of the second block, and a fifth block diagram showing the mode selector and continuous mode instruction circuit layer shown in the first diagram The fourth reason for discussion is the schematic configuration of the image sensor.

図中L8は撮像光学系、ムPは紋り、8)IT祉セス回
路、MTxIf1該プロセス回路からの8(赤)、G(
2))、B(f) 出力を色差41(fL−Y)、(B
−Y)及び#夏信号Yに変換するマ)IJクス回路1P
82社記録用信号処理1路、811は記録ヘッドsm’
h=PGd該ヘッドを1トラツクずつシフトする為の夫
々ラツクキア及びビニオンキアである0M2aビニオン
キ7PGを駆動する為の′ルスモー!、aMC社誼パル
スモータM2を後述のシーケクス制御回路8CTLから
の、例えば1直同期信号により同期111+#するシフ
ト制御回路であるOD社例えば磁気ディスタの如き配置
媒体であって該ディスクはモータMIKより回転される
。凰MC#i該モータの回転を制御するディ哀タ毫−タ
ll1lI11回路である。尚マトリクス回路MTxの
出力はスイッチSW4を介してモニター装置に接続可能
である。DRI社前記撮像素子IDの蓄積、転送、読み
出し等の駆動パルスを生成するドライバ回路であlt’
j期信号発信号発生回路8YNC−ケ/ス制御回路8 
C’r Lの出力により同期1it11141される。
In the figure, L8 is the imaging optical system, P is the pattern, 8) IT processing circuit, 8 (red) from the MTxIf1 process circuit, G (
2)), B(f) output with color difference 41(fL-Y), (B
-Y) and #Ma) IJ circuit 1P that converts to summer signal Y
82 company recording signal processing path, 811 is recording head sm'
h = PGd 'Rusmo!' for driving the 0M2a Binion Kia 7PG which are the Rack Kia and Binion Kia for shifting the head one track at a time. , aMC Corporation A shift control circuit that synchronizes the pulse motor M2 with, for example, a 1 series synchronization signal from a sequence control circuit 8CTL, which will be described later. be rotated. This is a circuit for controlling the rotation of the motor MC#i. Note that the output of the matrix circuit MTx can be connected to a monitor device via a switch SW4. DRI is a driver circuit that generates drive pulses for storing, transferring, reading, etc. the image sensor ID.
J-period signal generation circuit 8 YNC-case control circuit 8
Synchronization 1it11141 is performed by the output of C'r L.

chは基準信号発生器である。IGは前記マトリクス回
路MTXの出力からYgN号を抜き出して積分する積分
回路で、hはそのリセット端子である。このリセット端
子Rには1)li]記N期信号妬生器8 YN C4y
)第2−示の如き出力の立下りによシハルスを形成する
777171回路08iの出力端が接続されている。
ch is a reference signal generator. IG is an integrating circuit that extracts and integrates the YgN signal from the output of the matrix circuit MTX, and h is its reset terminal. This reset terminal R has 1) li] N period signal generator 8 YN C4y
) No. 2 - The output end of the 777171 circuit 08i is connected to form a signal due to the fall of the output as shown.

8HCは本発明に係るサンプルホールド回路であって前
記積分回路の出力な所足のタイミングでサンプルし、次
のサンプル時点迄ホールドする。8社そのサンプル信号
入力端で前記同期信号発生器出力の立上9でパルスを形
成するワンショット回[082の出力がアンドゲートA
NDを介して入力されている。
8HC is a sample and hold circuit according to the present invention, which samples the output of the integration circuit at a sufficient timing and holds it until the next sampling point. 8 One-shot times [082 output is AND gate A] which forms a pulse at the rising edge 9 of the synchronization signal generator output at its sample signal input terminal.
It is input via ND.

サンプルホールド回路SHCの出力は演算回路OPK入
力され、予め入力された蓄積時間殻矩回路SE1の出力
又は固建の蓄積時間指示回路8E2、又は絞り値般足回
@sm5の出力と共に演算され、その出力A又はBK第
6(2)に示される如くコントロール入力a〜Cの状態
に応じて選択的に出力される。
The output of the sample hold circuit SHC is input to the calculation circuit OPK, and is calculated together with the output of the accumulation time shell circuit SE1 inputted in advance, the output of the fixed accumulation time indication circuit 8E2, or the output of the aperture value general foot rotation @sm5. Output A or BK is selectively outputted according to the states of control inputs a to C as shown in No. 6 (2).

尚1コントロ一ル入力端鳳〜cKIdゲート回路偏又は
G5を介して夫AモードセレクタM8の出力、連続モー
ド指示回路CDが接続されている。又グー )G4 、
G51ak3..879yプフayプFFf)Q出力に
より制御され、該Q出力がハイレベルの時q4が開き、
G5が閉じる。又9出力がローレベルの時轄この逆とな
る。
Note that the output of the husband A mode selector M8 and the continuous mode instruction circuit CD are connected through the control input terminal 1 and the cKId gate circuit or G5. Matagu) G4,
G51ak3. .. 879y FFf) is controlled by the Q output, and when the Q output is at a high level, q4 opens,
G5 closes. Also, when the 9th output is at a low level, the situation is reversed.

演算回路OPの人出力に轄駆動回路DR2を介して電流
計ムMのコイルが接続されており、人出力のレベルに応
じて電流計AMへの通電量が変化する。又1電流酎の可
動部は前記絞9ムPの絞−量を変化させる様構成されて
いる。
A coil of an ammeter M is connected to the human output of the arithmetic circuit OP via a related drive circuit DR2, and the amount of current applied to the ammeter AM changes depending on the level of the human output. Furthermore, the movable part of the current chuan is configured to change the amount of aperture of the aperture 9P.

演算回@0Pf)B出力端#iIy’DコンバータAD
Cを介してグリセツタプルカラ/りCN丁のプリセット
入力端Pr・に接続されてお夕、骸カクンメのクロック
人力CLには前記基準発振器の出力か入力される。c6
1プリセット値迄クロックをカウントした時1パルスを
発生する出力端、8Fiりセット入力端であり、該リセ
ット端)L/fi前記ツリッグフ闘ツブFFのQ出力に
接続されている。又出力端Cは所足りパルス巾(第2鮪
中Ts )を有する立上!l1il1期のワンショット
回路086會介してシャッター駆動回路りル6に入力さ
れ、このワンショットi路の出力がI・イレベルの藺だ
けシャッタを閉成させる様マグネット陶に通電を行なう
。尚、本発明に係るシャッタは従来の銀塩フィルム用シ
ャッタとは異なり、撮gl素子の受光部から蓄積部への
転送期間中に前記受jtSへの光入射を阻止する為のも
のであり、通常線開成する方向に付勢郷されておシ、前
記!グネットヘ通電されている間だけ撮像素子への光入
射を鐘断する。
Operation time @0Pf)B output terminal #iIy'D converter AD
The output of the reference oscillator is connected to the preset input terminal Pr of the resettable puller/receiver CN via C, and the output of the reference oscillator is input to the clock input terminal CL of the Mukuro Kakume. c6
The output terminal that generates one pulse when the clock is counted up to one preset value is the reset input terminal (8Fi), and the reset terminal (L/FI) is connected to the Q output of the trigger FF. Also, the output terminal C rises with sufficient pulse width (second tuna medium Ts)! It is input to the shutter drive circuit 6 through the one-shot circuit 086 of the 11il1 period, and the output of this one-shot i path energizes the magnet so as to close the shutter only at the I level. Note that the shutter according to the present invention is different from the conventional shutter for silver halide film, and is designed to prevent light from entering the receiving jtS during the transfer period from the light receiving section of the photodetector to the storage section. The town is being encouraged to open the normal line, as mentioned above! Light is cut off from entering the image sensor only while the magnet is energized.

崗、前記777171回路085の出力社文下多同期の
ワンシlット回路を介して前記7リツプフーツプyyo
vセツト端に入力している。G)lは本発明に係る配置
再生ヘッドで、該ヘッド社前記フリツ1フロッグFFの
Q出力がローレベルの間、磁気ディスクDの所定のトラ
ックに対して記録用信号4611回路PS2の映像出力
をスイッチ8W5を介して記録する事ができると共に、
前記フリップフロップのQ出力がハイレベルとなると@
@に切換わる事により記録された映像信号を再生信号処
理回路PS3に導電スイッチ&W4を介してこれをモニ
ター装置MTVKよりモニターし祷る橡構成されている
。尚、スイッチ8W3〜8W5は前記フリップフロップ
FFf)Q出力がハイレベルの時・側、ローレベルの時
d@に切換わる橡構成されている。又1フリツグフロツ
1FFはスチルモード開始スイッチSW2をONする事
によりセットされる様図の如く構成されている。又8W
1は連続モード開始スイッチでONする事により前記モ
ータ制御回路RMCが始動される。
The output of the 777171 circuit 085 is connected to the 7 rip hoop yyo through the multi-synchronized one-shot circuit.
It is input to the v set end. G) 1 is a placement playback head according to the present invention, which outputs the video output of the recording signal 4611 circuit PS2 to a predetermined track of the magnetic disk D while the Q output of the Fritz 1 Frog FF is at a low level. Can be recorded via switch 8W5, and
When the Q output of the flip-flop becomes high level, @
By switching to @, the recorded video signal is sent to the reproduction signal processing circuit PS3 via a conductive switch &W4 and monitored by a monitor device MTVK. The switches 8W3 to 8W5 are configured to switch to the side when the output of the flip-flop FFf)Q is at a high level, and to the d@ side when the output is at a low level. Further, the 1-flip float 1FF is configured as shown in the figure, and is set by turning on the still mode start switch SW2. Also 8W
1 is a continuous mode start switch which, when turned ON, starts the motor control circuit RMC.

尚〜前記アンド回路ムNDの残すの入力端に社前記フリ
ッグフロッグのQ出力が接続されている。
Note that the Q output of the above-mentioned flip-frog is connected to the remaining input terminal of the AND circuit ND.

又、シーケンス制御回路8CTLは本発明のスチルモー
ドにおいて前記同期信号発生回路8YNCの代わりにド
ライバー回路りル1eC駆動制御信号を出力すると共に
連続モードにおいてシフトモータ制御回路により同期的
にヘッドRHをシフトする為の同期信号を供給する。
Further, in the still mode of the present invention, the sequence control circuit 8CTL outputs the driver circuit REL 1eC drive control signal instead of the synchronization signal generation circuit 8YNC, and in the continuous mode, the head RH is synchronously shifted by the shift motor control circuit. Provides a synchronization signal for

次に第1頻示ブロツク図の動作を桑1〜第4図に基づき
説明する。連続モードスイッチ8W1をONすると、モ
ーター制御回路RMCが始動されディスクDの回転が開
始されると共に撮像系等が駆動され、同期信号発生回路
8YNCからは同期信号が例えばm2図示の如く周期T
・で出力される。
Next, the operation of the first frequent block diagram will be explained based on FIGS. 1 to 4. When the continuous mode switch 8W1 is turned on, the motor control circuit RMC is started, the rotation of the disk D is started, and the imaging system etc. are driven, and the synchronization signal generation circuit 8YNC outputs a synchronization signal with a period T as shown in m2, for example.
・Output.

この周期TI社例えばV醜秒に設定する。そしてこの同
期信号社スイッチBW5を介してドライバー回路DR1
に供給され、第21示の様なパルスΦl〜−8が生成さ
れる。即ち、Φlは受光sl内の電荷を蓄積@Bに転送
する転送パルス、Φ3は蓄積s8の電荷な水平レジスタ
ーHRに転送する転送パルス、−・は水平レジスタHB
内の電荷を出力アングムMK耽み出す為の水平クロック
パルスである。
This period is set to TI, for example, V ugly seconds. Then, the driver circuit DR1 is connected via this synchronization signal switch BW5.
The pulses Φl to -8 as shown in FIG. 21 are generated. That is, Φl is a transfer pulse that transfers the charge in the light receiving sl to the storage @B, Φ3 is a transfer pulse that transfers the charge of the storage s8 to the horizontal register HR, and -. is the horizontal register HB.
This is a horizontal clock pulse for discharging the charge in the output Angum MK.

崗、第4図示IIg1本子は水平レジスタHRの近傍に
オーバーフロードレインOFDが設けてあり、水平レジ
スタとの間の障II#iアンチブルーきングバリア構造
となっている為、パルスΦ$による読み出しを行なわず
にΦ1.−1による転送のみを行なうと過剰電荷−水平
レジスタからオーバーフロードレインに吸収される。
In the case of IIg shown in Figure 4, an overflow drain OFD is provided near the horizontal register HR, and it has an anti-broking barrier structure between it and the horizontal register, so reading is performed using pulse Φ$. ZuniΦ1. If only a -1 transfer is performed, excess charge will be absorbed from the horizontal register to the overflow drain.

尚、第21示の如く1時間T4中に52党鄭1に蓄積さ
れた電荷社同期伯号のI・イレベル期間Ts中にパルス
Φ1.Φ2により蓄積s8に転送され、次のローレベル
XQfiaT会中に、パルスΦ3.−易により水平レジ
スタに1行ずつシフトされて読み出されムそして、との
欧み出された信号はプロセス回路P81、マトリックス
回路MTX、スイッチ鎧4のd@を介してモニターi[
MTVK供給されると共に、記録信号処理回路P821
スイッチSW5のd@、ヘッドGHを介して回転ディス
タの所定Fラックに縁り返し記録されるσ尚モーメ側御
崗@6kLmcによ多ディスクの回転周期が前記同期信
号の周期T・と同じか威い社整数倍になる僚同期制御さ
庇ている。又、記録再生ヘッドGHの前方同一トラック
上等には消去ヘッドが設けである。
As shown in Fig. 21, the pulse Φ1. is transferred to storage s8 by Φ2, and during the next low level XQfiaT session, pulse Φ3. - The output signal is shifted to the horizontal register one by one and read out, and the output signal is monitored via the process circuit P81, matrix circuit MTX, and d@ of the switch armor 4.
MTVK is supplied and the recording signal processing circuit P821
d@ of switch SW5, whether the rotation period of the disk is the same as the period T of the synchronization signal σ, which is recorded on the specified F rack of the rotary disc via the head GH, is the same as the period T of the synchronization signal. The company is protected by synchronized control, which is an integral number of times. Further, an erasing head is provided on the same track in front of the recording/reproducing head GH.

又、この連続モード状鯵において例えばマド苧りス回路
MTXtl)Y信号出力は、同期信号の立下多缶にリセ
ットされる積分回路IGによ多周期的に積分され、該積
分出力はこのリセット直前、即ち同期信号の立上〉毎に
ナンプルされ次のサンプリング迄の間ホールドされる。
In addition, in this continuous mode, for example, the output of the MTX circuit MTXtl) Y signal is periodically integrated by the integrating circuit IG, which is reset at the falling edge of the synchronizing signal, and the integrated output is Immediately before, that is, every time the synchronizing signal rises, it is numbered and held until the next sampling.

従ってこのサンプルホールド囲路出力社周期T・分だけ
実時間から遅れてはいるがTTL[光値に相当するもの
である。
Therefore, although the sample-hold circuit output is delayed from real time by a period T minutes, it corresponds to the TTL light value.

この#8元元値上演算回路OFに入力する事によりlN
1111子からの入力情報と演算し、第3鮪に示す橡な
組み合わせ出力を端子A、Bよ多出力する。
By inputting this #8 element value upper calculation circuit OF, lN
It calculates with the input information from the 1111 child and outputs multiple outputs of the clever combination shown in the third tuna to terminals A and B.

又この人、B端からの出力社夫々例えばAPBX方式の
演算により得られるAy 、 Tマに相当する様な信号
である。又s ” * l Fi変数を示す。
Also, the output signals from this person and the B end are signals corresponding to Ay and Tma obtained by, for example, APBX calculation. Also, s''*l indicates the Fi variable.

尚、演算回路OPの各コントロール入力端暑。In addition, each control input end of the arithmetic circuit OP.

b、cfcti夫々、第6図の如き論理入力が連続モー
ド指示四路CD又はモードセレクタM8から入力される
。例えば、連続モードスイッチ&lW1がON、スチー
ルモードスイッチ8W2がOFF。
Logic inputs as shown in FIG. 6 are inputted from the continuous mode indicating four-way CD or the mode selector M8 for each of b and cfcti. For example, continuous mode switch &lW1 is ON and steel mode switch 8W2 is OFF.

即ち連続モードの場合に轄ゲー)G5が闘き、グー)G
4が閉じるので、回路CDの出力値(010)が入力端
a ’−cに供給される。これにより第3図示の如くム
端子から社ムマに対応する信号が出力されて絞りムPを
制御する。又、B端子からの出力は無い。この様に連続
モード時にIIiサンプルホールドされた側光値に基づ
き絞りが制御されると共に、撮像素子の蓄積時間は時間
T4に一足される。
In other words, in the case of continuous mode, control game)G5 fights, goo)G
4 is closed, the output value (010) of the circuit CD is supplied to the input terminals a'-c. As a result, as shown in FIG. 3, a signal corresponding to the diaphragm P is output from the MU terminal to control the diaphragm P. Also, there is no output from the B terminal. In this way, in the continuous mode, the aperture is controlled based on the IIi sample-held side light value, and the accumulation time of the image sensor is added to time T4.

そして前述の如く、映像信号祉モニターされると共に、
所足のフィールドメモリー用のトラックに記録される。
And as mentioned above, along with the video signal being monitored,
Recorded on the track for field memory.

又11フイールド毎に順次トラツタを切換えながらV、
録ヘッドaHKより動画を記録していく。
Also, while sequentially switching the tracker every 11 fields,
Video is recorded from the recording head aHK.

次に予めモードセレクタM8により第S−示の適宜モー
ドを選択すると共に881.813により適宜の蓄積時
間、叔)郷を設足した後スチールモードスイッチ8W2
をONすると、フリップフロッグFFがセットされるの
で演算回路0FF)ラントロール入力車〜cK#iセレ
クタM8からのデータが入力され、これに応じてFFI
)Q出力がハイレベルとなる事によりアノドグ−トムN
Dが閉じられサンプルホールド回路8HCにおけるナン
プリン/a停止し、連続モードにおけるIII党値光値
保持される。又、8W6〜8W5が・IIK切換わるの
で先ずフリップフロフグFFリセットによりシーケンス
側御回路にて生成された信号によりドライバー回路りル
1が駆動パルスΦ1.Φ島を第2−の如く供給する。こ
れにより受光gtt l内の不II!電荷がクリアされ
る。又、カウンタCN’l’が9竜ツトされ、予め選択
されたモード及び設定値に応じた蓄積時間Tl’が経過
するとC端子からパルスが出力され、これがシーケンス
制御回路8CTLに入力されてドライバー回路DR1を
介して撮像素子の受光部から蓄積部への電荷の転送及び
蓄積部からの耽み出しパルス−1〜−1によ夕開始され
る。叉1カウンタCNT)C端子からのパルスの立上)
に同期してワンショット(ロ)路083が第2図示のパ
ルス巾T3のパルスを出カシ、この間マグネットが作動
してシャッタが閉じ受°jt部への光入射を阻止する。
Next, after selecting the appropriate mode shown in S-1 using the mode selector M8 and setting the appropriate accumulation time and time using 881.813, the steel mode switch 8W2
When turned ON, the flip-flop FF is set, so the data from the arithmetic circuit 0FF) runt roll input vehicle ~cK#i selector M8 is input, and the FFI is set accordingly.
) Anodogtom N due to the Q output becoming high level.
D is closed, the sample hold circuit 8HC stops the number printing/a, and the III party value light value in the continuous mode is held. Also, since 8W6 to 8W5 are switched to .IIK, first the driver circuit R1 is activated by the drive pulse Φ1. Φ island is supplied as shown in 2nd-. As a result, the light receiving gttl is not completed! Charge is cleared. Further, when the counter CN'l' is counted 9 times and the accumulation time Tl' corresponding to the preselected mode and set value has elapsed, a pulse is output from the C terminal, which is input to the sequence control circuit 8CTL and is then applied to the driver circuit. The transfer of charge from the light receiving section of the image sensor to the storage section via DR1 and the indulgence pulses -1 to -1 from the storage section are initiated. 1 counter CNT) Rise of pulse from C terminal)
In synchronization with this, the one-shot (b) path 083 outputs a pulse with a pulse width T3 shown in the second diagram, and during this time the magnet is activated and the shutter is closed to prevent light from entering the receiving portion.

これにより少なくとも受光14slから蓄積sSへの電
荷転送期間(Ts)中111党が入射を閉じるIIKし
ているが、これ轄シャッタの応答をTs’の如く極めて
蝮時間にするのが崩御であるのと、時間Ts’以上であ
っても伺ら差支えがない為である。又、本実施例では撮
48嵩子からの信号の読出し終了彼達やかにスチルモー
ルドから連続モードKm帰させる為の7リツプ70ツブ
PFf)”jセット信号をこのワンショット回路083
の立下伽に同期してワンショット084により形成して
いるので1シャッタ閉成時間丁SFi耽出しに要する全
体の時間T・以上にするのが望ましい。何故なら余砂早
く連続モードに後彎するとスチルモード2の信号読み出
し中Ki#たなi!i健が蓄積部に転送されてしまう恐
れがある為である。尚、本実施例で韓T・−TI−とじ
である。又、本実施例ではスイッチ8W2によるスチル
モード緯影祉フツツプフロツされている。
As a result, at least during the charge transfer period (Ts) from the light receiving 14sl to the storage sS, the 111th shutter closes the incidence, but the key to this is to make the response of the shutter very short as Ts'. This is because there is no problem even if the time is longer than the time Ts'. In addition, in this embodiment, the 7-lip 70-tub PFf)"j set signal is sent to this one-shot circuit 083 in order to return the continuous mode Km from the still mold as soon as the reading of the signal from the camera 48 is completed.
Since it is formed by one shot 084 in synchronization with the fall of SFi, it is desirable to make the total time required for one shutter closing time equal to or longer than T. This is because when you switch to continuous mode quickly, the still mode 2 signal is being read out! This is because there is a risk that the i-ken may be transferred to the storage section. Incidentally, in this embodiment, the binding is Korean T--TI-. Further, in this embodiment, the still mode image is stepped up and down by the switch 8W2.

又、スイッチ8W2のONKよって、それ迄!トリクス
回路MTXからモニター装置に供給されていた映像信号
は、連続モード中に1フイールドずつ更新して記録され
ていた信号の再生出力に切示し続け、1Ii1面が消え
たり乱れたりする事がない。
Also, by ONK of switch 8W2, until then! The video signal supplied from the TRIX circuit MTX to the monitor device is updated one field at a time during the continuous mode and continues to be output as the recorded signal, so that the 1Ii 1 side will not disappear or be disturbed.

尚、本実施ガで11フイールドメモリとして磁気ディス
クの所にのトラックを用いているが、本発明社この様な
アナ關グメモリに1114足されるもので社なく s 
’r )リクス(ロ)路出力を常時人/D変換してから
デジタルメモリを一時記憶し、1フイールド毎にこれを
爽新して行くようにしても達成し得る。
In this embodiment, tracks on the magnetic disk are used as the 11 field memory, but the present invention does not add 1114 to such an analog memory.
This can also be achieved by constantly converting the output of the R/R and then temporarily storing it in a digital memory and refreshing it for each field.

この場合スチルモードに切換えられる事によりメ毫すの
内容をD/A変換してモニタに尋びく様にすれば夷い。
In this case, it would be a good idea to switch to the still mode, convert the message content to D/A, and display it on the monitor.

又、本実施伺ではY信号を!トリクス回路の出力から得
ているが、プロセス回路の出力を合成して得ても良い。
Also, please use the Y signal during this visit! Although it is obtained from the output of the trix circuit, it may also be obtained by combining the output of the process circuit.

撮像素子の受光部の一部を掬光専用とし、ここからの出
力を積分する事によ*S+jt、値を得ても良い。
The value *S+jt may be obtained by dedicating a part of the light-receiving section of the image pickup device exclusively for capturing light and integrating the output from this section.

崗、撮像手段としては第4鮪示の如きフレームトランス
ファー謔CCDに限られるものではなくインター2イン
ドラン、スファー型のものであっても喪い。
However, the imaging means is not limited to a frame transfer CCD such as the one shown in the fourth example, but may also be of the inter-two-indoor, or space-type type.

【図面の簡単な説明】[Brief explanation of drawings]

第11社本発明のm像装置の一実施例のブロック図、第
2図は第1図示回路の壁部タイミング図1第6図は演算
回路OPの入出力状絵図、#I4図は本発明に適用され
る撮像素子の一例を示す区であるO ムP■・・−紋り手段、8HT・・・拳・シャツ!手段
、LD、−・9・撮像素子、 DRI・・・・・ドライ
バ。 回路、IG・・・・・積分回路、SHC・・・・・サン
プルホールド回路、GH・・・・・メモリー書込み読出
し用ヘッド、MTV・・・・・モニター装置、OP・・
・・・演算回路。 時針出願人 キャノン株式会社
Company 11: A block diagram of an embodiment of the m-image device of the present invention. Fig. 2 is a wall timing diagram of the first illustrated circuit. Fig. 6 is a pictorial diagram of the input/output state of the arithmetic circuit OP. Fig. #I4 is a diagram of the input/output state of the arithmetic circuit OP. This is an example of an image sensor applied to an image pickup device. Means, LD, -.9.Image sensor, DRI...driver. Circuit, IG...Integrator circuit, SHC...Sample hold circuit, GH...Memory write/read head, MTV...Monitor device, OP...
...Arithmetic circuit. Hour hand applicant Canon Co., Ltd.

Claims (1)

【特許請求の範囲】 被写体輝度vt#l定する測定手段と、複数の露出パラ
メータを夫々設定する複数のパラメータ設定手段と、 前記複数のパラメータと前記測光手段の出力とを演算し
【所定の出力を得る演算手段と、該演算手段の出力によ
り撮像手段への入射光量を制御する露出制御手段と、 撮像手段な周期的に走査する@1のモード及び撮像手段
を一画分だけ走査する第2のモードとな有する走査制御
手段と、 前記演算手段に入力される露出パラメータを選択的に切
換える切換手段と、 前記走査制御中fllKおける@1.第2のモードの切
換えに連動して前記切換手段により選択されるパラメー
タを切換える機構成した撮像装置。
[Claims] Measuring means for determining subject brightness vt#l; a plurality of parameter setting means for respectively setting a plurality of exposure parameters; an exposure control means for controlling the amount of light incident on the imaging means by the output of the calculation means; a @1 mode in which the imaging means periodically scans; and a second mode in which the imaging means scans only one frame. scanning control means having a mode of; switching means for selectively switching exposure parameters input to the calculation means; and @1. An imaging device configured to switch parameters selected by the switching means in conjunction with switching of the second mode.
JP56215343A 1981-12-29 1981-12-29 Image pickup device Granted JPS58116881A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP56215343A JPS58116881A (en) 1981-12-29 1981-12-29 Image pickup device
US06/452,500 US4599657A (en) 1981-12-29 1982-12-23 Image pick-up device
US06/860,513 US4763204A (en) 1981-12-29 1986-05-07 Solid state image pick-up device having a shutter which is capable of still and motion picture photography
US07/274,703 US4910606A (en) 1981-12-29 1988-11-15 Solid state pick-up having particular exposure and read-out control
US07/459,564 US5010418A (en) 1981-12-29 1990-01-02 Image pick-up device
US07/654,802 US5309247A (en) 1981-12-29 1991-02-13 Image pick-up device
US08/073,648 US5760830A (en) 1981-12-29 1993-06-08 Image pick-up device having switching over means, image pick-up means, monitor means, recording means, still picture display means and control means

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56215343A JPS58116881A (en) 1981-12-29 1981-12-29 Image pickup device

Publications (2)

Publication Number Publication Date
JPS58116881A true JPS58116881A (en) 1983-07-12
JPH0230634B2 JPH0230634B2 (en) 1990-07-09

Family

ID=16670726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56215343A Granted JPS58116881A (en) 1981-12-29 1981-12-29 Image pickup device

Country Status (1)

Country Link
JP (1) JPS58116881A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60241381A (en) * 1984-05-16 1985-11-30 Olympus Optical Co Ltd Electronic image pickup device
JPS60249480A (en) * 1984-05-25 1985-12-10 Olympus Optical Co Ltd Solid-state image pickup device
JPS62105581A (en) * 1985-10-28 1987-05-16 イマジエリ− インダストリ− システム ソシエテ アノニム Electronic shutter
EP0272307B1 (en) * 1986-06-30 1992-05-06 EASTMAN KODAK COMPANY (a New Jersey corporation) Exposure control apparatus for a still video camera having an electronic viewfinder

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4398389B2 (en) 2005-02-03 2010-01-13 富士フイルム株式会社 Imaging device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5480124A (en) * 1977-12-09 1979-06-26 Minolta Camera Co Ltd Camera with automatic focus control device
JPS55165077A (en) * 1979-06-12 1980-12-23 Fuji Photo Film Co Ltd Video camera in common use for still and movie
JPS5689024A (en) * 1980-05-02 1981-07-20 Fuji Photo Film Co Ltd Photoelectric converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5480124A (en) * 1977-12-09 1979-06-26 Minolta Camera Co Ltd Camera with automatic focus control device
JPS55165077A (en) * 1979-06-12 1980-12-23 Fuji Photo Film Co Ltd Video camera in common use for still and movie
JPS5689024A (en) * 1980-05-02 1981-07-20 Fuji Photo Film Co Ltd Photoelectric converter

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60241381A (en) * 1984-05-16 1985-11-30 Olympus Optical Co Ltd Electronic image pickup device
JPH0458752B2 (en) * 1984-05-16 1992-09-18 Olympus Optical Co
JPS60249480A (en) * 1984-05-25 1985-12-10 Olympus Optical Co Ltd Solid-state image pickup device
JPS62105581A (en) * 1985-10-28 1987-05-16 イマジエリ− インダストリ− システム ソシエテ アノニム Electronic shutter
EP0272307B1 (en) * 1986-06-30 1992-05-06 EASTMAN KODAK COMPANY (a New Jersey corporation) Exposure control apparatus for a still video camera having an electronic viewfinder

Also Published As

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JPH0230634B2 (en) 1990-07-09

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