JPS58111562U

JPS58111562U - electronic shutter device

Info

Publication number: JPS58111562U
Application number: JP850682U
Authority: JP
Inventors: 勇田中; 勇二濱崎
Original assignee: 株式会社島津製作所
Priority date: 1982-01-24
Filing date: 1982-01-24
Publication date: 1983-07-29

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は、本考案の一実施例のブロック回路図、第２図
は固体撮像素子の概略的な構造を示す図、第３図は前記
実施例における動作の説明に供するタイムチャートであ
る。２・・・カウンタ回路、４・・・固体撮像素子、５・・
・露光時間設定器、６・・・比較回路、７・・・フレー
ムコントロール回路、８・・・第１のアンド回路（第２
の回路手段）、９・・・ノア回路（第３の回路手段）、
１１・・・フリップフロップ（第１の回路手段）、１２
・・・第２のアンド回路（第４の回路手段）。６　　　　　ｆｔ１１ −−Ｈ”FIG. 1 is a block circuit diagram of an embodiment of the present invention, FIG. 2 is a diagram showing a schematic structure of a solid-state image sensor, and FIG. 3 is a time chart for explaining the operation of the embodiment. 2... Counter circuit, 4... Solid-state image sensor, 5...
・Exposure time setting device, 6... Comparison circuit, 7... Frame control circuit, 8... First AND circuit (second
circuit means), 9...NOR circuit (third circuit means),
11...Flip-flop (first circuit means), 12
...Second AND circuit (fourth circuit means). 6 ft 11 --H"

Claims

[Scope of utility model registration request]

A counter circuit 2 that sequentially sends out address signals, an exposure time setter 5 that sends out an exposure time setting signal corresponding to a predetermined address signal, and an address signal from the counter circuit 2 and an exposure time setting from the exposure time setter 5 A comparator circuit 6 receives the signals and sends out a match signal when a predetermined "address signal exposure time setting signal" among the address signals matches, and a first clock signal is input to the input section. a first circuit means 11 for outputting from an output section a valid video data extraction signal for disabling the video data signal from the time when the video data signal is applied until the second clock signal is applied; and a second clock signal. second circuit means 8 for sending out a reset signal for resetting the counter path 2 based on the coincidence signal in response to the timing at which the signal is applied to the input of the first circuit means 11; a frame control circuit 7 that sends out a frame control signal related to control of one frame period of the screen;
The frame control signal is used as the first clock signal, and the reset signal is used as the second clock signal.
, third circuit means 9 for generating a second clock signal;
A light receiving section 41 that converts the amount of incident light into an amount of charge, and a shift that controls the timing of receiving charges from the light receiving section 41 by the first and second clock signals, and transfers the received charges and sends them to the output section 45. register 4
2.43, and a fourth circuit means 12 for extracting an effective video data signal from the video data signal sent from the output section 45 of the solid-state imaging device 4 based on the effective video data extraction signal. characterized by comprising;
Electronic shutter device.