JPH0787404A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To transfer video information efficiently from a solid-state image pickup device to an external device. CONSTITUTION:An H counter 19 is started in response to a transfer trigger given from an external device to generate' a line feed pulse based on an output of a decoder receiving the count of the H counter 19. The information charge is transferred from a storage section 3 of a CCD image sensor 1 in response to the line feed pulse in the unit of one horizontal line to obtain an intermittent video signal responding to the transfer trigger. The H counter 19 is stopped after being operated for one horizontal scanning period and reaches a standby state and a pulse generating circuit 118 is stopped accordingly.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device such as a still camera suitable for obtaining image information captured by a computer or the like.

[0002]

2. Description of the Related Art It is well known that an image scanner that scans and reads a subject original is used when capturing image data into a computer or the like, but in recent years, a still camera that can handle a three-dimensional subject is used. Is also considered. This still camera is, for example, a CC
A drive circuit including a D image sensor and its drive circuit, which is responsive to a computer instruction, is configured to transfer and output the information charges accumulated in the image pickup section of the CCD image sensor to obtain a video signal corresponding to the subject video. It

FIG. 3 is a block diagram showing the structure of a still camera, and FIG. 4 is a timing chart for explaining its operation. The frame transfer type CCD image sensor 1 is composed of an image pickup section 2, a storage section 3, a horizontal transfer section 4 and an output section 5. The image pickup unit 2 is composed of a plurality of shift registers which are continuous in the vertical direction and are arranged in parallel with each other, and each bit of these shift registers is potential-divided by the action of electrodes to define a plurality of light-receiving pixels. . The storage unit 3 is
Each shift register of the image pickup unit 2 is composed of a plurality of continuous shift registers, and receives and accumulates information charges from the shift register of the image pickup unit 2. The horizontal transfer unit 4 includes a single shift register in which each bit is associated with the output terminal of the shift register of the storage unit 3, and sequentially transfers and outputs the information charges received from the storage unit 3. The output unit 5 is provided on the output side of the horizontal transfer unit 4, converts the information charge output from the horizontal transfer unit 3 into a voltage value, and outputs the voltage value. The CCD output extracted from the output unit 5 is input to the signal processing circuit 6 and subjected to various processes such as sample hold, clamp and gamma correction, and then output as a video signal.

CCD for driving CCD image sensor 1
The driver 7 operates on the basis of a reference clock having a constant cycle, and for example, the driver 7 outputs four signals to the imaging unit 2 and the storage unit 3, respectively.
The phase transfer clocks φ _V and φ _S are supplied, and the two-phase transfer clock φ _H is supplied to the horizontal transfer unit 4. As shown in FIG. 4, the clock supplied to the image pickup unit 2 includes a discharge clock for discharging the information charges accumulated in each light receiving pixel of the image pickup unit 2 and a read clock for transferring the information charges to the accumulation unit 3. The exposure period is set in the period from the discharge clock to the read clock. That is, in the CCD image sensor 1 that constantly receives light, after the information charges accumulated in the image pickup unit 2 are discharged and reset, the newly accumulated information charges are transferred and output after a predetermined period has elapsed. By that, CC
The exposure period of the D image sensor 1 is set. Regarding the setting of the exposure period, for example, Japanese Patent Application No. 1-157369 or Japanese Patent Application No. 1-183976 by the present applicant.
No. The information charges obtained during the exposure period set as described above are instantaneously transferred from the imaging unit 2 to the storage unit 3 by the read clock, and then one horizontal line is supplied by the pulse of one shot supplied to the storage unit 3. The data is transferred to the horizontal transfer unit 4 in a constant cycle every time. This transfer is performed every horizontal scanning period, and the transfer output of the information charges for one screen is completed in the vertical scanning period.

The timing control circuit 8 receives the discharge timing signal for determining the timing of discharging the information charges and the read timing signal for determining the timing of transferring and outputting the information charges, and controls the timing of activating the driver 7. At the same time, the signal processing circuit 6 generates necessary signal processing pulses such as sampling pulses and clamp pulses in synchronization with the operation of the CCD image sensor 1, and supplies them to the signal processing circuit 6. The timing control circuit 8 is composed of, for example, a counter that starts counting clocks of a constant cycle triggered by the discharge timing signal and the read timing signal, and a decoder that decodes the count value of this counter.

[0006]

When capturing image information from a still camera to an external device such as a computer as described above, a timing signal for determining the operation timing of the CCD image sensor 1 is supplied from the external device side. . When a video signal is output from the still camera in response to this timing signal, the external device captures the video signal with the processing such as arithmetic processing and memory access suspended, and stores it in the built-in memory. Remembered. Usually, in order to be able to cope with the output of one screen of video signal from the still camera, the external device side is configured to give a shooting instruction to the still camera after securing a period during which each process is stopped. However, in order to capture a video signal for one screen, at least a processing stop period longer than the vertical scanning period of the CCD image sensor 1 is required, and as a result, signal processing in an external device is delayed.

Therefore, an object of the present invention is to provide a still camera (solid-state image pickup device) capable of supplying video information without disturbing the operation of a device which receives a video signal.

[0008]

The present invention has been made to solve the above-mentioned problems, and is characterized in that a plurality of light-receiving pixels are arranged in a matrix and correspond to an object image to be illuminated. After transferring the information charges accumulated in each light receiving pixel to each light receiving pixel and the information charges accumulated in each light receiving pixel of this solid state imaging device to the storage region adjacent to the light receiving pixel, one horizontal line unit from this storage region Drive means for transferring and outputting, and first timing control means for deciding the transfer timing of the information charge from each light receiving pixel of the solid-state imaging device to the storage region in response to a first trigger supplied from an external device. Second timing control means for determining a transfer output timing of the information charges from the accumulation region of the solid-state imaging device in response to a second trigger supplied from the external device. Lies in the fact.

[0009]

According to the present invention, the video signal for one screen is continuously or discontinuously output in units of one horizontal line in accordance with the second trigger supplied from the device on the video signal capturing side. The video signal can be intermittently output so as to correspond to the gap between the processing operations of the device. For this reason,
Even when the video signal for one screen is taken in, it is not necessary to stop the processing operation of the device for a long period.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of a solid-state image pickup device of the present invention which constitutes a still camera, and FIG. 2 is a timing chart for explaining its operation. The CCD image sensor 1 is composed of an image pickup unit 2, a storage unit 3, a horizontal transfer unit 4, and an output unit 5, as in FIG. A V driver 11, an S driver 12, and an H driver 13 are connected to the image pickup unit 2, the storage unit 3, and the horizontal transfer unit 4, which are shift registers, respectively.
Supply _V , φ _S , and φ _H. As a result, the information charges accumulated in the image pickup section 2 are transferred to the accumulation section 3 and temporarily accumulated therein.
, And then to the output unit 5 side. Then, the CCD output taken out from the output unit 5 is sequentially input to the sample hold circuit 14 and the signal processing circuit 15, subjected to a predetermined process, and output as an image signal to an external device.

The frame transfer control circuit 16 determines the timing of transferring the information charges of the image pickup section 2 of the CCD image sensor 1 to the storage section 3, and responds to the image pickup trigger supplied from the external device side to the V driver. 11 and the S driver 12 are activated. Here, the frame transfer control circuit 16
As for the imaging trigger supplied to the CCD image sensor 1, it is possible to determine the information charge transfer output timing and the information charge discharge timing at the same time as the operation shown in FIG. Control is possible.

The line feed control circuit 17 determines the timing of transferring one horizontal line of the information charges of the storage section 3 to the horizontal transfer section 4, and the pulse generation circuit at a timing different from that of the frame transfer control circuit 16. In response to the instruction from 18, the S driver 12 and the H driver 13 are activated. The pulse generation circuit 18 is based on the output of the decoder 20 which decodes the count value of the H counter 19 which is activated by a transfer trigger supplied from the external device side, and sends a line feed pulse and various signal processing pulses (sampling) necessary for signal processing. Pulse, clamp pulse, blanking pulse, etc.). Here, the H counter 19 is configured to be reset and stop its operation when the count value reaches a value corresponding to the number of clocks in one horizontal scanning period, whereby the operation of the pulse generation circuit 18 is stopped. It is divided every horizontal scanning period. Therefore, when a trigger is input to the H counter 19, the pulse generation circuit 18 starts operating and the CCD
The information charge accumulated in the accumulation unit 3 of the image sensor 1 is 1
Only horizontal lines are transferred and output. Then, after the transfer output of the information charges is completed (after one horizontal scanning period), the operation of the pulse generation circuit 18 is stopped in accordance with the stop of the operation of the H counter 19, and the standby state is set. Prepare for the input of the transfer trigger.

In an external device such as a computer which receives a video signal, a C which executes an operation program for signal processing
As shown in FIG. 2, the PU intermittently repeats various processes such as calculation, memory access, and screen display. Therefore, on the external device side, the period during which the operation of the CPU is interrupted is set as the image data transfer period, and an appropriate number of transfer triggers are generated within that period. For example, if the CPU operation suspension period is four times the horizontal scanning period, the transfer trigger is generated four times during that period.

The line feed pulse is generated in the same period with imming slightly delayed from the transfer trigger,
It is given to the S driver 12 and the H driver 13. In response to this line feed pulse, the S driver 12 transfers the information charges of the storage unit 3 to the horizontal transfer unit one horizontal line at a time,
The H driver 13 generates a number of clocks corresponding to the number of bits of the horizontal transfer section 4 and transfers the information charges of the horizontal transfer section 4 to the output section 5 side. The sampling pulse applied to the sample hold circuit 14 is synchronized with the horizontal transfer clock,
The CCD output extracted from the output unit 5 is sampled in 1-bit units. The clamp pulse and blanking pulse supplied to the signal processing circuit 15 clamp the reference level of each horizontal scanning period of the CCD output in synchronization with the horizontal transfer clock and set the blanking period of horizontal scanning. Each of these signal processing pulses is generated by the pulse generation circuit 18 when a transfer trigger is given.
To 1 horizontal scanning period.

[0015]

According to the present invention, since a video signal can be output in units of one horizontal line in response to a transfer trigger, one screen of video information (video signal) obtained by the image pickup device is obtained.
Can be intermittently transferred in accordance with the operation of the device that captures the video information. Therefore, the operation of the external device such as the computer on the side of capturing the video signal is not disturbed, and the video information can be efficiently captured by the external device.

Further, since the image information is sequentially output from the state of being stored in the CCD image sensor, a circuit such as an image memory is not required on the side of the image pickup device, and the circuit scale hardly increases.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a solid-state imaging device of the present invention.

FIG. 2 is a timing chart showing the operation of the solid-state imaging device of the present invention.

FIG. 3 is a block diagram showing a configuration of a conventional solid-state image sensor.

FIG. 4 is a timing chart showing an operation of a conventional solid-state imaging device.

[Explanation of symbols]

 1 CCD image sensor 2 image pickup unit 3 storage unit 4 horizontal transfer unit 5 output unit 11 V driver 12 S driver 13 H driver 14 sample hold circuit 15 signal processing circuit 16 frame transfer control circuit 17 line feed control circuit 18 pulse generation circuit 19 H Counter 20 decoder

Claims (2)

[Claims] 1. A solid-state image sensor in which a plurality of light-receiving pixels are arranged in a matrix, and information charges corresponding to an illuminated subject image are accumulated in each light-receiving pixel, and information charges accumulated in each light-receiving pixel of the solid-state image sensor. Each of the solid-state image pickup devices in response to a driving means for transferring and outputting in a horizontal line unit from the storage area after the transfer to the storage area adjacent to the light receiving pixel and a first trigger supplied from an external device. In response to the first timing control means for determining the transfer timing of the information charge from the light receiving pixel to the storage area, and the second trigger supplied from the external device, the information charge from the storage area of the solid-state image pickup device. And a second timing control means for determining the transfer output timing of the video signal, the video signal forming one screen being set to 1 according to the second trigger supplied intermittently.
A solid-state imaging device, which outputs continuously or discontinuously in units of horizontal lines. 2. A counter is provided which is activated upon receiving the second trigger and counts a predetermined number of clocks during a horizontal scanning period of the solid-state imaging device, and the driving means operates based on the count value of the counter. The solid-state imaging device according to claim 1, wherein.