JPS58109860A - Measuring device of insulation resistance - Google Patents
Measuring device of insulation resistanceInfo
- Publication number
- JPS58109860A JPS58109860A JP21126281A JP21126281A JPS58109860A JP S58109860 A JPS58109860 A JP S58109860A JP 21126281 A JP21126281 A JP 21126281A JP 21126281 A JP21126281 A JP 21126281A JP S58109860 A JPS58109860 A JP S58109860A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- output signal
- current detection
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16571—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing AC or DC current with one threshold, e.g. load current, over-current, surge current or fault current
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は被測定物に高電圧を印加して絶縁抵抗を測定す
る絶縁抵抗測定装置に係る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an insulation resistance measuring device that measures insulation resistance by applying a high voltage to an object to be measured.
一般にこの穏絶縁抵抗測定装置は、外圧回路にて連続し
て高電圧を発生しこの高電圧を被測定物に印加して流れ
る電流を検出していた0而して上記の如きものであると
、連続して高電圧を発生しているので消費電流が大きく
なると共に昇圧回路の電気部品が発熱して故障する恐れ
があった・
本発明は上記の様な点に鑑み、消費電流を少くすると共
に昇圧回路の故障を少くすることを目的としたものであ
り。In general, this moderate insulation resistance measuring device continuously generates a high voltage in an external pressure circuit, applies this high voltage to the object under test, and detects the flowing current. Since high voltage is continuously generated, the current consumption increases and there is a risk that the electrical components of the booster circuit will heat up and break down.In view of the above points, the present invention aims to reduce the current consumption. This is also aimed at reducing the number of failures in the booster circuit.
以下本発明を一実施例として掲げた図面に基づいて説明
すると、1は発振回路であって、パルス信号を出力する
。2は同期発振回路であって、発信回路1の出力信号に
同期してこの出力信号より長い時間信号を出力する0実
施例では第2図の如く発振出力信号を出して込る03は
外圧回路であって、同期発振回路2の出力信号に応答し
て電圧を昇圧する。実施例では同期発振回路2の出力信
号に応答してプツシニブル回路が動作し昇圧トランスに
一次電流を流して二次出力電圧を取シ出す様にしている
o4は整流回路であって、昇圧回路3の出力電圧を整流
して一定端子5.5に印加する。6は電流検出回路であ
って、整流回路4よ如測定端子5.5に流れる電流を検
出するO実施例では、この電流が設定値以上の際に信号
を出力する様にしている。7は遅延回路であって、発振
回路1の出力信号を一定時間遅延して出力する。この遅
延する一定時間は同期発振回路2の出力時間内の範囲で
測定が安定する様な時間に設定するO勿論、発振回路1
の出力信号のパルス巾とこの遅延回路7のパルス巾とは
異なっていてもよい08は・グンプルホールド回路であ
って遅延回路7の出力信号と電流検出回路6の出力信号
とを入力し、遅延回路7の出力信号が無い状態では電流
検出回路6の出力信号の入力を禁止し遅延回路7の出力
信号がある状態では電流検出回路6の出力信号の入力禁
止を解いてこの出力信号を入力し保持す為。9はベル、
ブザー或は発光素子等の表示装置であって、サンプルホ
ールド回路8の保持し九信号を表示する〇
菖2図は第1図の動作特性図であって、(a)は発振回
路1の出力信号、(婦は同期発振回路2の出力信号、(
C)は整流回路4の出力電圧、(d)は電流検出回路6
の出力信号、(e)は遅延回路7の出力信号、(f)は
サンプルホールド回路8の出力信号を示している〇
而してこの動作状態を説明すると、発振回路1が信号を
出力するとこの信号に同期して同期発振回路2が所定時
間動作し外圧回路3と整流回路4とを介して測定端子5
.5に高圧を印加する。この際被測定物膣の絶縁性が良
ければ電流は流れず電流検出回路6は信号を出力しない
0尚、測定端子5.5間↓と生ずる浮遊容量により初期
の過渡現象で信号が出る場合もあるが遅延回路7の遅延
薯こより無視される。従ってサンプルホールド回路8に
は電流検出回路6の信号がない状態が保持されその状態
が表示装置9にて表示される。さらに被測定物膣の絶縁
性が悪く電流が流れた場合は電流検出回路6が信号を出
力しサンプルホールド回路にてその状態が保持されて表
示装置9にて表示されるのである。The present invention will be explained below based on the drawings showing one embodiment of the present invention. Reference numeral 1 denotes an oscillation circuit that outputs a pulse signal. 2 is a synchronous oscillation circuit which outputs a signal for a longer time than the output signal in synchronization with the output signal of the oscillation circuit 1.03 is an external pressure circuit which outputs an oscillation output signal as shown in FIG. The voltage is boosted in response to the output signal of the synchronous oscillation circuit 2. In the embodiment, the push nibble circuit operates in response to the output signal of the synchronous oscillation circuit 2, causing the primary current to flow through the step-up transformer and extracting the secondary output voltage. o4 is a rectifier circuit, and the step-up circuit 3 The output voltage of is rectified and applied to a constant terminal 5.5. Reference numeral 6 denotes a current detection circuit, which detects the current flowing through the measurement terminal 5.5 through the rectifier circuit 4. In the embodiment, a signal is output when this current exceeds a set value. A delay circuit 7 delays the output signal of the oscillation circuit 1 by a certain period of time and outputs the delayed signal. This fixed delay time is set to a time that stabilizes the measurement within the output time of the synchronous oscillation circuit 2.Of course, the oscillation circuit 1
The pulse width of the output signal of the delay circuit 7 may be different from the pulse width of the delay circuit 7. Reference numeral 08 is a gun pull hold circuit which inputs the output signal of the delay circuit 7 and the output signal of the current detection circuit 6; When there is no output signal of the delay circuit 7, the input of the output signal of the current detection circuit 6 is prohibited, and when there is an output signal of the delay circuit 7, the inhibition of input of the output signal of the current detection circuit 6 is released and this output signal is input. and to keep it. 9 is bell,
A display device such as a buzzer or a light-emitting element, which displays the nine signals held by the sample-and-hold circuit 8. Figure 2 shows the operating characteristics of Figure 1, and (a) shows the output of the oscillation circuit 1. signal, (the output signal of the synchronous oscillation circuit 2, (
C) is the output voltage of the rectifier circuit 4, (d) is the current detection circuit 6
, (e) shows the output signal of the delay circuit 7, and (f) shows the output signal of the sample and hold circuit 8. To explain this operating state, when the oscillation circuit 1 outputs a signal, this A synchronous oscillation circuit 2 operates for a predetermined period of time in synchronization with the signal, and a measurement terminal 5 is generated via an external pressure circuit 3 and a rectifier circuit 4.
.. Apply high pressure to 5. At this time, if the insulation of the vagina of the object to be measured is good, no current will flow and the current detection circuit 6 will not output a signal.In addition, a signal may be output due to an initial transient phenomenon due to stray capacitance between the measurement terminals 5 and 5. However, due to the delay of the delay circuit 7, it is ignored. Therefore, the sample hold circuit 8 maintains a state in which there is no signal from the current detection circuit 6, and this state is displayed on the display device 9. Furthermore, if the insulation of the vagina of the object to be measured is poor and a current flows, the current detection circuit 6 outputs a signal, and the sample and hold circuit holds this state and displays it on the display device 9.
尚、実施例に於いては電流検出回路9は設定値以上の電
流が流れた際に信号を出力する様にしたが、流れた電流
値に対応する電圧を出力しその出力電圧をサンプルホー
ルド回路8にて保持して電圧計、電流計等の表示装置9
にて表示するものでもよい。In the embodiment, the current detection circuit 9 outputs a signal when a current exceeding a set value flows, but it is also possible to output a voltage corresponding to the flowing current value and use the sample and hold circuit to output the voltage. Display device 9 such as voltmeter, ammeter, etc.
It may also be displayed in
かように本発明は、パルス信号を出力すゐ発振回路1と
、この発振回路1の出力信号に同期してこの出力信号よ
り長い時間信号を出力する同期発振回路2と、この同期
発振回路2の出力信号に応答して電圧を昇圧する外圧回
路3と、との昇圧回路3の出力電圧を整流しこの整流電
圧を測定端子5.5に印加する整流回路4と、この整流
−路4よりIlj定端子5.5番ζ流れる電流を検出す
る電流検出回路6と、前記発振回路1の出力信号を一定
時間遅延して出力する遅延回路7と、この遥mgi路7
の出力時に入力禁止を解き前記電流検出回路6の出力信
号を入力しこの入力した信号を保持するサンプルホール
ド回路8と、このサンプルホールド回路8の保持した信
号を表示する表示装置9とで構成したので、従来の如き
連続して高電圧を発生する本のに比し、消費電流が少く
なり而も昇圧回路3等の電気部品の発熱が少〈なって故
障を少く出来る0而も、高電圧を測定端子5.5に印加
してから一定時間遅れた時点でサンプルホールド回路8
が電流検出回路6の入力禁止を解くから、初期の過渡現
象或はノイズ、サージ等に影響されず安定した時点での
測定が出来る効果がある。Thus, the present invention provides an oscillation circuit 1 that outputs a pulse signal, a synchronous oscillation circuit 2 that outputs a signal for a longer time than the output signal in synchronization with the output signal of this oscillation circuit 1, and this synchronous oscillation circuit 2. a rectifier circuit 4 that rectifies the output voltage of the booster circuit 3 and applies this rectified voltage to the measurement terminal 5.5; A current detection circuit 6 that detects the current flowing through the Ilj constant terminal 5.5, a delay circuit 7 that delays the output signal of the oscillation circuit 1 by a certain period of time, and outputs the output signal after delaying the output signal of the oscillation circuit 1 for a certain period of time;
The sample-and-hold circuit 8 releases the input inhibition when outputting the current detection circuit 6, inputs the output signal of the current detection circuit 6, and holds this input signal, and the display device 9 displays the signal held by the sample-and-hold circuit 8. Therefore, compared to the conventional type that continuously generates high voltage, the current consumption is lower, and electrical parts such as the booster circuit 3 generate less heat, which reduces failures. is applied to the measurement terminal 5.5, and after a certain time delay, the sample and hold circuit 8
Since the inhibition of input to the current detection circuit 6 is lifted, there is an effect that measurement can be carried out at a stable point without being affected by initial transient phenomena, noise, surges, etc.
図面#1図は本発明の絶縁抵抗測定装置の一実施例を示
す回路ブロック図、第2図は第1図の要部の動作特性図
である0
1・・・発振回路、2−・・同期発振回路%3・・・昇
圧回路、4・・・整流回路% 5.5・・・測定端子、
6・・・電流検出回路、7・es違延延回路8・・・サ
ンプルホールド回路、9・・・表示羨置0
第1図
第2図
1□−」=Drawing #1 is a circuit block diagram showing an embodiment of the insulation resistance measuring device of the present invention, and FIG. 2 is an operating characteristic diagram of the main part of FIG. 1. 0 1...Oscillation circuit, 2-... Synchronous oscillation circuit % 3... Boost circuit, 4... Rectifier circuit % 5.5... Measurement terminal,
6...Current detection circuit, 7.es delay delay circuit 8...Sample hold circuit, 9...Display position 0 Fig. 1 Fig. 2 1□-''=
Claims (1)
の出力信号に同期してこの出力信号よりAい時間信号を
出力する同期発振回路と、この同期発振回路の出力信号
に応答して電圧を昇圧する外圧回路と、この昇圧回路の
出力電圧を整流しこの整流電圧を測定端子に印加する整
流回路と、この整流回路より測定端子に流れる電流を検
出する電流検出回路と、前記発振回路の出力信号を一定
時間遅延して出力する遅虱回路と、この遅延回路の出力
時に入力禁止を解1前記電流検出回路の出力信号を入力
しこの入力した信号を保持するサンプルホールド回路と
、このサンプルホールド回路の保持した信号を表示する
表示装置とで構成した絶縁抵抗測定装置。(1) An oscillating clock that outputs a pulse signal, a synchronous oscillation circuit that synchronizes with the output signal of this oscillation circuit and outputs a time signal longer than this output signal, and a synchronous oscillation circuit that responds to the output signal of this synchronous oscillation circuit. an external pressure circuit that boosts the voltage; a rectifier circuit that rectifies the output voltage of the booster circuit and applies the rectified voltage to the measurement terminal; a current detection circuit that detects the current flowing from the rectification circuit to the measurement terminal; and the oscillation circuit. a delay circuit that delays the output signal of the current detection circuit for a certain period of time and outputs the output signal; a sample hold circuit that inputs the output signal of the current detection circuit and holds the input signal; An insulation resistance measuring device consisting of a display device that displays the signal held by a sample and hold circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21126281A JPS58109860A (en) | 1981-12-24 | 1981-12-24 | Measuring device of insulation resistance |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21126281A JPS58109860A (en) | 1981-12-24 | 1981-12-24 | Measuring device of insulation resistance |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58109860A true JPS58109860A (en) | 1983-06-30 |
JPS6257226B2 JPS6257226B2 (en) | 1987-11-30 |
Family
ID=16602992
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21126281A Granted JPS58109860A (en) | 1981-12-24 | 1981-12-24 | Measuring device of insulation resistance |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58109860A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60137382U (en) * | 1984-02-17 | 1985-09-11 | 河野 薫勝 | Resistance measurement system using constant current pulses |
JPS61161771U (en) * | 1985-03-29 | 1986-10-07 | ||
JPH01195372A (en) * | 1988-01-29 | 1989-08-07 | Chino Corp | Current and voltage measuring instrument |
-
1981
- 1981-12-24 JP JP21126281A patent/JPS58109860A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60137382U (en) * | 1984-02-17 | 1985-09-11 | 河野 薫勝 | Resistance measurement system using constant current pulses |
JPS61161771U (en) * | 1985-03-29 | 1986-10-07 | ||
JPH01195372A (en) * | 1988-01-29 | 1989-08-07 | Chino Corp | Current and voltage measuring instrument |
JPH0557545B2 (en) * | 1988-01-29 | 1993-08-24 | Chino Corp |
Also Published As
Publication number | Publication date |
---|---|
JPS6257226B2 (en) | 1987-11-30 |
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