JPS58108536U - Strobe signal generation circuit - Google Patents

Strobe signal generation circuit

Info

Publication number
JPS58108536U
JPS58108536U JP514482U JP514482U JPS58108536U JP S58108536 U JPS58108536 U JP S58108536U JP 514482 U JP514482 U JP 514482U JP 514482 U JP514482 U JP 514482U JP S58108536 U JPS58108536 U JP S58108536U
Authority
JP
Japan
Prior art keywords
strobe signal
generation circuit
signal generation
flop
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP514482U
Other languages
Japanese (ja)
Inventor
戸田 広
正和 森里
Original Assignee
三洋電機株式会社
鳥取三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社, 鳥取三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP514482U priority Critical patent/JPS58108536U/en
Publication of JPS58108536U publication Critical patent/JPS58108536U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第、1図、第2図は従来のストローブ信号発生口 路を
示す図、第3図は本考案のストローブ信号発生回路を示
す図、第4図は第3図要部の出力信号を示す図である。 1・・・中央制御装置、3・・・周辺機器、5・・・入
出力デコーダ、6・・・ラッチ回路、8・・・フリップ
・フロップ。 ◆ 第3図
Figures 1 and 2 are diagrams showing the conventional strobe signal generation circuit, Figure 3 is a diagram showing the strobe signal generation circuit of the present invention, and Figure 4 is a diagram showing the output signal of the main part of Figure 3. It is. DESCRIPTION OF SYMBOLS 1... Central control unit, 3... Peripheral equipment, 5... Input/output decoder, 6... Latch circuit, 8... Flip-flop. ◆ Figure 3

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 中央制御装置の出力デー多をラッチ回路を介してプリン
タ等の周辺機器に供給するよう構成された電子機器に於
いて、前記中央制御装置の動作時発生されるコントロー
ル信号により制御されるフリップフロップを設け、該フ
リップ−フロップの出力i号を周辺機器が前記ラッチ回
路からデータを取り込むストローブ信号として使用する
よう構成したごとを特徴とするストローブ信号発生回路
In an electronic device configured to supply output data from a central control unit to a peripheral device such as a printer via a latch circuit, a flip-flop is controlled by a control signal generated when the central control unit is operated. A strobe signal generating circuit characterized in that the output i of the flip-flop is used as a strobe signal for a peripheral device to take in data from the latch circuit.
JP514482U 1982-01-18 1982-01-18 Strobe signal generation circuit Pending JPS58108536U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP514482U JPS58108536U (en) 1982-01-18 1982-01-18 Strobe signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP514482U JPS58108536U (en) 1982-01-18 1982-01-18 Strobe signal generation circuit

Publications (1)

Publication Number Publication Date
JPS58108536U true JPS58108536U (en) 1983-07-23

Family

ID=30017956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP514482U Pending JPS58108536U (en) 1982-01-18 1982-01-18 Strobe signal generation circuit

Country Status (1)

Country Link
JP (1) JPS58108536U (en)

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